FI90144B - ELECTRONIC ELMAETARE - Google Patents

Abstract

1. Electronic electricity meter having a multiplier (1, 2), operating according to the timedivision method, for first and second input quantities (U, I), the first input quantity (U) being supplied to a modulator (1), representing a component part of the multiplier (1, 2), and having a quantizer (3), subsequently connected to the multiplier (1, 2), the quantizer (3) operating according to the charge compensation method and being constructed with an integrator (17, 18) and a subsequently connected first comparator (26), characterized in that the multiplier (1, 2) and the quantizer (3) have the following features : a) during each first time phase of a clock generator (8) a first capacitor (23) is connected to the input of the integrator (17, 18), b) during each second time phase of the clock generator (8) the first capacitor (23) is charged with a charge proportional to the second input quantity (I), c) the polarity with which the first capacitor (23) is placed at the input of the integrator (17, 18) is determined by the output signal of the modulator (1), constructed according to the delta-sigma method and controlled by the clock generator (8), d) a second capacitor (25) is charged with a reference charge, while the output of the quantizer (3) is at "0", and is placed at the input of the integrator (17, 18), as long as the output of the quantizer (3) is at "1", e) a flip-flop (27), controlled by the clock generator (8), is subsequently connected to the first comparator (26), the output of the flip-flop (27) representing the output of the quantizer (3).

Description

1 ο Γ 'ί /, 4

Electronic electricity meter

The invention relates to an electronic electricity meter having a time division multiplier for the first and second 5 input variables, the first input variable being passed to a modulator acting as a multiplier component, and having a quantizer connected after the multiplier, operating by a charge compensation method and then equipped with an integrator and then with a compa-10 rator.

Such an electronic electricity meter is known from "Technisches Messen atm" 1978, booklet 11, pages 407-411. In this case, the multiplier contains a modulator which forms a pulse train with a pulse pause ratio 15 proportional to the first input variable. In this case, the capacitor is charged by the sum or difference of the constant reference current and the zero measuring current equal to the consumer current, respectively. The reverse threshold switch reacts when the capacitor voltage has reached an upper, correspondingly lower limit value. The threshold switch controls the charging and discharging of the capacitor. In practice, instead of a capacitor, an integrator is always used, which has an operational amplifier, to which a resistor connection is added in addition to the capacitor.

25 In the embodiment presented in connection with the above-mentioned literature reference, the quantizer is a so-called according to a charge compensation method, wherein the voltage-derived measuring current charges the capacitor until the upper trigger voltage of the limit value stage is reached. The limit ar-30 current is then limited to a quartz crystal controlled time stage, which switches the reference current to the capacitor for a constant time. The capacitor then discharges by a certain amount. Eventually, the voltage-derived measuring current is charged to the capacitor trigger voltage again. The achieved input-35 input frequency is then proportional to the multiplier output current. The quantizer is also practically replaced by an operational gain with a resistor and a capacitor connection.

To date, the resistors required in electronic electricity meters are difficult to manufacture with the required accuracy and temperature independence in the case of integrated circuits. The object of the invention is thus to implement an electronic electricity meter of the above-mentioned type in such a way that as few, if any, resistors as possible are used.

This object is solved according to the invention according to the features of claim 1. In this case, no resistors are required for the multiplier and quantizer at all, but only capacitors and a switch in addition to the operational amplifier. However, capacitors in integrated circuits can be implemented as substantially more thermostatically stable than resistors. In addition, no inverter is required to invert the first input variable, so that one operational amplifier can be saved. In the embodiment of the electronic electricity meter according to claim 2, the modulator is also implemented completely without resistors only by using capacitors, switches and operational amplifiers.

Sensing the second input variable by means of a voltage-limiting circuit according to claim 3 allows a high-ohmic sensing of the second input variable. Moreover, this switching delays the second input variable by one rate and thus equalizes the delay of the first input variable by one rate in the modulator. The amplification of the second input variable can be obtained simply by dimensioning the capacitors according to claim 4. In this case, the gain is the same as the ratio of both capacitors.

An exemplary embodiment of the invention will be described in more detail below with reference to the drawing.

Il 3 Q Γ · 1/4

The modulator of the electronic electricity meter is surrounded by a dashed line in the figure and is denoted by reference numeral 1. The modulator 1 supplies a voltage U falling in the resistor 34, comparable to the mains voltage. The capacitor 11 is connected via a changeover switch 10 to the voltage U or the inverted input 4 Furthermore, a comparison charge can be applied to the inverted input of the operational amplifier 4 via the connection still to be described. The non-inverted input-10 input of the operational amplifier 4 is connected to the reference potential. The output of the operational amplifier 4 is connected by a capacitor 5 back to its inverting input and connected to the input of a comparator 6, the reference input of which is at the reference potential. The output of the comparator 6 is connected to the D input of the D-flip-flop 15 7. The synchronous input of the D-flip-flop 7 is controlled by a synchronous generator 8. At the same time, the output of the D-flip-flop 7 forms the output of the modulator 1 and controls a number of switches 19, 20, 28 and 32 to be explained.

The circuit for generating a comparator charge includes a capacitor 30, one terminal of which is optionally connected to the second toggle switch 28 or the inverting input of the operational amplifier 4 via the toggle switch 29, and the other connector of which is optionally connected to the toggle switch 32 or the reference pot. The toggle switch 28 connects the first terminal of the capacitor 30 to the reference voltage Uref or reference potential, and the toggle switch 32 connects the second terminal of the capacitor 30 to the reference potential or the reference voltage Uref. Thus, according to the position of the simultaneously operating changeover switches 28 and 32, the capacitor 30 sa-30 can be optionally connected at both poles to a reference voltage Ure {. The synchronous generator 8 controls the changeover switches 9, 10, 29 and 31 and the output of the D-flip-flop 7 controls the changeover switches 28 and 32.

35 To illuminate the operation of the circuit, it is first assumed that the output signals of the clock generator 8 and the D-flip-flop 7 are zero. In this case, all switches are in the position described. The capacitor 11 is charged to a voltage proportional to the voltage U and thus to a charge 5 proportional to the voltage, and the capacitor 30 is charged to the reference voltage Uref and thus by a reference charge.

When the output of the synchronous generator 8 now changes to "1", the changeover switches 10, 29 and 31 change their state. In this case, both capacitors 11 and 30 are now connected to the inverting input of the operational amplifier 4, whereby the capacitor 30 has a positive reference charge and the capacitor 11 has a charge proportional to the voltage U. The charges on capacitors 11 and 30 are now transferred to the integration capacitor 5.

15 In the next synchronous step, the capacitor 11 is charged again to a charge proportional to the voltage U and the capacitor 30 to a reference charge. This cycle proceeds periodically until the comparator 6 responds, and at the next beat of the clock generator 8, the flip-flop 7 changes its output signal. In this case, the polarity of the capacitor 30 changes and it is thus charged with a negative reference charge.

Until now, during the charging time Τχ, the sum of the reference charge and the voltage-dependent charge was integrated, 25 now during the charging time T2, the difference between the voltage-dependent charge and the reference charge is integrated. Since the output signal of the integrator 4 always returns to the same potential, the middle charge during the charging time TA must be the same as the charge during the discharge time T2. Since the corresponding charges 30 are proportional to the frequency of occurrence of the charging operations and thus to the time of the respective charging phases, and the charges due to the constant capacitance are proportional to the voltage, thus valid

II

35 5 ο Γ 'ι / 4 nl T1 - T2 u nl T1 - T2 = Uref 5 where ηχ = number of positive beats and n2 = number of negative beats.

Thus, the switching ratio at the output of flip-flop 7 is proportional to the ratio U / Ure £. Thus, modulator 1 operates by the delta-sigma method, as also described in EP-A2-0 084 353.

The second part of the multiplier 2, framed by a broken line, will now be described in the following.

The current I as the second input variable generates a voltage Uj proportional to the resistor 9. The operational amplifier 13 15 is connected as a voltage follower, i.e. its output is connected directly back to the inverting input. The non-inverting input of the operational amplifier 13 can optionally be connected to this voltage Uj or to the first terminal of the capacitor 23 via the changeover switch 13. The inverting input of the operative amplifier 13 can be connected via a capacitor 14 and a changeover switch 15 to an optional reference potential or a non-inverting input.

The first terminal of the capacitor 23 can optionally be connected to the inverting input or reference potential of the operational amplifier 17 via the switch 21 25 and the changeover switch 19. The second terminal of the capacitor 23 can optionally be connected to the reference potential via the changeover switch 22 or to the second terminal 30 of the second changeover switch 20. The toggle switch 20 connects this connector to either the inverting input of the operational amplifier 17 or to the reference potential. The output of the operational amplifier 17 is connected via a capacitor 18 to its inverting input and directly to the inverting input of the comparator 26. The non-inverted input of the comparator 26 is connected to the reference voltage U f. The output of the comparator 26 is connected to 6 Qn-w. 4 to the input of the D-flip-flop 27, the synchronous input of which is controlled by the synchronous generator 8. The output of the D-flip-flop 27 controls the toggle switch 24. This connects the terminal of the capacitor 25 to the reference voltage when the output signal of the D-flip-flop 27 is "0" or to the inverting input of the operating amplifier 20 when this output signal is "1". The second pole of the capacitor 25 is in the blood at the beauty potential.

To describe the operation of the circuit, it is first assumed that the output signals of the clock generator 8 and the D-flip-flop 27 are 10 "0" and thus all the switches are in their positions shown.

In this case, the capacitor 14 is charged via a changeover switch 16, an operational amplifier 13 and a changeover switch 15 to a charge proportional to the current I. The capacitor 23 is still charged with a current proportional to the current I from the previous synchronous phase and passes this to the capacitor 18 via switches 19, 21, 22, 20 and the operational amplifier 17. In this case the position of the changeover switches 19 and 20, i.e. the output signal of the modulator 1, charge in the positive or nega-20 dense direction. From its time average, the integrated charge is then proportional to the input of current I and voltage U.

In the next synchronous step, the changeover switches 15, 16 and 22 and the switch 21 change their position. In this case, the charge of the capacitor 25 is transferred to the capacitor 23 so that it again has a charge proportional to the current I. This event repeats itself periodically.

When, after a series of synchronous steps, the output voltage of the operational amplifier 17 reaches the response threshold of the comparator 26, and in the next synchronous phase the output signal of the D-flip-flop 24 changes, the changeover switch 24 switches the capacitor 25 previously charged to the reference voltage Uref.

The capacitor 25 is dimensioned so that its charge is always greater than the charge I brought by the capacitor 23! 7 ° Γ ^ / 4 so that the capacitor 18 always discharges by a certain amount. Thereafter, the capacitor 18 is charged again through the capacitor 23. In this case, the amount of charge transferred during one cycle must be equal to the discharged charge amount Qr. The derived charge rate is proportional to the current I and the difference between the positive and negative stroke lengths

niTl - n2T2 = T

It follows that 10 T · I = Q

and thus the output frequency fA of the flip-flop 27 is time averaged

15 f »- L

0;

The output frequency of the flip-flop 27 is thus directly proportional to the work done. When these output pulses are summed, a measure of the electrical power is obtained directly.

Thus, it was shown that with the solution according to the invention, the electrical power can be determined without the resistors in the measuring circuit. The presented circuit can thus be realized simply and without problems related to temperature stability as an integrated circuit.

Claims (5)

An electronic electricity meter having a time division multiplier (1,2) for a first and a second si-5 input variable (U, I), the first input variable (U) being derived to a modulator acting as a component of the multiplier (1,2) (1) and a sequential quantizer (3) of the multiplier (1,2), which operates by a charge compensation method and is implemented by an integrator (17,18) and a comparator (26) connected thereto, characterized in that the multiplier (1, 2) and the quantizer (3) has the following characteristics: a) during each first synchronous phase of the synchronous generator (8), a capacitor (23) is connected to the input of the integrator 15 (17,18), b) during each second synchronous phase of the synchronous generator (8) (23) is charged to the second input variable I with a proportional charge, c) the polarity at which the capacitor (23) is connected to the input of the integrator (17) is determined by the delta-sigma method, so d) the capacitor (25) is charged with a reference charge when the output of the quantizer (3) is "0" and connected to the input of the integrator (17,18) when the output of the quantizer (3) is " 1 ", and e) a flip-flop (27) controlled by a synchronous generator (8) is connected to the rear of the comparator (26), the output of which forms the output of the quantizer (3). Electronic electricity meter according to claim 1, having a modulator (1) operating by the delta-sigma method, characterized in that the modulator (1) has the following characteristics: a) a capacitor (11) during each first phase 35 of the synchronous generator (8); ) is charged to a voltage proportional to the first input quantity U 9 0 Γ Ί / 4 and a capacitor (30) to a reference voltage whose polarity depends on the output signal of the modulator (1), b) during each second synchronous phase the capacitors 5 (11,30) are connected to the parallel integrator a output consisting of an operational amplifier (4) with a capacitor (5) in the feedback branch, c) the output of the integrator (4,5) is connected to a comparator (6) followed by a synchronously controlled memory means (7) whose synchronous input is a synchronous generator 36) controls, and d) the output of the synchronously controlled memory means (7) forms a modulator (1 ) output. Electronic electricity meter 15 according to Claim 1 or 2, characterized in that during the first synchronous phase of the synchronous generator (8) a voltage proportional to the second input variable (I) is charged via an operational amplifier (13) in the voltage-follower circuit to a capacitor (14). 20 charges the capacitor (23). Electronic electricity meter according to Claim 3, characterized in that the gain of the second input variable (I) is provided such that the capacitor 25 (14) charged via the operational amplifier (13) has a higher capacitance than the capacitor (23). Electronic electricity meter according to one of Claims 1 to 4, characterized in that all reference charges are taken from the reference voltage source <Uref) * ίο c '* / 4