EP4373214A1

EP4373214A1 - Output of multibit data for integrated circuits

Info

Publication number: EP4373214A1
Application number: EP22207456.9A
Authority: EP
Inventors: Fabio Romano; Clemens KUCERA; Stefan Stark
Original assignee: Tridonic GmbH and Co KG
Current assignee: Tridonic GmbH and Co KG
Priority date: 2022-11-15
Filing date: 2022-11-15
Publication date: 2024-05-22

Abstract

An integrated circuit (2) comprises a register (11) configured to store data comprising plural data bits (9), and a data interface (10) configured to output the data (6) comprising plural data bits. The data interface comprises data converting means (7) configured to convert the data comprising plural data bits (9) into one of an analogue voltage value (6) or a pulse-width modulated output signal (fig. 3. 26) or a digital data stream (fig. 4: 36). The data interface () 10is configured to provide the analogue voltage value (6), or the pulse-width modulated output signal (fig. 3: 26) or the digital data stream (fig. 3: 36), continuously at an output connection (4) of the data interface.

The data interface (10) may comprise a digital-to-analogue converter circuit (7) of the data converting means configured to convert the data comprising plural data bits (9) into the analogue value (6). The data interface may comprise in the data converting means a pulse-width modulating circuit (fig. 2: 20) configured to generate a pulse-width modulated output signal (fig. 2: 26) based on the data comprising plural data bits stored in the register (11). The data interface may comprise in the data converting means a converter circuit (fig. 4: 37) configured to generate a synchronized data stream (fig. 4: 36) including a sequence of bits (fig. 4. 36) based on the data comprising plural data bits (9) stored in the register (11).

Description

The invention concerns the fields of digital data communication and of integrated circuits. In particular, an integrated circuit, a method for outputting multibit data from the integrated circuits and a respective system particularly adapted for the field of building automation systems and lighting systems is presented.
In the field of building automation systems and lighting systems, electronic devices that drive actuators and lighting modules by generating and providing load currents based on switched mode power supply (SMPS) technology and control loops for regulating the load current are fielded in large numbers.
The electronic devices include electronic circuits, which regularly include one or a plurality of integrated circuits. Integrated circuits (IC), sometimes referred to as a microchip or microchip dies, is a set of electronic circuits integrated on one small piece of semiconductor material, hence the term "chip". The semiconductor material maybe silicon, for example.
The plural ICs of the electronic circuit arranged on a printed circuit board (PCB) may include one or plural standardized ICs, e.g. from a family of ICs available from a multitude of manufacturers, and application specific integrated circuits (ASICs) designed, adapted and possibly manufactured for one specific application. Standardized ICs may include, e.g., microcontroller (µC) and microprocessor circuits.
In ICs, digital data is generated and processed. ICs may also generate and process analogue signals. The generated and processed analogue signals, which may, for example, include measured parameter values, e.g. temperature values of temperature sensors arranged integrally with the IC.
Digital data may include binary data including single bits, which may be communicated from one ICs via a single output pin to one other or to a plurality of other ICs via their respective input pin(s).
In case of the digital data including a plurality of bits (multibit data), e.g. the data including a measured parameter value digitized with a bit length of 10 bit, transmitting the digital data from the IC to another IC is more complex. Current approaches stores the data in a register of the IC, and transmit the data via a bus system on a request from the at least one other IC to the requesting other IC.
A register is a memory for storing data in an IC, which usually has a small memory size, e.g. for storing a small of amount of data bits, and is quickly accessible, e.g., having very short times for writing the amount of data bits into the register and reading the amount of data bits from the register.
In the context of transmitting digital data between ICs, the bus systems for transmitting data between ICs currently base on protocols that define the Inter-Integrated Circuit interface (I²C) and the Serial Peripheral Interface (SPI).
The SPI interface is a synchronous serial communication interface specification used for short-distance communication, e.g. for use in embedded systems including plural devices. SPI provides communication in full duplex mode using a master-slave architecture usually with a single master. Some devices support changing roles on the fly depending on an external (SS) pin. The master (controller) device provides a frame for reading and writing. SPI may provide support for multiple slave devices by selecting with individual chip select (CS) signals, sometimes called slave select (SS) lines.
Interfaces for communication according to I²C interfaces, sometimes known as I2C or IIC, are synchronous, multi-controller/multi-target (controller/target), packet-switched, single-ended, serial communication bus interfaces that are widely used for attaching lower-speed peripheral ICs to processors and microcontrollers in a short-distance, intra-board communication. Using PC interfaces enables transmitting data from one PCB to other PCBs, and therefore offers extended transmission distances compared with SPI. The I²C interface, however, offers low transmission speeds, and increases power consumption compared with the SPI interface protocol.
Accessing data values, which exceed a single binary bit stored in a register of one IC from another IC via the I²C or SPI interface results in a delay time until the requested data is available at the requesting IC for processing. The delay time may result in problems during further processing of the received digital data at the requesting IC. Implementing real time processing for electronic circuits, which include a plurality of ICs and require availability of data to another IC in real time using I²C or SPI is difficult or even impossible. Nevertheless, building automation and lighting systems may benefit from control loops and parameter monitoring implemented based on real time availability of digital data including plural bits.
Thus, current concepts for transmitting multibit data from one IC to other electronic circuits with low time delays may be subject to improvement.
An integrated circuit according to the first aspect, a system according to the second aspect, and the method for outputting data from the integrated circuit according to the third aspect provide advantageous solutions to the aforementioned problem.
A closed control loop may be implemented using a microcontroller arranged separately from an integrated circuit that includes the parts of the control loop close to the manipulated variables of the control loop, in particular including sensor circuits and control actuating circuits of the closed control loop. The microcontroller implements the controller of the control loop. The low transmission delay and fast transmission rate for digital data between the microcontroller and the integrated circuit enables stable a fast control characteristics for the selected structure of the control loop.
Detecting failures and debugging, e.g. during a design phase of electronic circuitry, or testing during manufacturing and installing electronic devices including integrated circuits is simplified, or even enabled. Internal parameters of the integrated circuit stored in digital values of an internal register integrated circuit externally available for an analysis, with low time delay and fast.
Accessing internal data for the integrated circuit, in particular fast accessing internal data of the integrated circuit in real time, provides extended possibility for analysis, e.g. statistical analysis that may use statistical measures such as standard deviation.
The dependent claims define further advantageous embodiments.
According to the first aspect, the integrated circuit comprises a register configured to store data comprising plural data bits, and a data interface configured to output the data comprising plural data bits. The data interface comprises data converting means configured to convert the data comprising plural data bits into one of an analogue voltage value or a pulse-width modulated output signal or a digital data stream. The data interface is configured to provide the analogue voltage value, or the pulse-width modulated output signal, or the digital data stream, continuously at an output connection of the data interface.
The integrated circuit according to the first aspect overcomes the problem of introducing a time delay inherent in common solutions of transmitting multibit data via current bus systems in response to a request. The data comprising plural data bits stored in the register of the integrated circuit is continuously available from an exterior of the integrated circuit.
The integrated circuit according to the first aspect provides a significantly increased data rate for communicating data from one integrated circuit to another integrated circuit compared with the conventional approach of relying on the protocols of the I²C interface and the SPI interface.
Although providing a fast data transmission capability for a digital data including plural bits, the integrated circuit according to the first aspect does not require a plurality of pins for a parallel digital data transmission. The number of pins available in packages of small form factors is restricted. Thus, the integrated circuit according to the first aspect combines low transmission delays desirable a transmission between integrated circuits with a dense circuit design and restricted packages sizes.
Continuously providing the digital data at an output pin of the integrated circuit according to the first aspect yields the additional benefit that via the output pin, a time sequence of the digital data (chronological sequence, time course) of the digital data is accessible from exterior of the integrated circuit. Contrary thereto, the conventional interface based on the bus system has the digital data concerning an internal parameter value of the integrated circuit only accessible for a particular point in time of the request for data.
The integrated circuit according to an embodiment has the data interface comprising a digital-to-analogue converter (DAC) circuit configured to convert the data comprising plural data bits into the analogue voltage value. The data interface is configured to provide the analogue voltage value continuously at the output connection of the data interface.
A DAC circuit frequently forms an integral part of integrated circuits. Using the DAC circuit for converting the digital data comprising plural data bits into a single analogue voltage value continuously available from externally offers therefore a cost effective solution to implement a fast data output of an internal parameter value.
In an embodiment of the integrated circuit, the data comprising plural data bits includes a measured parameter value, which is generated based on an analogue value by an analogue-to digital converter (ADC) circuit of the integrated circuit.
ADC circuits frequently from part of a measurement circuit, e.g. a temperature sensor that provides a digital value that corresponds to a sensed temperature. The integrated circuit according to the first aspect may provide the digital value provided by the conventional temperature sensor continuously in form of a corresponding analogue voltage value at a single connection, e.g. a pin or pad of an electric interface of the integrated circuit for further processing, e.g. generating temperature profiles.
The connection 4 may include either pins or pads. The terms pins and pads may be used interchangeably denoting corresponding structural elements performing a same function, however having different physical forms.
The analogue voltage value in an embodiment of the integrated circuit is an analogue voltage in a voltage range from 0 V to 3 V.
The voltage range between 0 V and 3 V may be input without further conversion or adjustment to analogue inputs of other integrated circuits. Thus, a fast and cost-efficient transmission of digital data comprising plural data bits is achieved.
According to an embodiment of the integrated circuit, the data interface comprises a pulse-width modulating (PWM) circuit configured to generate the pulse-width modulated output signal based on the data comprising plural data bits stored in the register. The data interface is configured to output the pulse-width modulated output signal via the output connection of the data interface.
The pulse-width modulated output signal may be output via a single connection of the interface circuit of the integrated circuit according to the first aspect and includes in a duty cycle of the pulse-width modulated output signal a value that corresponds to the digital data including the plural data bits. Thus, a fast output of the digital data is achieved. A low-pass filtering of the pulse-width modulated output signal may provide a simple and cost-efficient means for demodulating the pulse-width modulated output signal, in order to obtain an analogue value corresponding to the digital data stored in the register of the integrated circuit.
The integrated circuit may include the data interface comprising a converter circuit configured to generate a synchronized data stream including a sequence of bits based on the data comprising plural data bits stored in the register. The data interface is configured to output the synchronized data stream at the output connection of the data interface.
The digital data stream provides the digital data stored in the register via single output connection to the exterior of the integrated circuit. The time delay for outputting the data is reduced compared to protocols of the I²C interface and the SPI interface of conventional bus systems.
The integrated circuit may form part of a building automation device, in particular of a light driver for driving at least one lighting module.
Driver devices for driving actuators of building automation systems and lighting modules regularly use integrated circuits of various types for implementing control loops for driver currents (load currents), output voltages, and also include temperature sensors for monitoring device temperatures. A fast transmission of digital data representative for measured parameters including without significant time delay between different integrated circuits forming the driver device is at least advantageous for designing, e.g., temperature monitoring circuits or current control loops, with a reliable, stable, and fast circuit behaviour. The integrated circuit according to the first aspect provides a capability for outputting multibit data, which may provide a basis for electronic circuits with exactly these characteristics.
The integrated circuit may be an application-specific integrated circuit (ASIC).
The integrated circuit according to one embodiment includes the data comprising plural data bits including an internal parameter value generated in the integrated circuit. The internal parameter value generated in the integrated circuit may in particular include at least one of a temperature value provided by at least one temperature sensor of the integrated circuit, a current value measured by at least one current sensor of the integrated circuit, and a voltage value measured by at least one current sensor of the integrated circuit.
The data comprising plural data bits may include a control output parameter value of a control loop, which is implemented including the integrated circuit according to one embodiment.
Thus, a control loop with high stability and fast response times maybe implemented.
According to the second aspect, the system for transmitting data comprising plural data bits comprises the integrated circuit according to the first aspect, and at least one of another integrated circuit and an electronic device. The data interface of the integrated circuit is configured to transmit the data comprising plural data bits to the at least one of the other integrated circuit and the electronic device.
The system provides a data communication capability between integrated circuits that communicates via a single connection of an interface a digital data comprising plural data bits (binary data bits) without significant time delay, and with a high data rate.
According to one embodiment of the system, the system further comprises a low-pass filter circuit configured to generate a filter output signal based on the pulse-width modulated signal input to the low-pass filter circuit by the integrated circuit via the connection of the data interface. The at least one of another integrated circuit and an electronic device is configured to process the filter output signal generated by the low-pass filter circuit.
The low-filter filter is a passive electric circuit of low technical complexity and is a cost-efficient, and provides the capability to provide an analogue voltage depending on the duty cycle of the pulse-width modulated signal, thereby conveying the digital data comprising plural data bits of the integrated circuit.
The method for outputting data comprising plural data bits by a data interface of an integrated circuit according to third aspect comprises steps of: storing, in a register of the integrated circuit, the data comprising plural data bits; converting, by a data converting means of the data interface, the data comprising plural data bits into one of an analogue value or a pulse-width modulated output signal or a digital data stream; and outputting continuously, by an output connection of the data interface, the analogue value or the pulse-width modulated output signal or the digital data stream.
Further features and advantages will be apparent from the subsequent and more particular description of embodiments, as illustrated in the accompanying figures, in which

Fig. 1: displays a simplified flowchart of a method for outputting digital data from an integrated circuit according to an embodiment;
Fig. 2: shows a block diagram illustrating structural elements for the data transmission from an integrated circuit to another electronic circuit in a first embodiment;
Fig. 3: displays, in block diagram form, structural elements for the data transmission from an integrated circuit to another electronic circuit in a second embodiment;
Fig. 4: shows a block diagram illustrating structural elements for the data transmission from an integrated circuit to another electronic circuit in a third embodiment; and
Fig. 5: shows a simplified block diagram illustrating structural elements for the data transmission in an application example of a control loop with plural integrated circuits.

Same reference signs in different figures generally refer to same or corresponding parts or elements. The discussion of figures avoids a discussion of same reference signs for different figures wherever deemed possible without adversely affecting comprehensibility in order to achieve a concise description.
In mixed-signal integrated circuits, e.g., microprocessors integrated with A/D and D/A converters, an interface comprising the I/O pins must be able to accommodate not only digital signals, but also analogue signals. According to conventional practice, microcontrollers utilize a first set of I/O pins for digital signals and a second set of I/O pins four analogue signals. Differentiating between types of integrated circuits is well known and established in conventional art in order to separate analogue and digital processing circuits, as well as the I/O pins, because of the significant difference in the respective signal processing circuits, analogue signal processing circuits on the one hand and digital signal processing circuits on the other hand. Digital signal processing circuits operate binary. Binary operated circuits tend to generate noise because of a high-speed transition of digital signal. Due to the generated noise signals adversely affecting analogue circuits, such type of operations are highly undesirable in analogue circuits. Therefore, it is established practice to not only separate digital circuits from analogue circuits in mixed-type electronic circuits, but also to maintain the analogue and digital functions distinct as to the integrated I/O pins.
An analogue signal is a continuous signal representing some other quantity, i.e., analogous to another quantity. For example, in an analogue temperature signal, the instantaneous signal voltage varies continuously with a temperature. The analogue signal
represents continuous values; at any given time, it represents a real number within a continuous range of values.
In contrast, a digital signal represents the original time-varying quantity as
a sampled sequence of quantized values, which imposes some bandwidth and dynamic range constraints on the representation. A digital signal is a signal that represents data as a sequence of discrete values; at any given time, it can only take on, at most, one of a finite number of values.
The digital signal represents information in discrete bands of analogue levels. All levels within a band of values represent the same information state. In most digital circuits, the digital signal can have two possible valid values: such digital signal is a binary signal or logic signal. The binary signal is represented by two voltage bands: e.g., one voltage band near a reference value, typically termed as ground or zero volts, and the other voltage band with a value near the supply voltage of the digital circuit. The voltage bands correspond to the two values "zero" ("false", "LOW") and "one" ("true", "HIGH") of the Boolean domain. At any given time, the binary signal represents one binary digit (bit).
The analogue signal is subject to electronic noise and distortion introduced by a communication path, recording and signal processing operations performed on the analogue signal, which degrade the signal-to-noise ratio (SNR). During transmission or processing of the analogue signal, the noise introduced in the signal path will accumulate, progressively and irreversibly degrading the SNR.
Contrary to the analogue signal, the digital signal, e.g. a binary signal representing one binary digit (bit), because of the discretization, relatively small changes to the instantaneous analogue signal level of the digital signal do not leave the discrete envelope, and as a result are ignored by electronic circuitry sensing the signal state. As a result, the digital signal has noise immunity, e.g., electronic noise, provided the noise level is not to large, will not affect a digital circuit, whereas noise always degrades the analogue signal to some degree.
Converting the analogue signal into a digital signal introduces a low-level quantization noise into the converted signal due to finite resolution of digital systems. Contrary to the analogue signal, transmitting, storing, or processing the digital signal without introducing significant additional noise or distortion degrading the digital signal. Most notably, in digital systems, the degradation of the digital signal is detectable and appropriate means may even correct the degraded signal.
Fig. 1 displays a simplified flowchart of a process including the method steps for outputting data comprising plural data bits according to an embodiment.
The process of fig. 1 uses the example of transmitting a set of data comprising plural data bits, e.g. binary data bits, from a first integrated circuit to a second integrated circuit.
Alternatively or additionally, the data comprising plural data bits maybe transmitted from the first integrated circuit to another electronic device. Another electronic device maybe a measurement device for analysing analogue electric signals. The other electronic device may be an oscilloscope. The other electronic device includes at least one electronic circuit and at least one interface for electrical signals.
The data comprising plural data bits may be a parameter value of an internal parameter in the first integrated circuit.
The process starts by storing in a register of the first integrated circuit, the data comprising plural data bits.
The method of transmitting data comprising plural data bits the data interface of the first integrated starts in step S1 with a step of obtaining the data comprising plural data bits by a data interface of the first integrated circuit.
In subsequent step S2, a data converting means of the data interface of the first integrated circuit converts the data comprising plural data bits into a transmission signal. The transmission signal may include one of an analogue value or a pulse-width modulated output signal or a digital data stream.
Figs. 2, 3 and 4 display specific examples for the data converting means.
The data converting means shown in fig. 2 is an analogue-to digital converter (ADC) circuit, which obtains the data comprising the plural data bits from the register, converts the data comprising plural of data bits into the corresponding analogue value and outputs the analogue value to a connection of the data interface of the first integrated circuit.
The data converting means shown in fig. 3 is a pulse-width modulating (PWM) circuit, which obtains the data comprising the plural data bits from the register, converts the data comprising plural of data bits into the pulse-width modulated output signal and outputs the pulse-width modulated output signal to the connection of the data interface of the first integrated circuit.
The data converting means shown in fig. 4 is a digital-to digital converter (DDC) circuit, which obtains the data comprising the plural data bits from the register, converts the data comprising plural of data bits into the digital data stream and outputs the generated digital data stream to the connection of the data interface of the first integrated circuit.
The method of outputting data proceeds in step S3, in which the output connection of the data interface of the first integrated circuit outputs continuously the transmission signal, in particular the analogue value or the pulse-width modulated output signal or the digital data stream generated in step S2.
Therefore, the data comprising plural data bits (multibit data) is continuously available at a single output connection of the data interface of the first integrated circuit. There may be no request according to a specific system bus protocol by a second integrated circuit, electronic circuit or electronic device required to trigger output of the transmission signal. The output transmission signal, in particular the analogue value or the pulse-width modulated output signal or the digital data stream corresponding to the data comprising plural data bits by the data interface of the first integrated circuit may continuously accessible from the exterior of the first integrated circuit. The output transmission signal may be monitored or recorded or processed by the second integrated circuit without time delay or at least without significant time delay, e.g. introduced by a system bus such as SPI or I2C.
The output connection 4 includes a single pin or a single pad of the data interface 10.
The output connection 4 of the data interface of the first integrated circuit is connected with an input connection of an interface of the second integrated circuit. The output connection of the first integrated circuit may be connected with the input connection of the second integrated circuit via at least one of an electrically conducting wire or a transmission line on a printed circuit board (PCB) on which the first integrated circuit and the second integrated circuit are mounted. The electrical connection of the output connection of the first integrated circuit may be connected with the input connection of the second integrated circuit may include a detachable electrical connection, e.g. a socket and connector combination.
The process of transmitting the data) comprising plural data bits from the first integrated circuit to the second integrated circuit illustrated in fig. 1 proceeds with step S₄. In step S₄, the second integrated circuit obtains the output transmission signal provided via the data interface of the first integrated circuit and the interface of the second electronic circuit.
In step S₅, the second integrated circuit may process the obtained output transmission signal from the first integrated circuit. Thus, the second integrated circuit is enabled to process an internal parameter value of the first integrated circuit without significant time delay.
Processing the obtained output transmission signal by the second integrated circuit may include converting the obtained output transmission signal into a different signal format for further processing. Fig. 2 illustrates an example, in which the second integrated circuit includes a low-pass filter circuit for converting the pulse-width modulated signal obtained from the first integrated circuit into an analogue voltage by smoothening a signal characteristic of the pulse-width modulated signal input to the low-pass filter circuit.
Processing the obtained output transmission signal by the second integrated circuit may include real time processing obtained output transmission signal, e.g. in a microcontroller for implementing a temperature monitoring function for monitoring the device temperature of the first integrated circuit.
Additionally or alternatively, the second integrated circuit 3 may include the microcontroller for implementing a controller of a control loop, which obtains a current value of process variable as the internal parameter from the first integrated circuit 2, as illustrated and discussed with reference to fig. 5.
Fig. 2 shows a block diagram illustrating structural elements for the data transmission in a system 1 from an integrated circuit to another integrated circuit according a first embodiment.
The system 1 for transmitting data that comprises plural data bits transmits the data comprising plural data bits 9 from a first integrated circuit 2 to a second integrated circuit 3.
The second integrated circuit 3 may alternatively be at least one of an electronic circuit, or an electronic device.
The first integrated circuit 2 and the second integrated circuit 3 may include at least one of an ASIC, a microcontroller or an electronic device including at least one electronic circuit.
The first integrated circuit 2 comprises a register 11 configured to store the data comprising plural data bits. The data comprising plural data bits may include a measured parameter value, which an analogue-to digital converter (ADC) circuit of the first integrated circuit 2 not shown in fig. 2 generates based on an analogue value, e.g. an analogue temperature value, and analogue current value or an analogue voltage value.
In a particular example of the first integrated circuit 2, the ADC circuit forms part of a temperature sensor, a current-measuring sensor or a voltage-measuring sensor of the first integrated circuit 2.
Alternatively, the ADC circuit forms part of a temperature sensor, a current-measuring sensor or a voltage-measuring sensor of the first integrated circuit 2 externally and not forming part of the first integrated circuit 2.
The first integrated circuit 2 comprises a data interface 10 configured to output the data comprising plural data bits, which is stored in the register 11. The data interface 10 of the first integrated circuit is configured to transmit the data comprising plural data bits to at least one of the second integrated circuit 3 and the electronic device.
The data interface 10 comprises data converting means configured to convert the data comprising plural data bits into an analogue voltage value 6.
The data interface 10 comprises output connection 4. The output connection 4 of the data interface 10 is configured to provide the analogue voltage value 6 continuously at the output connection 4 of the data interface 10.
The analogue voltage value 6 comprises an analogue value that corresponds to a value of the data comprising plural data bits, which is currently stored in the register 11.
The analogue voltage value 6 may be an analogue voltage in a voltage range from 0 V to 3 V.
The data comprising plural data bits 9 may include an internal parameter value generated in the first integrated circuit 2, in particular at least one of a temperature value provided by at least one temperature sensor of the integrated circuit 2, a current value measured by at least one current sensor of the integrated circuit 2, and a voltage value measured by at least one current sensor of the integrated circuit 2.
The data comprising plural data bits 9 may include a control output parameter value of a control loop.
The second integrated circuit 3 may obtain the analogue voltage value via the connection 4 of the first integrated circuit 2. The analogue voltage value 6 currently present at the output connection 4 of the data interface 10 comprises the analogue value that corresponds to a value of the data comprising plural data bits 9, which is currently stored in the register 11.
In particular, the second integrated circuit 3 may comprise an interface with at least one input connection 5, which is directly electrically connected with the output connection 4 of the data interface 10 of the first integrated circuit 2.
The second integrated circuit 3 may, via the least one input connection 5 and the output connection 4 of the data interface 10 of the first integrated circuit 2, continuously monitor the analogue voltage value 6 currently present at the output connection 4 of the data interface 10.
The analogue voltage value 6 currently present at the output connection 4 corresponds to the analogue value that corresponds to a value of the data comprising plural data bits 9, which is currently stored in the register 11.
Therefore, the system 1 enables to obtain, to monitor, or to record continuously over time the data comprising plural data bits 9, which the register 11 of the first integrated circuit 2 stores without significant time delay for accessing the register 11 and for transferring the stored data comprising plural data bits 9 to the second integrated circuit 3.
Internal register of the first integrated circuit 2 are accessible from external of the integrated circuit 2 via a single output connection 4 of the data interface 10.
The SPI bus system is a synchronous serial communication interface protocol (specification) used for short-distance communication, e.g. in embedded systems. SPI devices communicate in full duplex mode using a master-slave architecture usually with a single master. The master (controller) device originates the frame for reading and writing. Multiple slave-devices may be supported through selection with individual chip select (CS), sometimes called slave select (SS) lines. Thus, the SPI maybe called a four-wire serial bus. The system 1 is significantly less complex than the SPI system bus and provides via a single connection 4 of the first integrated circuit 2 instant and continuous access to the internal register 10 and data comprising plural bits 9 stored in the internal register 11 without time delay.
The I²C system bus is a synchronous, multi-controller/multi-target, packet switched, single-ended, serial communication bus widely used for attaching lower-speed peripheral integrated circuits to processors and microcontrollers for short-distance, intra-board communication. Although I²C enables transmitting data to other PCBs, a transmission speed via the I²C bus system is low and the delay times are less favorable than offered by the system 1 for transmitting data from the first integrated device 2 to the second integrated device 3.
Fig. 3 shows a block diagram illustrating structural elements for a system 1' implementing a data transmission from a first integrated circuit 22 to another integrated circuit 23 according to a second embodiment.
The first integrated circuit comprises a data interface 20, which has a different structure to the data interface 10 of fig. 2.
The data interface 20 includes a PWM circuit 27 configured to generate a pulse-width modulated output signal 26 based on the data comprising plural data bits 9 stored in the register 11 of the first integrated circuit 2.
The data comprising plural data bits 9 representing an internal parameter of the integrated circuit 2 is modelled in a corresponding duty cycle of the a pulse-width modulated output signal 26 generated based on the data comprising plural data bits 9.
The data interface 20 is configured to output the generated pulse-width modulated output signal 26 at the output connection 4 of the data interface 20.
There exist alternative arrangements of the second integrated circuit 23 for obtaining the value of the data comprising plural data bits 9, which is present in the pulse-width modulated output signal 36.
The interface of the second integrated circuit 23 shown in fig. 3 includes a low-pass filter circuit 23 configured to generate a filter output signal 24 based on the pulse-width modulated signal 26 input to the low-pass filter circuit 25 from the first integrated circuit 22 via the input connection 5 of the data interface 25, and the output connection 4 of the data interface 20.
Alternatively, the second integrated circuit 23, in particular the interface circuit 25 of the second integrated circuit 23, may include a receiver circuit not illustrated by a figure, which is configured to process the pulse-width modulated signal 26 received from the first integrated circuit 22 via the input connection 5 of the data interface 25 and the output connection 4 of the data interface 20. The receiver circuit may determine the duty cycle of the pulse-width modulated signal 26 and thereby determine the value of the internal parameter of the integrated circuit 2 that is modelled in the duty cycle of the a pulse-width modulated output signal 26 generated based on the data comprising plural data bits 9.
The pulse-width modulated signal 26 received from the output connection 4 of the first integrated circuit 22 comprises the duty cycle that corresponds to the value of the data comprising plural data bits 9, which is currently stored in the register 11.
Therefore, the system 1 is able to obtain, to monitor, or to record continuously over time the data comprising plural data bits 9, which the register 11 of the first integrated circuit 22 stores without significant time delay for accessing the register 11 and for transferring the stored data comprising plural data bits 9 to the second integrated circuit 23.
Fig. 4 shows a block diagram illustrating structural elements for a system 1" implementing a data transmission from a first integrated circuit 32 to another integrated circuit 33 according to a third embodiment.
The first integrated circuit 32 comprises a data interface 30, which differs in its structure from the data interface 10 of fig. 2 and the data interface 20 of fig. 3.
The data interface 30 comprises a converter circuit 37 configured to generate a synchronized data stream 37 including a sequence of bits based on the data comprising plural data bits 9 stored in the register 11 of the first integrated circuit 32.
The converter circuit 37 corresponds to a DC-to-DC converter circuit. The DC-to-DC converter circuit outputs the synchronized data stream 37, which includes in the bit stream the coded value corresponding to the data comprising plural data bits 9.
The synchronized data stream 37 may comprise synchronisation means that enable a
interface circuit 35 of the second integrated circuit 33 to synchronize on the bit stream and to extract the value encoding the data comprising plural data bits 9
The data interface 30 is configured to output the generated synchronized data stream 36 via the output connection 4 of the data interface 30 to the exterior of the integrated circuit 32.
The synchronized data stream 36 received from the output connection 4 of the first integrated circuit 32 comprises the coded value of the data comprising plural data bits 9, which is currently stored in the register 11.
Therefore, the system 1" is able to obtain, to monitor, or to record continuously over time the data comprising plural data bits 9, which the register 11 of the first integrated circuit 32 stores without significant time delay for accessing the register 11 and for transferring the stored data comprising plural data bits 9 to the second integrated circuit 33.
Fig. 5 shows a simplified block diagram illustrating structural elements for the data transmission in a first application example of a control loop with plural integrated circuits.
The first application example may form part of a light driver device as an example for a building automation system. The light driver device generates and outputs a load current I_LOAD to a lighting module comprising a plurality of light emitting modules (LED). The driver device is configured to control the load current I_LOAD to a preset load current value I_LOAD, _SET. The set load current value may correspond to a dimming value provided by a dimmer or a light control server.
The light driver device may include at least one converter in a switched mode power supply (SMPS) topology for generating the load current I_LOAD as a DC current, e.g. based on a mains power supply grid, and, alternatively or additionally, from a battery or DC emergency supply grid. The at least one converter use may use any SMPS topologies, e.g. a flyback topology, a forward topology, a buck topology, a boost topology, a buck-boost topology, in order to name examples.
The block diagram of fig. 5 illustrates one example of the control loop for controlling the load current I_LOAD and displays the components of the light driver device which contribute to forming the control loop.
The first integrated circuit may be and ASIC including current measurement means configured to measure the load current I_LOAD and to provide a digital value corresponding to the analogue current value of the load current I_LOAD by using an ADC circuit. The digital value of measured load current obtained in the integrated circuit may form a process value (PV) of a control loop for controlling the load current I_LOAD.
The load current I_LOAD represents the manipulated variable (MV) in the control loop of fig. 5.
The second integrated circuit in the example of fig. 5 includes a microcontroller. The microcontroller is arranged separately and remote from the ASIC and implements a controller of the control loop. The microcontroller requires an actual value of the load current I_LOAD as the process value (PV) of the control loop as input variable for the controller of the control loop.
The microcontroller implementing the controller of the control loop and separate from the integrated circuit calculates a current controller output (CO) based on the obtained current value of the load current I_LOAD as the process value (PV) and based on the preset load current value I_LOAD, _SET . The microcontroller provides the calculated controller output CO to the first integrated circuit, in particular the ASIC, for adapting the manipulated variable MV according to the calculated controller output CO.
A limited data rate and, in particular a time delay introduced by a conventional transmission of the digital value of measured load current I_LOAD via a bus system, e.g. SPI or I²C, might affect or even avoid a designing a stable, and a fast current control via the control loop including the ASIC and the microcontroller. Contrary thereto, the data interface of the first integrated circuit or ASIC provides the current digital value of measured load current I_LOAD without significant time delay in real time for the second integrated circuit or microcontroller. This enables using the ASIC and the microcontroller for implementing a fast and stable control loop for the load current I_LOAD.
Additionally or alternatively, and different to the example shown in fig. 5, the microcontroller may include a data interface configured to output the calculated current controller output CO as data comprising plural data bits to the ASIC.
The data interface of the microcontroller may comprise data converting means configured to convert the current controller output CO as data comprising plural data bits into one of an analogue voltage value or a pulse-width modulated output signal or a digital data stream. and The data interface of the microcontroller may then provide the analogue voltage value, the pulse-width modulated output signal, or the digital data stream, continuously at an output connection of the data interface of the microcontroller.
Thus, corresponding advantages for transmitting the calculated current controller output CO to the ASIC for adapting the manipulated variable MV based on the current controller output CO are achievable. The current controller output CO for adapting the current digital value of measured load current I_LOAD is available at the ASIC without additional time delay, e.g. due to transmission from the microcontroller to the ASIC. This enables using the ASIC and the microcontroller for implementing a fast and stable control loop for the load current I_LOAD.
For monitoring a stability of the current control loop implemented using the integrated circuits, the embodiment provides improved values for the manipulated variable MV of the current control loop. The conventional approach only provides instantaneous values for the output current I_LOAD in the integrated circuit, which are updated every 2ms in an example of a currently available, exemplary light driver device. Analyzing and judging the stability of the control loop from the exterior of the integrated circuit is therefore at least difficult if not impossible in the conventional approach. Contrary thereto, the data including plural bits as the manipulated variable MV, in particular the current value of the load current I_LOAD stored in the register is immediately accessible from the exterior of the ASIC for inspection by a design engineer, or perhaps even more advantageous, for recording
The exemplary first application integrates the method for outputting data comprising plural data bits in a control loop for controlling the load current I_LOAD output by a light driver device. The data comprising plural data bits is a measured parameter value for the load current I_LOAD.
Alternatively or additionally to the control loop for controlling the load current I_LOAD, a control loop for controlling a voltage U_OUT generated and output by the light driver device may be implemented in the light driver device. In that case, the data comprising plural data bits may correspond to a measured parameter value for the voltage U_OUT for the control loop controlling the voltage U_OUT. The first integrated circuit, e.g. the ASIC, may then use the data interface to provide the data comprising plural data bits, e.g. the measured voltage U_OUT to the second integrated circuit, e.g. the microcontroller in a corresponding manner to the output current I_LOAD as the data comprising plural data bits.
Another advantageous application of the integrated circuit may concern the start-up phase of an electronic device.
Accelerating the start-up phase of an electronic device that provides a drive current to a load, e.g. a light driver providing the load current I_LOAD (LED current) to at least one lighting module, may require determining the time at which the load begins actually conducting a current. The first integrated circuit may be configured to measure the output voltage U_OUT of the electronic device driving the at least one lighting module, and to provide the value to a the second integrated circuit, e.g. a microprocessor for determining the first derivative $\frac{{dU}_{out}}{dt}$
in order to determine the time at which the load actually starts to draw the load current load current I_LOAD. However, the conventional layout does suffer from problems when attempting to calculate the derivative of the load current I_LOAD at the second integrated circuit, e.g. the microcontroller, based on measured voltage data from the first integrated circuit, which is arranged remote from the integrated circuit and only available after transmission via a conventional bus system at the second integrated circuit.
A sample rate of the measured voltage data provided by an AD converter of the first integrated circuit via a bus system may vary, which has the effect of variations in the term dt in the expression (1) calculated in the second integrated circuit or microprocessor arranged separate from the first integrated circuit. This may result either from different registers set by the microcontroller, or from time delays introduced by transferring the data of the measured voltage via the bus system from the first integrated circuit to the second integrated circuit. A variation in dU_OUT may occur due to the integrated circuit only providing averaged values for the term dU_OUT in expression (1).
The first integrated circuit according to the embodiment enables to provide analogue values representative for the measured voltage data provided by the AD converter of the integrated circuit without significant time delay and with a high accuracy with regard to variations of dU_OUT. Therefore, the microcontroller may calculate the first derivative according to expression (1) without significant time delay and with increased accuracy when compared to a circuit design including data transmission between integrated circuits using conventional bus systems. The integrated circuit according to the discussed embodiments enables an efficient implementation of algorithms for accelerating the start-up phase of an electronic device, and offers therefore advantageous options for the circuit design of electronic devices.

Claims

Integrated circuit, comprising
a register (11) configured to store data comprising plural data bits (9), and

a data interface (10, 20, 30) configured to output the data comprising plural data bits (9),

wherein the data interface (10, 20, 30) comprises data converting means (7, 27, 37) configured to convert the data comprising plural data bits (9) into one of an analogue voltage value (6) or a pulse-width modulated output signal (26) or a digital data stream (36), and

the data interface (10, 20, 30) is configured to provide the analogue voltage value (6), the pulse-width modulated output signal (26) or the digital data stream (36), continuously at an output connection (4) of the data interface (10, 20, 30).
The integrated circuit according to claim 1, wherein
the data interface (10) comprises

a digital-to-analogue converter circuit (7) configured to convert the data comprising plural data bits (9) into the analogue voltage value (6), and

the data interface (10) is configured to provide the analogue voltage value (6) continuously at the output connection of the data interface (10).
The integrated circuit according to claim 1 or 2, wherein
the data comprising plural data bits (9) includes a measured parameter value, which is generated based on an analogue value by an analogue-to digital converter circuit of the integrated circuit (2).
The integrated circuit according to any of the preceding claims, wherein
the analogue voltage value (6) is an analogue voltage in a range from 0 V to 3 V.
The integrated circuit according to claim 1, wherein
the data interface (20) comprises a pulse-width modulating circuit (27) configured to generate the pulse-width modulated output signal (26) based on the data comprising plural data bits (9) stored in the register (11), and

the data interface (20) is configured to output the pulse-width modulated output signal (26) at the output connection (4) of the data interface (20).
The integrated circuit according to claim 1, wherein
the data interface (30) comprises a converter circuit (37) configured to generate a synchronized data stream (36) including a sequence of bits based on the data comprising plural data bits (9) stored in the register (11), and

the data interface (30) is configured to output the synchronized data stream (36) at the output connection (4) of the data interface (30).
The integrated circuit according to according to any one of the preceding claims, wherein
the integrated circuit (2, 22, 32) is part of a building automation device, in particular of a light driver device for driving at least one lighting module.
The integrated circuit according to any one of the preceding claims, wherein
the integrated circuit (2, 22, 32) is an application-specific integrated circuit ASIC.
The integrated circuit according to any one of the preceding claims, wherein
the data comprising plural data bits (9) includes an internal parameter value generated in the integrated circuit (10, 20, 30), in particular at least one of

a temperature value provided by at least one temperature sensor of the integrated circuit,

a current value measured by at least one current sensor of the integrated circuit (10, 20, 30), and a

a voltage value measured by at least one current sensor of the integrated circuit (10, 20 30).
The integrated circuit according to any one of the preceding claims, wherein
the data comprising plural data bits (9) includes an a control output parameter value (CO) of a control loop.
System for transmitting data comprising plural data bits, wherein the system comprises
the integrated circuit (2, 22, 32) according to one of claims 1 to 10, and

at least one of another integrated circuit (3, 23, 33) and an electronic device,

wherein the data interface (10, 20, 30) of the integrated circuit (3, 23, 32) is configured to transmit the data comprising plural data bits (9) to the at least one of the other integrated circuit (3, 23, 33) and the electronic device.
The system according to claim 11, the system further comprising
a low-pass filter circuit (R, C) configured to generate a filter output signal (24) based on the pulse-width modulated signal (26) input to the low-pass filter circuit (R, C) from the integrated circuit (2, 22, 32) via the connection (4) of the data interface (10, 20, 30), and

wherein the at least one of another integrated circuit (3, 23, 33) and an electronic device is configured to process the filter output signal (24) generated by the low-pass filter circuit (R, C).
Method for outputting data comprising plural data bits (9) by a data interface (10, 20, 30) of an integrated circuit (2, 22, 32), the method comprising steps of
storing, in a register (11) of the integrated circuit (2, 22, 32), the data comprising plural data bits (9),

converting (S2), by a data converting means (7, 27, 37) of the data interface (10, 20 30), the data comprising plural data bits (9) into one of an analogue value (6) or a pulse-width modulated output signal (26) or a digital data stream (36),

outputting continuously (S₃), by an output connection (4) of the data interface (10, 20, 30), the analogue value (6) or the pulse-width modulated output signal (26) or the digital data stream (36).