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EP3924822A4 - Directed interrupt virtualization with blocking indicator - Google Patents

Directed interrupt virtualization with blocking indicator Download PDF

Info

Publication number
EP3924822A4
EP3924822A4 EP20754921.3A EP20754921A EP3924822A4 EP 3924822 A4 EP3924822 A4 EP 3924822A4 EP 20754921 A EP20754921 A EP 20754921A EP 3924822 A4 EP3924822 A4 EP 3924822A4
Authority
EP
European Patent Office
Prior art keywords
directed interrupt
blocking indicator
interrupt virtualization
virtualization
indicator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20754921.3A
Other languages
German (de)
French (fr)
Other versions
EP3924822A1 (en
Inventor
Christoph Raisch
Marco Kraemer
Donald Schmidt
Bernd Nerz
Sascha Junghans
Peter Driever
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP3924822A1 publication Critical patent/EP3924822A1/en
Publication of EP3924822A4 publication Critical patent/EP3924822A4/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1009Address translation using page tables, e.g. page table structures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10Address translation
    • G06F12/1027Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/45579I/O management, e.g. providing access to device drivers or storage
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/152Virtualized environment, e.g. logically partitioned system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15Use in a specific computing environment
    • G06F2212/154Networked environment

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
EP20754921.3A 2019-02-14 2020-01-23 Directed interrupt virtualization with blocking indicator Pending EP3924822A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP19157102 2019-02-14
PCT/IB2020/050517 WO2020165666A1 (en) 2019-02-14 2020-01-23 Directed interrupt virtualization with blocking indicator

Publications (2)

Publication Number Publication Date
EP3924822A1 EP3924822A1 (en) 2021-12-22
EP3924822A4 true EP3924822A4 (en) 2022-11-23

Family

ID=65440830

Family Applications (1)

Application Number Title Priority Date Filing Date
EP20754921.3A Pending EP3924822A4 (en) 2019-02-14 2020-01-23 Directed interrupt virtualization with blocking indicator

Country Status (5)

Country Link
US (1) US11023398B2 (en)
EP (1) EP3924822A4 (en)
JP (1) JP7448550B2 (en)
CN (1) CN113454591A (en)
WO (1) WO2020165666A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI727607B (en) 2019-02-14 2021-05-11 美商萬國商業機器公司 Method, computer system and computer program product for directed interrupt virtualization with interrupt table
CN113424150A (en) 2019-02-14 2021-09-21 国际商业机器公司 Directed interrupt virtualization with run indicator
WO2020164820A1 (en) 2019-02-14 2020-08-20 International Business Machines Corporation Directed interrupt virtualization
JP7459119B2 (en) 2019-02-14 2024-04-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Directed interrupt methods, systems and programs for multi-level virtualization using interrupt tables
TWI764082B (en) 2019-02-14 2022-05-11 美商萬國商業機器公司 Method, computer system and computer program product for interrupt signaling for directed interrupt virtualization
TWI759677B (en) 2019-02-14 2022-04-01 美商萬國商業機器公司 Method, computer system and computer program product for directed interrupt virtualization with fallback
CN113454589A (en) 2019-02-14 2021-09-28 国际商业机器公司 Directed interrupts for multi-level virtualization

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US20100191885A1 (en) * 2009-01-26 2010-07-29 Serebrin Benjamin C Guest Interrupt Controllers for Each Processor to Aid Interrupt Virtualization
US20120331467A1 (en) * 2005-12-30 2012-12-27 Gilbert Neiger Delivering Interrupts Directly To A Virtual Processor
US20140047149A1 (en) * 2012-08-09 2014-02-13 Bryan D. Marietta Interrupt Priority Management Using Partition-Based Priority Blocking Processor Registers
US20160077848A1 (en) * 2014-09-16 2016-03-17 Industrial Technology Research Institute Method and system for handling interrupts in a virtualized environment
US20160117190A1 (en) * 2014-10-28 2016-04-28 Intel Corporation Virtual Processor Direct Interrupt Delivery Mechanism
US20160147679A1 (en) * 2014-11-25 2016-05-26 Intel Corporation Posted interrupt architecture
US20170060624A1 (en) * 2015-08-26 2017-03-02 Netapp, Inc. Migration Between CPU Cores

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TWI759677B (en) 2019-02-14 2022-04-01 美商萬國商業機器公司 Method, computer system and computer program product for directed interrupt virtualization with fallback
WO2020164820A1 (en) 2019-02-14 2020-08-20 International Business Machines Corporation Directed interrupt virtualization
CN113454589A (en) 2019-02-14 2021-09-28 国际商业机器公司 Directed interrupts for multi-level virtualization
JP7459119B2 (en) 2019-02-14 2024-04-01 インターナショナル・ビジネス・マシーンズ・コーポレーション Directed interrupt methods, systems and programs for multi-level virtualization using interrupt tables
TWI764082B (en) 2019-02-14 2022-05-11 美商萬國商業機器公司 Method, computer system and computer program product for interrupt signaling for directed interrupt virtualization
CN113424150A (en) 2019-02-14 2021-09-21 国际商业机器公司 Directed interrupt virtualization with run indicator

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120331467A1 (en) * 2005-12-30 2012-12-27 Gilbert Neiger Delivering Interrupts Directly To A Virtual Processor
US20100049892A1 (en) * 2008-08-19 2010-02-25 Stmicroelectronics Rousset Sas Method of routing an interrupt signal directly to a virtual processing unit in a system with one or more physical processing units
US20100191885A1 (en) * 2009-01-26 2010-07-29 Serebrin Benjamin C Guest Interrupt Controllers for Each Processor to Aid Interrupt Virtualization
US20140047149A1 (en) * 2012-08-09 2014-02-13 Bryan D. Marietta Interrupt Priority Management Using Partition-Based Priority Blocking Processor Registers
US20160077848A1 (en) * 2014-09-16 2016-03-17 Industrial Technology Research Institute Method and system for handling interrupts in a virtualized environment
US20160117190A1 (en) * 2014-10-28 2016-04-28 Intel Corporation Virtual Processor Direct Interrupt Delivery Mechanism
US20160147679A1 (en) * 2014-11-25 2016-05-26 Intel Corporation Posted interrupt architecture
US20170060624A1 (en) * 2015-08-26 2017-03-02 Netapp, Inc. Migration Between CPU Cores

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Title
See also references of WO2020165666A1 *

Also Published As

Publication number Publication date
WO2020165666A1 (en) 2020-08-20
JP7448550B2 (en) 2024-03-12
CN113454591A (en) 2021-09-28
JP2022520330A (en) 2022-03-30
US11023398B2 (en) 2021-06-01
EP3924822A1 (en) 2021-12-22
US20200264995A1 (en) 2020-08-20

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