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EP1665408A2 - Procede pour produire des composants electroniques - Google Patents

Procede pour produire des composants electroniques

Info

Publication number
EP1665408A2
EP1665408A2 EP04764691A EP04764691A EP1665408A2 EP 1665408 A2 EP1665408 A2 EP 1665408A2 EP 04764691 A EP04764691 A EP 04764691A EP 04764691 A EP04764691 A EP 04764691A EP 1665408 A2 EP1665408 A2 EP 1665408A2
Authority
EP
European Patent Office
Prior art keywords
substrate
photoresist
electrodes
electronic components
metal layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04764691A
Other languages
German (de)
English (en)
Inventor
Theodor Doll
Susanne Scheinert
Axel Scherer
Gernot Paasch
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Cufer Asset Ltd LLC
Original Assignee
Technische Universitaet Ilmenau
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technische Universitaet Ilmenau filed Critical Technische Universitaet Ilmenau
Publication of EP1665408A2 publication Critical patent/EP1665408A2/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/621Providing a shape to conductive layers, e.g. patterning or selective deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/466Lateral bottom-gate IGFETs comprising only a single gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0272Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers for lift-off processes

Definitions

  • the invention relates to several methods for the production of electronic components with closely adjacent electrodes with distances in the range from a few 10 nm to a few ⁇ on any substrate which, in addition to substrates of standard semiconductor technology (for example Si, Si0 2 , Si 3 N 4 , GaAs, A1 2 0 3 ) can also be a polymer film or glass.
  • substrates of standard semiconductor technology for example Si, Si0 2 , Si 3 N 4 , GaAs, A1 2 0 3
  • substrates of standard semiconductor technology for example Si, Si0 2 , Si 3 N 4 , GaAs, A1 2 0 3
  • the inventive method find for an extremely inexpensive and simple manufacture of electronic components that require the smallest electrode spacing, such as. B. molecular electronics, polymer field effect transistors or field emitters, their application.
  • BESTATIGUNGSKOPIE lie freely together.
  • the polymer semiconductor is then applied over this V-groove (“active layer”) and further completed to form the transistor.
  • DE 198 19 200 AI discloses a method for producing contact structures in semiconductor components, in which a recess is formed in the substrate using a mask. Then, by depositing a conductive material and creating flanks on the depression, two electrode structures that are separate from one another can be produced.
  • the object of the invention is therefore to develop one or more methods with which electrodes which are close to one another can be structured on a substrate in a simple and cost-effective manner and thus the production of electronic components can be carried out with the least possible technological outlay.
  • the electrodes are structured either by overlapping edges on the deposited layer or by undercut the deposited layer.
  • the electronic components are then finished either in a conventional manner or by means of a lithography process from the underside of the translucent substrate and a subsequent sequence of known process steps for producing electronic components.
  • FIG. 1 structuring of the electrodes by means of overlaps in the deposited layer
  • FIG. 2 structuring of the electrodes by means of under-etching a deposited layer
  • FIG. 3 manufacture of a transistor using known methods
  • FIG. 4 production method for a field effect transistor by means of photolithography from the underside of the substrate;
  • Figure 5 Manufacture of a field effect transistor by etching into the substrate depth.
  • Fig. 1 the steps of a vertical manufacturing process are shown.
  • a photoresist was applied to a substrate and structured in such a way that overlapping edges arise on the photoresist.
  • a metal preferably 'chromium or gold, vapor-deposited.
  • the insulator spun on in the following process step covers the entire surface.
  • flat edges are formed in the reverse direction due to the meniscus formation during the subsequent etching process Overlaps.
  • the resulting substrate with its applied and insulated electrodes can now be finished in further process steps such as spin coating of the organic semiconductor ("active layer”), application of a further insulator and gate metallization and exposure of the electrodes to form a polymer field effect transistor.
  • FIG. 2 shows a second method for structuring closely adjacent electrodes on a substrate.
  • a metal layer preferably chromium or gold, is evaporated on the substrate.
  • a photoresist is applied to this metal layer and structured in accordance with the components to be produced.
  • the metal is etched at the areas not covered by the photoresist, the metal at the edges of the photoresist being overetched in a controlled manner.
  • the structure obtained in this way is then vapor-deposited again with metal.
  • the electrodes are separated from one another by the undercut.
  • the desired electronic component field effect transistor
  • the desired electronic component can be carried out using the known method steps by spinning on an organic semiconductor (“active layer”) and an insulator or depositing a gate metallization and etching free the connections If the lower-lying electrode is to form the gate of a transistor, for example, it is expediently covered with an insulator in such a way that the recess is also closed.
  • FIGS. 2 and 4 show a production method for an electronic component with electrodes which are closely adjacent to one another on a substrate using the example of the production of a field effect transistor.
  • the structuring of these closely adjacent electrodes is carried out as in the previously described method (method 2) until the insulator is spun on.
  • a photoresist is then applied to this insulator and photolithographed from the underside of the substrate.
  • an essential requirement for this step is that the substrate, the active layer and the insulator are translucent.
  • the surface is steamed again with metal.
  • the remaining photoresist with the metal layer lying thereon is removed (for example by means of a lift-off process).
  • the metal layer can alternatively also be structured by applying a corresponding mask and etching with a width greater than the channel length.
  • the gate sections located above the closely spaced electrodes are separated by the remaining photoresist so far from the electrodes that the resulting parasitic gate capacities remain small, as with a field oxide ( Figure E-4-d 'in Fig. 4).
  • FIGS. 2 and 5 A further method for the production of electronic components with closely adjacent electrodes on a substrate is shown in FIGS. 2 and 5 using the example of the production of a field effect transistor.
  • the structuring of these closely adjacent electrodes is carried out as in the method described above (method 2).
  • a second metal layer is evaporated onto the entire surface. Thin gate metallizations are deposited in the holes or trenches.
  • An insulator is subsequently applied to the surface obtained. The holes or trenches partially fill with the insulator.
  • the insulator layer On the upper side of the substrate and due to the narrow aspect ratio in the gate holes or trenches, only part of the insulator layer is etched away (for example with a plasma process).
  • the organic semiconductor (“active layer”) is then spun on. After the surface of the substrate has been sealed, the contacts of the buried gates must be exposed at predetermined locations using a photolithographic process.
  • the methods according to the invention enable the production of electronic components with electrodes which are closely adjacent to one another, the structuring of the electrodes being realized with the aid of a one-mask process.
  • Classic microstructuring techniques can be used.
  • electronic components can be manufactured very easily and inexpensively.
  • the electronic components produced using the method according to the invention are better and easier to reproduce.
  • This method may advantageously be in molecular electronics, for producing polymer field effect Transistore 'h, are used by field emitters, or other electronic devices.

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

L'invention concerne un procédé pour produire des composants électroniques comportant des électrodes adjacentes, séparées par une très faible distance, comprise entre environ 10 nanomètres et quelques micromètres, sur un substrat quelconque. Selon l'invention, la structuration des électrodes s'effectue soit au moyen d'arêtes se chevauchant sur la couche déposée soit au moyen d'une attaque de la couche déposée. L'achèvement de la fabrication du composant électronique s'effectue ensuite soit de manière classique soit selon un procédé de lithographie par le côté inférieur du substrat transparent et au moyen d'une succession d'étapes, connues en soi, pour la production de composants électroniques.
EP04764691A 2003-09-03 2004-09-01 Procede pour produire des composants electroniques Withdrawn EP1665408A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10340926A DE10340926A1 (de) 2003-09-03 2003-09-03 Verfahren zur Herstellung von elektronischen Bauelementen
PCT/EP2004/009729 WO2005024972A2 (fr) 2003-09-03 2004-09-01 Procede pour produire des composants electroniques

Publications (1)

Publication Number Publication Date
EP1665408A2 true EP1665408A2 (fr) 2006-06-07

Family

ID=34223364

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04764691A Withdrawn EP1665408A2 (fr) 2003-09-03 2004-09-01 Procede pour produire des composants electroniques

Country Status (4)

Country Link
US (1) US8012791B2 (fr)
EP (1) EP1665408A2 (fr)
DE (1) DE10340926A1 (fr)
WO (1) WO2005024972A2 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10340926A1 (de) 2003-09-03 2005-03-31 Technische Universität Ilmenau Abteilung Forschungsförderung und Technologietransfer Verfahren zur Herstellung von elektronischen Bauelementen
KR100686120B1 (ko) * 2005-05-17 2007-02-26 엘지전자 주식회사 유기 el 소자의 제조방법
US20070048894A1 (en) * 2005-08-26 2007-03-01 Osram Opto Semiconductors Gmbh System and method for reduced material pileup
WO2008013402A1 (fr) * 2006-07-25 2008-01-31 Lg Chem, Ltd. Procédé de fabrication de dispositif photoémetteur organique et dispositif photoémetteur organique fabriqué par ce procédé
GB2455215B (en) * 2006-08-31 2009-09-30 Cambridge Display Tech Ltd Method for fabricating an organic electronic device
FR2954856B1 (fr) * 2009-12-30 2012-06-15 Saint Gobain Cellule photovoltaique organique et module comprenant une telle cellule
TWI568052B (zh) 2013-09-30 2017-01-21 樂金顯示科技股份有限公司 用於製造有機發光裝置之方法
US9847502B2 (en) * 2013-09-30 2017-12-19 Lg Display Co., Ltd. Organic light emitting device
JP6302553B2 (ja) * 2013-09-30 2018-03-28 エルジー ディスプレイ カンパニー リミテッド 積層体およびその製造方法
KR102605208B1 (ko) 2016-06-28 2023-11-24 삼성디스플레이 주식회사 유기 발광 표시 장치 및 유기 발광 표시 장치의 제조 방법
US10438848B2 (en) * 2017-11-01 2019-10-08 Semi Automation & Technologies, Inc. Inorganic lift-off profile process for semiconductor wafer processing
WO2023203429A1 (fr) * 2022-04-22 2023-10-26 株式会社半導体エネルギー研究所 Dispositif à semi-conducteurs et dispositif d'affichage

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3369159A (en) * 1964-12-21 1968-02-13 Texas Instruments Inc Printed transistors and methods of making same
US4180604A (en) * 1977-12-30 1979-12-25 International Business Machines Corporation Two layer resist system
US5091288A (en) * 1989-10-27 1992-02-25 Rockwell International Corporation Method of forming detector array contact bumps for improved lift off of excess metal
JPH06333952A (ja) * 1993-05-21 1994-12-02 Kyocera Corp 薄膜トランジスタ
JP3813217B2 (ja) * 1995-03-13 2006-08-23 パイオニア株式会社 有機エレクトロルミネッセンスディスプレイパネルの製造方法
JPH08172102A (ja) 1994-12-20 1996-07-02 Murata Mfg Co Ltd 半導体装置の製造方法
DE19534668A1 (de) 1995-09-19 1997-03-20 Thera Ges Fuer Patente Kettenverlängerte Epoxidharze enthaltende, vorwiegend kationisch härtende Masse
US6326640B1 (en) * 1996-01-29 2001-12-04 Motorola, Inc. Organic thin film transistor with enhanced carrier mobility
WO1999026730A1 (fr) * 1997-11-24 1999-06-03 The Trustees Of Princeton University Procede de fabrication de dispositifs electroluminescents organiques et de formation de motifs sur ces derniers
DE19819200B4 (de) * 1998-04-29 2006-01-05 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Solarzelle mit Kontaktstrukturen und Verfahren zur Herstellung der Kontaktstrukturen
US6720572B1 (en) * 1999-06-25 2004-04-13 The Penn State Research Foundation Organic light emitters with improved carrier injection
CN1183595C (zh) * 1999-08-24 2005-01-05 皇家菲利浦电子有限公司 显示装置
KR100940110B1 (ko) * 1999-12-21 2010-02-02 플라스틱 로직 리미티드 잉크젯으로 제조되는 집적회로 및 전자 디바이스 제조 방법
GB0013473D0 (en) * 2000-06-03 2000-07-26 Univ Liverpool A method of electronic component fabrication and an electronic component
DE10116876B4 (de) * 2001-04-04 2004-09-23 Infineon Technologies Ag Verfahren zur Dotierung elektrisch leitfähiger organischer Verbindungen, organischer Feldeffekttransistor sowie Verfahren zu dessen Herstellung
US6605519B2 (en) * 2001-05-02 2003-08-12 Unaxis Usa, Inc. Method for thin film lift-off processes using lateral extended etching masks and device
US6794220B2 (en) * 2001-09-05 2004-09-21 Konica Corporation Organic thin-film semiconductor element and manufacturing method for the same
DE10153563A1 (de) * 2001-10-30 2003-05-15 Infineon Technologies Ag Verringerung des Kontaktwiderstandes in organischen Feldeffekttransistoren durch Einbettung von Nanopartikeln zur Erzeugung von Feldüberhöhungen
JP4360801B2 (ja) * 2001-12-25 2009-11-11 シャープ株式会社 トランジスタおよびそれを用いた表示装置
KR100892945B1 (ko) * 2002-02-22 2009-04-09 삼성전자주식회사 액티브 매트릭스형 유기전계발광 표시장치 및 그 제조방법
US6740900B2 (en) * 2002-02-27 2004-05-25 Konica Corporation Organic thin-film transistor and manufacturing method for the same
US6891227B2 (en) * 2002-03-20 2005-05-10 International Business Machines Corporation Self-aligned nanotube field effect transistor and method of fabricating same
US20030183915A1 (en) * 2002-04-02 2003-10-02 Motorola, Inc. Encapsulated organic semiconductor device and method
US6946677B2 (en) * 2002-06-14 2005-09-20 Nokia Corporation Pre-patterned substrate for organic thin film transistor structures and circuits and related method for making same
US6764885B2 (en) * 2002-10-17 2004-07-20 Avery Dennison Corporation Method of fabricating transistor device
US6905908B2 (en) * 2002-12-26 2005-06-14 Motorola, Inc. Method of fabricating organic field effect transistors
ITTO20030145A1 (it) * 2003-02-28 2004-09-01 Infm Istituto Naz Per La Fisi Ca Della Mater Procedimento per la fabbricazione di dispositivi ad effetto di campo a film sottile privi di substrato e transistore a film sottile organico ottenibile mediante tale procedimento.
DE10340926A1 (de) 2003-09-03 2005-03-31 Technische Universität Ilmenau Abteilung Forschungsförderung und Technologietransfer Verfahren zur Herstellung von elektronischen Bauelementen

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2005024972A2 *

Also Published As

Publication number Publication date
WO2005024972A3 (fr) 2006-08-24
US20070087468A1 (en) 2007-04-19
WO2005024972A2 (fr) 2005-03-17
US8012791B2 (en) 2011-09-06
DE10340926A1 (de) 2005-03-31

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