DE69315247T2 - Image signal processing device - Google Patents

Description

Background of the invention

The present invention relates to an image signal processing apparatus according to the preamble of claim 1. The present invention can be used as an image signal processing apparatus such as a scanner for inputting image signals.

In the prior art, image signal processing is carried out in such a manner that an image signal input using a photoelectric conversion element such as a CCD (charge coupled device) or a contact type image sensor is converted into a signal for storage, transmission or the like. An example of this signal processing is shown below, making various main functional parts in the prior art related to the image signal processing device the main subject.

(1) Regarding shading correction, there is a problem in the prior art that an image signal input using a photoelectric conversion element such as a CCD (charge coupled device) or a contact type image sensor has distortion components such as unevenness of illumination or characteristic dispersion of each photoelectric conversion element. Therefore, shading correction is carried out to correct this distortion and to produce a uniform image signal.

(2) Furthermore, regarding MTF correction, in order to correct an MTF characteristic inherent to an optical system or a sensor and also to improve edge characteristic (undamped characteristic of an edge shape of waveform), MTF correction processing is carried out.

(3) Furthermore, with respect to the pseudo halftone portion, in order to reproduce a halftone image obtained in a printer of black and white recording, a signal processing method called error diffusion is carried out.

In addition to those described above, in conventional devices, γ processing for carrying out level conversion of an input signal, binarization for outputting a document image signal, signal processing for separating a halftone image area of a photograph or the like and a black-and-white binary image area of a document image or the like, and various other processings have been proposed.

In the prior art, for example, respective means for realizing signal processing and memory are individually constructed. In such a construction, however, there are problems that since a plurality of memory interfaces are required in the device as a whole and the circuit dimension is increased and the device is operated only by independent function in each memory, mutual function between memories cannot occur and further an unused portion is produced in the memory and the device construction becomes disadvantageous.

That is, a prior art device as shown in Fig. 1 consists of a signal processing section I with a sensor 1, A/D converter 2, a shading corrector 3, a γ-corrector 4, an MTF corrector 5, a binarization circuit 6, an error diffusion circuit 7, a signal output circuit 8 and its output 9 and structures completely separated from the signal processing section I (so-called "external structures"), wherein a first memory section II, a second memory section III, a third memory section IV and the like (with a memory 10, a memory 11, a memory 12 and the like) are separated from each other.

Respective memory sections consist of memories 10-12 each having N bits/pixel, in which case N = 8 is assumed, 8 bits/pixel, and such a case is effective because standard memories can be used.

However, in the structure shown in Fig. 1, since three structures each comprising 8 bits are arranged separately from the signal processing section I and independently of each other, the memory interfaces are individually required as described above, and other problems of increase in the number of parts, increase in the difficulty in handling due to the complication of the connection wiring of respective parts, reduction in reliability and durability due to the complexity of each circuit and the large number of parts, large size of the device and increase in price, and reduction in reliability are inevitable.

JP-A-4 047 760 discloses an image processing unit with binarization means, error diffusion means and contrast transfer function (MTF) correction means, using a single memory shared by different image processing means. However, this memory is accessed separately by each selected image processing means.

Summary of the invention

An object of the present invention is to provide an image signal processing apparatus for realizing a signal processing system and apparatus structure in which, for example, parts comprising sensor 1 to signal output circuit 8 and a line memory are constructed as one body as shown in Figs. 2 and 3 to obtain an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor in a circuit structure of a small size with high image quality.

To solve the above problems, a device is provided as defined in claim 1.

When image signal processing is realized in the above-mentioned structure, the data width of a signal referred to in respective signal processings is reduced, and an image signal sufficiently satisfying the accuracy of signal processing and having high image quality can be obtained. For example, when a circuit is constructed in LSI, the memory section can be easily arranged on the same LSI.

The device means that a memory required for image signal processing is designed with 8 bits per pixel and a cost-effective memory structure can be used.

Short description of the drawings

Fig. 1 is a configuration diagram showing the entire structure of a prior art device having a signal processing section and a number of memory sections, each independent of the signal processing section;

Fig. 2 and Fig. 3 are construction diagrams each showing different embodiments of the invention;

Fig. 4 is a configuration diagram of the shading correction means which is an element of the invention;

Fig. 5 is an explanatory diagram of the reference waveform for shading correction according to the invention;

Fig. 6 is an explanatory diagram of γ-conversion according to the invention;

Fig. 7 is a configuration diagram of the MTF correcting means according to the invention;

Fig. 8 is a construction diagram of the error diffusion means according to the invention;

Fig. 9 is an explanatory diagram of the error diffusion treatment according to the invention; and

Fig. 10 is an explanatory diagram for data input/output of a line memory according to the invention.

Description of the preferred embodiments

Considering the above-mentioned problems in the prior art, the present invention provides an apparatus shown in Fig. 2, in which a signal processing section V comprises a shading corrector 3, an MTF corrector 5 and an error diffusion circuit 7, and storage parts designed as a whole in 8 bits, for example, and constituted by memories 101, 102 and 103 are provided integrally with the shading corrector 3, the MTF corrector 5 and the error diffusion circuit 7, respectively, and are arranged quite close to positions where the shading corrector 3, the MTF corrector 5 and the error diffusion circuit 7 are attached.

The prior art has disadvantages as described above because the image signal processing device and the memory parts are separately constructed. In contrast, in the device according to the present invention, for example, a memory for 1 pixel and 8 bits is provided. Consequently, the device according to the present invention has a small-sized construction and improved functionality as compared with the prior art, and is therefore quite effective in construction.

In addition, the device according to the present invention has the effect of reducing the number of parts, increasing the reliability and reducing the price, and further has the characteristic that the number of parts can be reduced.

Furthermore, in an apparatus according to the present invention, as shown in Fig. 3, a data distributor 104 is provided between a block of a shading corrector 3, an MTF corrector 5 and an error diffusion circuit 7 of a signal processing section having parts 1-8, for example, and memory parts 10' formed as a whole in 8 bits, for example, and integrally composed of memories 101', 102' and 103'.

The circuit has the following effects:

(1) According to the distribution function in the data distributor 104, the memory distribution in the signal processing section with parts 1-8 can be varied dynamically, for example.

(2) The dynamic distribution can vary the output image in response to a change in binarization/tone (error diffusion).

This is because signal components used for respective signal processing (binarization, error diffusion) vary slightly.

Furthermore, the device has the feature that a CPU interface is provided and that the memory content can be accessed by software processing of the CPU.

In addition, in the present invention, the following treatment is also effective so that the problems in the prior art can be solved.

That is, the present invention lies in an image signal processing device for realizing a signal processing system and a device structure wherein an image signal inputted using a photoelectric conversion element such as a CCD or a contact type image sensor is obtained in a circuit structure of small size with high image quality.

In order to solve the above problems, the data width of a signal referred to in the shading correction means, MTF correction means and error diffusion means is made to be b + f + j ≤ 8 per pixel, respectively.

The error component possessed by multiple pixels (N pixels) in the error diffusion circuit is designed to be b + f + j' ≤ 8, where the data width per pixel is designed to be j' = j/N.

In the above-mentioned structure, image signal processing is realized, wherein the data width of a signal referred to in respective signal processings is reduced and an image signal is obtained which satisfies the accuracy of signal processing and has high image quality. For example, when a circuit is formed by LSI, the memory section can be easily arranged on the same LSI.

The device has the effect that a memory required in image signal processing is designed to be 8 bits per pixel and a low-cost memory structure can be used.

Furthermore, according to the present invention, in order to solve the above-mentioned problems, in the shading correction means 3 for estimating an output signal (c bits/pixel) by correcting an image signal (one bit/pixel) using a white balance signal (b bits/pixel), each data width is set such that a = c, a > b, and in the white balance signal (b bits/pixel) using means for compressing and expanding the signal and means for storing the compressed white balance signal (d bits/pixel), each data width is set such that b > d, and in the MTF correction means 5 for correcting a noted image signal (e bits/pixel) using adjacent multi-pixel signals (f bits/pixel) and estimating an output signal (g bits/pixel), each data width is set such that e ≥ d. f, and in the error diffusion means 7 for estimating a binary output signal (k bits/pixel) on the basis of a predetermined operation procedure using a noted pixel signal (i bits/pixel) and an error component (j bits/pixel) before and after the binarization 6, the respective data width is set such that i > j, k = 1, and the memory of 8 bits per pixel is distributed for the error diffusion means, and it follows that d + f + j = 8.

Or the error component generally possessed by several pixels (N pixels) is set, and the data width per pixel is set to j' = j/N, hence d + f + j' = 8.

Using the above-mentioned means, in the shading correction means 3, when it is clear in advance that the signal amplitude range of the reference signal having the shading distortion is narrower than the signal amplitude range of the image signal as the object of correction, the respective data width is set so that a = c, a > b, whereby the accuracy in the operation can be satisfied.

For the white balance signal (b bits/pixel), using means for compressing and expanding the signal and means for storing the compressed white balance signal (d bits/pixel), the respective data width is set so that b > d, whereby the storage capacity can be reduced.

To the input signal of the MTF correction means, signal conversion is carried out by γ-conversion. In γ-conversion, there is a signal range in which multiple stages of an input signal are converted into an output signal with one stage, or a signal range in which one stage of an input signal is converted into an output signal with multiple stages. Consequently, in most signal ranges, the data width is set so that e > f, whereby the accuracy in the operation can be satisfied.

In the error diffusion means, the error component of several neighboring pixels (N pixels) is calculated by signal processing such as equalization and is used jointly in the N pixels. Since the signal fluctuation is suppressed by equalization in such a way, the respective data width can be set so that i > j, k = 1.

In the above-mentioned structure, the image signal processing is realized, wherein the data width of a signal referred to in respective signal processings is reduced, and also an image signal sufficiently satisfying the signal accuracy and having a high image quality can be obtained in respective signal processings.

Since the image signal processing is realized in the above-mentioned structure, memories used in respective signal processings are combined and timing of data input/output of the memories are made common, and data input and output at the same time are divided and used in respective signal processings, whereby the structure of the apparatus for realizing the image signal processing can be simplified and the image signal of high image quality can be obtained.

Signals regarding the error component referred to in the error diffusion treatment are commonly included and referred to in two pixels in the case that N (pixels) is set to 2, whereby the required memory capacity can be reduced.

The memory capacity required in image signal processing is reduced, and the memory section can be easily incorporated into the circuit that realizes image signal processing. For example, when the circuit is formed of an LSI, the memory section can be easily incorporated into the same LSI.

The above-mentioned action is also obtained, whereby the memory capacity required in all image signal processing can be made 8 bits per pixel. Since the structure of the widely used standard memory carries out signal input/output in units of 8 bits, the effect is that standard, thus inexpensive, memory can be used.

An embodiment of the present invention is shown below. Shading correction means 3 receives as input a signal from a photoelectric conversion element such as a CCD or a contact type image sensor, and while a signal is input or output with a memory storing a reference signal for shading correction, the shading correction means 3 outputs the signal after completion of shading correction.

MTF correction means 5 receives the signal after shading correction as input, and while a signal is input or output with a memory storing an adjacent image signal, MTF correction means 5 performs filtering treatment based on previously set coefficients and outputs the signal.

Error diffusion means 7 receives the signal as input after completion of the shading correction and the signal treatment such as MTF correction when a pseudo tone image is selected, and while the signal is input or output with a memory storing an error component to be distributed to an adjacent pixel, the error diffusion means 7 carries out the error diffusion treatment and outputs the signal.

Also provided are γ-treatment means 4 for converting the density characteristic of an image signal and a binarization circuit for Deciding whether a black-and-white binary image should be black or white. The present invention does not depend on details of the concrete signal processing procedures of the shading correction 3, the MTF correction 5, the γ treatment 4, the binarization 6 and the like, but the signal processing based on this principle suffices.

In order to carry out the shading correction 3, the MTF correction 5 and the error diffusion 7, signal storage means corresponding to at least one line for respective signal processing are necessary.

When the sensor output signal 1 is subjected to A/D conversion and the input image signal is made 6 bits/pixel, an example will be described in which the data width used for respective signal processings is limited to the accuracy required for the operation, where the structure of the signal delay means is designed as a memory corresponding to one line of 8 bits per pixel.

In the shading correction means 3, as shown in Fig. 4, means for compressing and expanding the white balance signal are provided, and the white balance signal is stored in the form of one pixel and one bit (d=1). A necessary condition for accurately carrying out the shading correction is the signal deterioration due to the compression and expansion of the white balance signal. In this case, as shown in Fig. 5, when the distortion of the white balance signal is within 50% of the amplitude range with respect to white, the data width b of the reproduced white balance signal may be narrower than the input image signal (a=6) (a>b). For example, if the former is 6 bits, the latter may be 5 bits, and as a result of the shading correction, the correction signal of 6 bits wide (c=6) can be obtained.

In the MTF correction means, the filter treatment is carried out on the image signal after the γ conversion with respect to the image signal of the previous line. In this case, as shown in Fig. 6, in the γ conversion treatment, with respect to adjusting the conversion curve, the output signal may be expressed by the data width f which is smaller than the data width e of the input signal (e>t). For example, if the former is 6 bits, the latter may be 5 bits, the adjustment signal may be made as data of a width of less than 5 bits. As shown in Fig. 7, a memory corresponding to one line is provided, and treatment using the coefficient matrix of 2 x 3 or 2 x 5 is carried out with respect to data of a width of 5 bits of the previous line.

In the error diffusion treatment, since the error components before and after binarization in a plurality of pixels are subjected to weighted addition and sequentially fed back, unless the data width j of respective error components is the same as the data width i of the image signal of the object pixel (made i>j), the density of the image of the whole situation is maintained. Also, in the error diffusion means, error components of the adjacent N pixels are averaged, and memories corresponding to the N pixels store the error components, whereby the memory capacity required in the pixel unit can be reduced. Consequently, as shown in Fig. 8, after the error components by the two adjacent pixels (N=2) are averaged and made into data of 4 bits wide (j=4), the data in the memory is stored in 2 bits per pixel (j'=j/N). The reference of the memory components stored in the memory is carried out as shown in Fig. 9.

Thus, signals referred to in the signal treatments of shading correction, MTF correction and error diffusion are made 8 bits per pixel. As shown in Fig. 10, means for distributing data are used in each signal processing means, and a memory can be used to perform data input/output of 8 bits by access at the same time. In general, a memory structure in a unit of 8 bits is widely used. Consequently, versatile and inexpensive memories of various types can be used, and simplification of the device and low price can be realized. The image processing circuit and the memory circuit can be easily added to the LSI.

When the line memory is constructed as an external circuit of the image processing means, a memory for carrying out data input/output in units of 8 bits in response to the number of picture elements per line is constructed, and the memory capacity can be adjusted. For example, when an original document of B4 size is read by 8 picture elements per 1 mm, since one line is constituted by 2048 picture elements, the use of a memory of 2048 bytes is sufficient.

Not only respective signal processing means but also data input/output means from a control device (CPU or the like) for carrying out signal processing on the basis of a program are provided, and the memory can bring about another effect. For example, in order to set the white balance signal for the shading correction, the image signal reading the object in the white balance is input without carrying out the signal processing of the shading correction, the MTF correction and the error diffusion, and the signal procedure on the basis of the predetermined software is carried out using the CPU, then the calculated balance signal is stored in the memory. where the shading correction can be performed using the white balance signal calculated by any algorithm.

When using the image signal stored in the line memory, the decision of the signal characteristic can be carried out using the image signal in the area formed by a plurality of picture elements. As the area decision means therefor, the signal processing procedure fixed in advance can of course be used, and also the input image signal can be adaptively adjusted using statistical means or learning means represented by a neuro-computer.

For example, a procedure for performing the decision of the signal properties using a neuro-computer is shown as follows.

(1) A circuit is tuned using a learning process of back-propagation or the like (realizable by software).

(2) An image signal in a small area consisting of several picture elements is input to the circuit, and while the decision result is output, the image plane is sequentially scanned.

(3) Using the decision result of the small area, an area is divided into a larger image plane, and image signal processing suitable for respective areas is carried out.

In this case, a plurality of image signals for constructing the small area must be stored in a line memory or the like, and the line memory used in the above-mentioned signal processing means and its stored signal can be used. Therefore, no new memory needs to be provided, and the signal processing for deciding the signal characteristic within the range can be realized. This can be used for setting the coefficient matrix of MTF correction, setting the error diffusion coefficient or error components in error diffusion, and for further range separation of binary image and halftone image.

Effects of the present invention are that the data width of signals referred to in respective signal processings is reduced, and an image signal sufficiently satisfying the accuracy of signal processing and having high image quality can be obtained. For example, when the circuit is composed of an LSI, the above-mentioned memory parts can be easily mounted on the same LSI. A memory required for the image signal processing can be designed to be 8 bits per pixel, and an inexpensive memory structure can be used.

According to the present invention, the circuit structure for the entire image processing of a read signal can be made small in size and high image quality can be achieved.

Claims (7)

1. An image signal processing device comprising: a plurality of image signal processing means (3, 4, 5, 7), each of the image signal processing means (3, 4, 5, 7) having an image signal processing function which is different from the image signal processing function of the other image signal processing means (3, 4, 5, 7); Storage means (101, 102, 103; 101', 102', 103') for storing a plurality of data used in the processing performed by the plurality of image signal processing means (3, 4, 5, 7), each of the data corresponding to a respective one of the image signal processing means (3, 4, 5, 7); characterized in that it comprises: Data input-output control means (104) which can access the plurality of data for reading out the plurality of data from the storage means (101, 102, 103; 101', 102', 103') in a single access before executing image signal processing and which distributes the respective data in the plurality of data read out from the storage means (101, 102, 103; 101', 102', 103') in the single access to the corresponding image signal processing means (3, 4, 5, 7), wherein a plurality of image signal processing steps are carried out using the plurality of data read out from the storage means (101, 102, 103; 101', 102', 103') in a single memory access. 2. An image signal processing apparatus according to claim 1, wherein the storage means (101, 102, 103; 101', 102', 103') has a predetermined number of bits, and the number of bits respectively assigned to each of the data corresponding to the plurality of image signal processing means (3, 4, 5, 7) is changeable. 3. An image signal processing apparatus according to claim 2, wherein the number of bits allocated to each of the image signal processing means (3, 4, 5, 7) is different from each other. 4. An image signal processing apparatus according to claim 1, wherein the plurality of image signal processing means (3, 4, 5, 7), the storage means (101, 102, 103; 101', 102', 103') and the data input-output control means (104) are formed on an LSI chip. 5. An image signal processing apparatus according to claim 1, wherein the image signal processing means (3, 4, 5, 7) comprises means for compressing and expanding a white reference signal. 6. An image signal processing apparatus according to claim 1, wherein the plurality of image signal processing means (3, 4, 5, 7) are directly connected to one another. 7. An image signal processing apparatus according to claim 1, wherein the image signal processing means (3, 4, 5, 7) comprises input means for inputting image signals.