DE69227348D1 - DIVIDIERSCHALTUNG FüR GLEITKOMMAZAHLEN - Google Patents
DIVIDIERSCHALTUNG FüR GLEITKOMMAZAHLENInfo
- Publication number
- DE69227348D1 DE69227348D1 DE69227348T DE69227348T DE69227348D1 DE 69227348 D1 DE69227348 D1 DE 69227348D1 DE 69227348 T DE69227348 T DE 69227348T DE 69227348 T DE69227348 T DE 69227348T DE 69227348 D1 DE69227348 D1 DE 69227348D1
- Authority
- DE
- Germany
- Prior art keywords
- dividing circuit
- sliding points
- sliding
- points
- dividing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/535—Dividing only
- G06F7/537—Reduction of the number of iteration steps or stages, e.g. using the Sweeny-Robertson-Tocher [SRT] algorithm
- G06F7/5375—Non restoring calculation, where each digit is either negative, zero or positive, e.g. SRT
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
- G06F7/487—Multiplying; Dividing
- G06F7/4873—Dividing
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Complex Calculations (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3048452A JPH04283831A (ja) | 1991-03-13 | 1991-03-13 | 除算器 |
PCT/JP1992/000296 WO1992016892A1 (en) | 1991-03-13 | 1992-03-12 | Floating-point dividing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69227348D1 true DE69227348D1 (de) | 1998-11-26 |
DE69227348T2 DE69227348T2 (de) | 1999-03-18 |
Family
ID=12803744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69227348T Expired - Fee Related DE69227348T2 (de) | 1991-03-13 | 1992-03-12 | DIVIDIERSCHALTUNG FüR GLEITKOMMAZAHLEN |
Country Status (6)
Country | Link |
---|---|
US (1) | US5309383A (de) |
EP (1) | EP0529101B1 (de) |
JP (1) | JPH04283831A (de) |
KR (1) | KR950006584B1 (de) |
DE (1) | DE69227348T2 (de) |
WO (1) | WO1992016892A1 (de) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2803506B2 (ja) * | 1992-12-25 | 1998-09-24 | 三菱電機株式会社 | 除算器 |
US5404324A (en) * | 1993-11-01 | 1995-04-04 | Hewlett-Packard Company | Methods and apparatus for performing division and square root computations in a computer |
US5553015A (en) * | 1994-04-15 | 1996-09-03 | International Business Machines Corporation | Efficient floating point overflow and underflow detection system |
GB2296350B (en) * | 1994-12-21 | 1999-10-06 | Advanced Risc Mach Ltd | Data processing divider |
US5687106A (en) * | 1995-03-31 | 1997-11-11 | International Business Machines Corporation | Implementation of binary floating point using hexadecimal floating point unit |
US5757682A (en) * | 1995-03-31 | 1998-05-26 | International Business Machines Corporation | Parallel calculation of exponent and sticky bit during normalization |
US5771366A (en) * | 1995-06-09 | 1998-06-23 | International Business Machines Corporation | Method and system for interchanging operands during complex instruction execution in a data processing system |
USH1993H1 (en) * | 1997-06-25 | 2001-09-04 | Sun Microsystems, Inc. | Floating-point division and squareroot circuit with early determination of resultant exponent |
JP2005229312A (ja) * | 2004-02-12 | 2005-08-25 | Daihen Corp | 適応型ディジタルフィルタ |
US20050289208A1 (en) * | 2004-06-23 | 2005-12-29 | Harrison John R | Methods and apparatus for determining quotients |
US20060179092A1 (en) * | 2005-02-10 | 2006-08-10 | Schmookler Martin S | System and method for executing fixed point divide operations using a floating point multiply-add pipeline |
US8140608B1 (en) * | 2007-05-31 | 2012-03-20 | Nvidia Corporation | Pipelined integer division using floating-point reciprocal |
US9983850B2 (en) * | 2015-07-13 | 2018-05-29 | Samsung Electronics Co., Ltd. | Shared hardware integer/floating point divider and square root logic unit and associated methods |
US10353671B2 (en) * | 2016-01-13 | 2019-07-16 | Arm Limited | Circuitry and method for performing division |
US10359995B2 (en) | 2016-04-29 | 2019-07-23 | Texas Instruments Incorporated | Architecture and instruction set to support integer division |
US10635395B2 (en) * | 2016-06-30 | 2020-04-28 | Texas Instruments Incorporated | Architecture and instruction set to support interruptible floating point division |
KR20240033565A (ko) * | 2022-09-05 | 2024-03-12 | 리벨리온 주식회사 | 뉴럴 프로세싱 장치, 그에 포함되는 프로세싱 엘리먼트 및 뉴럴 프로세싱 장치의 다양한 포맷 연산 방법 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4338675A (en) * | 1980-02-13 | 1982-07-06 | Intel Corporation | Numeric data processor |
JPS57169849A (en) * | 1981-04-11 | 1982-10-19 | Japan Radio Co Ltd | Division circuit |
US4507676A (en) * | 1982-10-28 | 1985-03-26 | Rca Corporation | Digital matrixing system |
JPS5979350A (ja) * | 1982-10-29 | 1984-05-08 | Toshiba Corp | 浮動小数点演算装置 |
CA1231455A (en) * | 1984-04-09 | 1988-01-12 | Masayuki Ikeda | Nonrestoring divider |
JPS6145354A (ja) * | 1984-08-10 | 1986-03-05 | Nec Corp | マイクロプロセツサ |
JPH0789346B2 (ja) * | 1985-07-05 | 1995-09-27 | 日本電気株式会社 | Dmaコントローラ |
JPS62145418A (ja) * | 1985-12-20 | 1987-06-29 | Nec Corp | Aluのスタンバイ制御方式 |
US4760550A (en) * | 1986-09-11 | 1988-07-26 | Amdahl Corporation | Saving cycles in floating point division |
US4999801A (en) * | 1988-07-15 | 1991-03-12 | Fujitsu Limited | Floating point operation unit in division and square root operations |
US5027309A (en) * | 1988-08-29 | 1991-06-25 | Nec Corporation | Digital division circuit using N/M-bit subtractor for N subtractions |
US4996660A (en) * | 1989-04-17 | 1991-02-26 | International Business Machines Corporation | Selection of divisor multipliers in a floating point divide circuit |
JPH0391028A (ja) * | 1989-09-04 | 1991-04-16 | Mitsubishi Electric Corp | パイプライン処理装置 |
-
1991
- 1991-03-13 JP JP3048452A patent/JPH04283831A/ja active Pending
-
1992
- 1992-03-12 WO PCT/JP1992/000296 patent/WO1992016892A1/ja active IP Right Grant
- 1992-03-12 KR KR1019920702842A patent/KR950006584B1/ko not_active IP Right Cessation
- 1992-03-12 EP EP92906716A patent/EP0529101B1/de not_active Expired - Lifetime
- 1992-03-12 DE DE69227348T patent/DE69227348T2/de not_active Expired - Fee Related
- 1992-03-12 US US07/946,316 patent/US5309383A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR930700905A (ko) | 1993-03-16 |
DE69227348T2 (de) | 1999-03-18 |
KR950006584B1 (ko) | 1995-06-19 |
EP0529101A4 (en) | 1993-10-20 |
JPH04283831A (ja) | 1992-10-08 |
EP0529101A1 (de) | 1993-03-03 |
US5309383A (en) | 1994-05-03 |
WO1992016892A1 (en) | 1992-10-01 |
EP0529101B1 (de) | 1998-10-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |