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DE69520538D1 - Verfahren zur Herstellung einer dünnen polykristallinen Halbleiterschicht - Google Patents

Verfahren zur Herstellung einer dünnen polykristallinen Halbleiterschicht

Info

Publication number
DE69520538D1
DE69520538D1 DE69520538T DE69520538T DE69520538D1 DE 69520538 D1 DE69520538 D1 DE 69520538D1 DE 69520538 T DE69520538 T DE 69520538T DE 69520538 T DE69520538 T DE 69520538T DE 69520538 D1 DE69520538 D1 DE 69520538D1
Authority
DE
Germany
Prior art keywords
producing
semiconductor layer
polycrystalline semiconductor
thin polycrystalline
thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69520538T
Other languages
English (en)
Other versions
DE69520538T2 (de
Inventor
Masahiro Minegishi
Masumitsu Ino
Masafumi Kunii
Takenobu Urazono
Hisao Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Publication of DE69520538D1 publication Critical patent/DE69520538D1/de
Application granted granted Critical
Publication of DE69520538T2 publication Critical patent/DE69520538T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02686Pulsed laser beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H01L21/02678Beam shaping, e.g. using a mask
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/127Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
    • H01L27/1274Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
    • H01L27/1285Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66757Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • G02F1/13454Drivers integrated on the active matrix substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
DE69520538T 1994-10-19 1995-10-17 Verfahren zur Herstellung einer dünnen polykristallinen Halbleiterschicht Expired - Fee Related DE69520538T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28009794A JP3421882B2 (ja) 1994-10-19 1994-10-19 多結晶半導体薄膜の作成方法

Publications (2)

Publication Number Publication Date
DE69520538D1 true DE69520538D1 (de) 2001-05-10
DE69520538T2 DE69520538T2 (de) 2001-10-04

Family

ID=17620282

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69520538T Expired - Fee Related DE69520538T2 (de) 1994-10-19 1995-10-17 Verfahren zur Herstellung einer dünnen polykristallinen Halbleiterschicht

Country Status (5)

Country Link
US (1) US6015720A (de)
EP (1) EP0708479B1 (de)
JP (1) JP3421882B2 (de)
KR (1) KR100398829B1 (de)
DE (1) DE69520538T2 (de)

Families Citing this family (17)

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Publication number Priority date Publication date Assignee Title
AU749571B2 (en) * 1998-07-02 2002-06-27 Astropower Inc. Silicon thin-film, integrated solar cell, module, and methods of manufacturing the same
JP2000183358A (ja) * 1998-07-17 2000-06-30 Sony Corp 薄膜半導体装置の製造方法
JP3156776B2 (ja) * 1998-08-03 2001-04-16 日本電気株式会社 レーザ照射方法
US6506635B1 (en) 1999-02-12 2003-01-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, and method of forming the same
KR100324871B1 (ko) * 1999-06-25 2002-02-28 구본준, 론 위라하디락사 박막트랜지스터 제조방법
US6193482B1 (en) * 1999-10-22 2001-02-27 Chih-Ming Chen Structure of a piston of an air-filing device
US6521492B2 (en) * 2000-06-12 2003-02-18 Seiko Epson Corporation Thin-film semiconductor device fabrication method
US6544465B1 (en) * 2000-08-18 2003-04-08 Micron Technology, Inc. Method for forming three dimensional structures from liquid with improved surface finish
JP2002176180A (ja) * 2000-12-06 2002-06-21 Hitachi Ltd 薄膜半導体素子及びその製造方法
JP4135347B2 (ja) * 2001-10-02 2008-08-20 株式会社日立製作所 ポリシリコン膜生成方法
JP4474108B2 (ja) * 2002-09-02 2010-06-02 株式会社 日立ディスプレイズ 表示装置とその製造方法および製造装置
US20060006467A1 (en) * 2004-07-07 2006-01-12 Yoshiaki Nakazaki Transistor structure and circuit suitable for input/output protection of liquid crystal display device
JP4434115B2 (ja) 2005-09-26 2010-03-17 日新電機株式会社 結晶性シリコン薄膜の形成方法及び装置
JP4529855B2 (ja) 2005-09-26 2010-08-25 日新電機株式会社 シリコン物体形成方法及び装置
KR101299604B1 (ko) * 2005-10-18 2013-08-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 제조 방법
US7972943B2 (en) * 2007-03-02 2011-07-05 Semiconductor Energy Laboratory Co., Ltd. Manufacturing method of semiconductor device
WO2008156631A2 (en) * 2007-06-15 2008-12-24 Nanogram Corporation Reactive flow deposition and synthesis of inorganic foils

Family Cites Families (27)

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US4309224A (en) * 1978-10-06 1982-01-05 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device
US4409724A (en) * 1980-11-03 1983-10-18 Texas Instruments Incorporated Method of fabricating display with semiconductor circuits on monolithic structure and flat panel display produced thereby
US4448632A (en) * 1981-05-25 1984-05-15 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices
US4933296A (en) * 1985-08-02 1990-06-12 General Electric Company N+ amorphous silicon thin film transistors for matrix addressed liquid crystal displays
JPS62297289A (ja) * 1986-06-17 1987-12-24 Matsushita Electronics Corp 単結晶薄膜の形成方法
JP2600929B2 (ja) * 1989-01-27 1997-04-16 松下電器産業株式会社 液晶画像表示装置およびその製造方法
US5290712A (en) * 1989-03-31 1994-03-01 Canon Kabushiki Kaisha Process for forming crystalline semiconductor film
JPH02258689A (ja) * 1989-03-31 1990-10-19 Canon Inc 結晶質薄膜の形成方法
US5278093A (en) * 1989-09-23 1994-01-11 Canon Kabushiki Kaisha Method for forming semiconductor thin film
JPH0456325A (ja) * 1990-06-26 1992-02-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
JP3203652B2 (ja) * 1990-10-29 2001-08-27 セイコーエプソン株式会社 半導体薄膜の製造方法
US5365875A (en) * 1991-03-25 1994-11-22 Fuji Xerox Co., Ltd. Semiconductor element manufacturing method
JP3092761B2 (ja) * 1991-12-02 2000-09-25 キヤノン株式会社 画像表示装置及びその製造方法
US5372836A (en) * 1992-03-27 1994-12-13 Tokyo Electron Limited Method of forming polycrystalling silicon film in process of manufacturing LCD
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JP3165304B2 (ja) * 1992-12-04 2001-05-14 株式会社半導体エネルギー研究所 半導体装置の作製方法及び半導体処理装置
JPH06232069A (ja) * 1993-02-04 1994-08-19 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
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US5513594A (en) * 1993-10-20 1996-05-07 Mcclanahan; Adolphus E. Clamp with wafer release for semiconductor wafer processing equipment
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JPH07230104A (ja) * 1993-12-24 1995-08-29 Toshiba Corp アクティブマトリクス型表示素子及びその製造方法
JPH07249591A (ja) * 1994-03-14 1995-09-26 Matsushita Electric Ind Co Ltd 半導体薄膜のレーザーアニール方法及び薄膜半導体素子
JP3326654B2 (ja) * 1994-05-02 2002-09-24 ソニー株式会社 表示用半導体チップの製造方法
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US5550066A (en) * 1994-12-14 1996-08-27 Eastman Kodak Company Method of fabricating a TFT-EL pixel

Also Published As

Publication number Publication date
EP0708479B1 (de) 2001-04-04
EP0708479A2 (de) 1996-04-24
US6015720A (en) 2000-01-18
DE69520538T2 (de) 2001-10-04
KR100398829B1 (ko) 2004-03-02
EP0708479A3 (de) 1996-09-11
JP3421882B2 (ja) 2003-06-30
JPH08124852A (ja) 1996-05-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee