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DE602005021098D1 - Busverbindungseinrichtung - Google Patents

Busverbindungseinrichtung

Info

Publication number
DE602005021098D1
DE602005021098D1 DE602005021098T DE602005021098T DE602005021098D1 DE 602005021098 D1 DE602005021098 D1 DE 602005021098D1 DE 602005021098 T DE602005021098 T DE 602005021098T DE 602005021098 T DE602005021098 T DE 602005021098T DE 602005021098 D1 DE602005021098 D1 DE 602005021098D1
Authority
DE
Germany
Prior art keywords
electronic device
bus connection
usb
connection device
electronic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005021098T
Other languages
English (en)
Inventor
Jerome Tjia
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602005021098D1 publication Critical patent/DE602005021098D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0042Universal serial bus [USB]

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Connections Arranged To Contact A Plurality Of Conductors (AREA)
DE602005021098T 2004-05-28 2005-05-24 Busverbindungseinrichtung Active DE602005021098D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04102368 2004-05-28
PCT/IB2005/051689 WO2005116848A1 (en) 2004-05-28 2005-05-24 Bus connection device

Publications (1)

Publication Number Publication Date
DE602005021098D1 true DE602005021098D1 (de) 2010-06-17

Family

ID=34968359

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005021098T Active DE602005021098D1 (de) 2004-05-28 2005-05-24 Busverbindungseinrichtung

Country Status (8)

Country Link
US (1) US7484031B2 (de)
EP (1) EP1754160B1 (de)
JP (1) JP2008501178A (de)
KR (1) KR101121288B1 (de)
CN (1) CN100481054C (de)
AT (1) ATE467183T1 (de)
DE (1) DE602005021098D1 (de)
WO (1) WO2005116848A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7597592B2 (en) * 2006-12-27 2009-10-06 Intel Corporation Automatic configuration of an interface to a host or client
US8315269B1 (en) 2007-04-18 2012-11-20 Cypress Semiconductor Corporation Device, method, and protocol for data transfer between host device and device having storage interface
KR101421054B1 (ko) * 2007-08-06 2014-07-18 삼성전자주식회사 버퍼를 이용한 연산 분산 방법 및 이를 이용한 연산 분산시스템
TWI448902B (zh) 2007-08-24 2014-08-11 Cypress Semiconductor Corp 具頁存取基礎處理器介面之橋接裝置
US8090894B1 (en) * 2007-09-21 2012-01-03 Cypress Semiconductor Corporation Architectures for supporting communication and access between multiple host devices and one or more common functions
US7970976B2 (en) * 2009-03-01 2011-06-28 Qualcomm Incorporated Remote memory access using reversible host/client interface
WO2014008280A1 (en) * 2012-07-05 2014-01-09 Omron Network Products, Llc A method and apparatus for usb signaling via intermediate transports
US10437763B2 (en) 2017-04-07 2019-10-08 Nxp B.V. Method and device for universal serial bus (USB) communication
US10366039B2 (en) * 2017-04-13 2019-07-30 Nxp B.V. USB link bridge
US10379979B2 (en) * 2017-05-31 2019-08-13 Western Digital Technologies, Inc. Power fail handling using stop commands
US10452593B1 (en) * 2018-05-03 2019-10-22 Arm Limited High-performance streaming of ordered write stashes to enable optimized data sharing between I/O masters and CPUs

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784581A (en) * 1996-05-03 1998-07-21 Intel Corporation Apparatus and method for operating a peripheral device as either a master device or a slave device
JP2000196986A (ja) 1998-12-25 2000-07-14 Olympus Optical Co Ltd 電子的撮像装置
JP2001282701A (ja) * 2000-03-31 2001-10-12 Aiwa Co Ltd 情報処理装置及び情報処理方法
US7000057B1 (en) * 2002-02-11 2006-02-14 Cypress Semiconductor Corp. Method and apparatus for adding OTG dual role device capability to a USB peripheral
JP3685150B2 (ja) * 2002-04-26 2005-08-17 セイコーエプソン株式会社 クロック制御回路、データ転送制御装置及び電子機器
US20030212841A1 (en) 2002-05-12 2003-11-13 Ju-Yung Lin Method and apparatus of controlling an operational mode of a USB device
US6732218B2 (en) * 2002-07-26 2004-05-04 Motorola, Inc. Dual-role compatible USB hub device and method
US7640385B2 (en) * 2002-09-24 2009-12-29 St-Ericsson Sa Dual-mode bus station and system for communications
GB2394080A (en) * 2002-10-10 2004-04-14 Nokia Corp USB host device which relinquishes host status upon detection of elevated bus voltage
JP2004157604A (ja) * 2002-11-01 2004-06-03 Matsushita Electric Ind Co Ltd Usb機器制御方法および装置
JP3649227B2 (ja) * 2003-06-06 2005-05-18 セイコーエプソン株式会社 データ転送制御装置、電子機器及びデータ転送制御方法
US20060053238A1 (en) * 2003-09-17 2006-03-09 Ching-Fu Hung Data exchangeable usb device and method therewith
US7193442B2 (en) * 2004-09-20 2007-03-20 Texas Instruments Incorporated USB 1.1 for USB OTG implementation
US20060106962A1 (en) * 2004-11-17 2006-05-18 Woodbridge Nancy G USB On-The-Go implementation
WO2006095326A2 (en) * 2005-03-11 2006-09-14 Koninklijke Philips Electronics N.V. Universal serial bus bridge

Also Published As

Publication number Publication date
US20070245059A1 (en) 2007-10-18
KR101121288B1 (ko) 2012-03-26
WO2005116848A1 (en) 2005-12-08
CN100481054C (zh) 2009-04-22
ATE467183T1 (de) 2010-05-15
JP2008501178A (ja) 2008-01-17
EP1754160A1 (de) 2007-02-21
KR20070020092A (ko) 2007-02-16
US7484031B2 (en) 2009-01-27
CN1961303A (zh) 2007-05-09
EP1754160B1 (de) 2010-05-05

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Legal Events

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8364 No opposition during term of opposition