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DE3483894D1 - Mikroprozessorsystem mit einem mehrfachbyte-systembus. - Google Patents

Mikroprozessorsystem mit einem mehrfachbyte-systembus.

Info

Publication number
DE3483894D1
DE3483894D1 DE8484105754T DE3483894T DE3483894D1 DE 3483894 D1 DE3483894 D1 DE 3483894D1 DE 8484105754 T DE8484105754 T DE 8484105754T DE 3483894 T DE3483894 T DE 3483894T DE 3483894 D1 DE3483894 D1 DE 3483894D1
Authority
DE
Germany
Prior art keywords
multiple byte
microprocessor
system bus
bus
microprocessor system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8484105754T
Other languages
English (en)
Inventor
Burton Laverne Oliver
David Charles Preston
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE3483894D1 publication Critical patent/DE3483894D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Executing Machine-Instructions (AREA)
DE8484105754T 1983-06-02 1984-05-21 Mikroprozessorsystem mit einem mehrfachbyte-systembus. Expired - Lifetime DE3483894D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/500,501 US4630194A (en) 1983-06-02 1983-06-02 Apparatus for expediting sub-unit and memory communications in a microprocessor implemented data processing system having a multibyte system bus that utilizes a bus command byte

Publications (1)

Publication Number Publication Date
DE3483894D1 true DE3483894D1 (de) 1991-02-14

Family

ID=23989689

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484105754T Expired - Lifetime DE3483894D1 (de) 1983-06-02 1984-05-21 Mikroprozessorsystem mit einem mehrfachbyte-systembus.

Country Status (4)

Country Link
US (1) US4630194A (de)
EP (1) EP0127830B1 (de)
JP (1) JPS603049A (de)
DE (1) DE3483894D1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5257374A (en) * 1987-11-18 1993-10-26 International Business Machines Corporation Bus flow control mechanism
JPH0235524A (ja) * 1988-03-14 1990-02-06 Advanced Micro Devicds Inc バスコンパチブルプログラマブルシーケンサ
US7852836B2 (en) * 2003-11-19 2010-12-14 Cray Inc. Reduced arbitration routing system and method
US12259834B2 (en) * 2023-01-09 2025-03-25 Hewlett Packard Enterprise Development Lp Dynamic variation of bus parameters

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3348207A (en) * 1963-12-20 1967-10-17 Control Data Corp Data exchanger
US4340933A (en) * 1979-02-12 1982-07-20 Honeywell Information Systems Inc. Data processing system having centralized nonexistent memory address detection

Also Published As

Publication number Publication date
EP0127830A3 (en) 1988-03-16
JPH0467215B2 (de) 1992-10-27
EP0127830A2 (de) 1984-12-12
EP0127830B1 (de) 1991-01-09
US4630194A (en) 1986-12-16
JPS603049A (ja) 1985-01-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee