Nothing Special   »   [go: up one dir, main page]

DE3177233D1 - Datenverarbeitungssystem. - Google Patents

Datenverarbeitungssystem.

Info

Publication number
DE3177233D1
DE3177233D1 DE8585109933T DE3177233T DE3177233D1 DE 3177233 D1 DE3177233 D1 DE 3177233D1 DE 8585109933 T DE8585109933 T DE 8585109933T DE 3177233 T DE3177233 T DE 3177233T DE 3177233 D1 DE3177233 D1 DE 3177233D1
Authority
DE
Germany
Prior art keywords
data processing
processing system
data
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE8585109933T
Other languages
English (en)
Inventor
Tsuneo Kinoshita
Fumitaka Sato
Isamu Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP3550180A external-priority patent/JPS56132623A/ja
Priority claimed from JP3549980A external-priority patent/JPS56132639A/ja
Priority claimed from JP3550280A external-priority patent/JPS56132624A/ja
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3177233D1 publication Critical patent/DE3177233D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4217—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with synchronous protocol
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7828—Architectures of general purpose stored program computers comprising a single central processing unit without memory
    • G06F15/7832—Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Microcomputers (AREA)
DE8585109933T 1980-03-19 1981-03-12 Datenverarbeitungssystem. Expired - Lifetime DE3177233D1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP3550180A JPS56132623A (en) 1980-03-19 1980-03-19 Information processor
JP3549980A JPS56132639A (en) 1980-03-19 1980-03-19 Operation controller
JP3550280A JPS56132624A (en) 1980-03-19 1980-03-19 Information processor

Publications (1)

Publication Number Publication Date
DE3177233D1 true DE3177233D1 (de) 1990-12-20

Family

ID=27288780

Family Applications (2)

Application Number Title Priority Date Filing Date
DE8585109933T Expired - Lifetime DE3177233D1 (de) 1980-03-19 1981-03-12 Datenverarbeitungssystem.
DE8181101837T Expired DE3176290D1 (en) 1980-03-19 1981-03-12 Information processing system incorporating 1-chip arithmetic control unit of very large scale integrated semiconductor element

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8181101837T Expired DE3176290D1 (en) 1980-03-19 1981-03-12 Information processing system incorporating 1-chip arithmetic control unit of very large scale integrated semiconductor element

Country Status (3)

Country Link
US (1) US4466055A (de)
EP (2) EP0172493B1 (de)
DE (2) DE3177233D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5034879A (en) * 1984-10-01 1991-07-23 Unisys Corp. (Formerly Burroughs Corp.) Programmable data path width in a programmable unit having plural levels of subinstruction sets
JPS61139866A (ja) * 1984-12-11 1986-06-27 Toshiba Corp マイクロプロセツサ
US5070445A (en) * 1986-07-02 1991-12-03 Woodward Thomas R Programmably controlled partially distributed masking mechanism in a programmable unit having variable data path widths
JPH0786853B2 (ja) * 1988-02-29 1995-09-20 株式会社ピーエフユー バス転送制御方式
US5287483A (en) * 1988-07-06 1994-02-15 Kabushiki Kaisha Toshiba Prefetched operand storing system for an information processor
US5214767A (en) * 1989-02-07 1993-05-25 Compaq Computer Corp. Full address and odd boundary direct memory access controller which determines address size by counting the input address bytes
US7190617B1 (en) * 1989-04-13 2007-03-13 Sandisk Corporation Flash EEprom system
DE69034191T2 (de) 1989-04-13 2005-11-24 Sandisk Corp., Sunnyvale EEPROM-System mit aus mehreren Chips bestehender Blocklöschung
US7447069B1 (en) 1989-04-13 2008-11-04 Sandisk Corporation Flash EEprom system
JPH0398145A (ja) * 1989-09-11 1991-04-23 Hitachi Ltd マイクロプロセッサ
US5179713A (en) * 1989-11-13 1993-01-12 Chips And Technologies, Inc. Apparatus for allowing external control of local bus read using zero wait stats input of combined I/O and DRAM controller
AU648541B2 (en) * 1990-03-02 1994-04-28 Fujitsu Limited Bus control system in a multi-processor system
JPH05258081A (ja) * 1990-11-16 1993-10-08 Seiko Epson Corp シングルチップ・マイクロコンピュータ及びそれを内蔵した電子機器
US5651122A (en) * 1991-05-13 1997-07-22 Motorola, Inc. Pipelined data processor that detects an illegal instruction by detecting legal instruction operation codes
US5455939A (en) * 1992-06-17 1995-10-03 Intel Corporation Method and apparatus for error detection and correction of data transferred between a CPU and system memory
US5307475A (en) * 1992-06-29 1994-04-26 The United States Of America As Represented By The Secretary Of The Navy Slave controller utilizing eight least/most significant bits for accessing sixteen bit data words
US5465332A (en) * 1992-09-21 1995-11-07 International Business Machines Corporation Selectable 8/16 bit DMA channels for "ISA" bus
TW390446U (en) * 1992-10-01 2000-05-11 Hudson Soft Co Ltd Information processing system
JP3369227B2 (ja) * 1992-11-09 2003-01-20 株式会社東芝 プロセッサ
US5859993A (en) * 1996-08-30 1999-01-12 Cypress Semiconductor Corporation Dual ROM microprogrammable microprocessor and universal serial bus microcontroller development system
US6338109B1 (en) 1996-08-30 2002-01-08 Cypress Semiconductor Corp. Microcontroller development system and applications thereof for development of a universal serial bus microcontroller
JP4073721B2 (ja) * 2002-06-28 2008-04-09 株式会社ルネサステクノロジ データ処理装置
US7906982B1 (en) 2006-02-28 2011-03-15 Cypress Semiconductor Corporation Interface apparatus and methods of testing integrated circuits using the same
JP5272363B2 (ja) * 2007-09-21 2013-08-28 セイコーエプソン株式会社 流体噴射装置
US9759772B2 (en) 2011-10-28 2017-09-12 Teradyne, Inc. Programmable test instrument
US10776233B2 (en) 2011-10-28 2020-09-15 Teradyne, Inc. Programmable test instrument

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US30671A (en) * 1860-11-20 Adjustable table
SE360529B (de) * 1969-09-16 1973-09-24 Sharp Kk
GB1474385A (en) * 1973-12-14 1977-05-25 Int Computers Ltd Multiprocessor data processing systems
US4050058A (en) * 1973-12-26 1977-09-20 Xerox Corporation Microprocessor with parallel operation
IT1020819B (it) * 1974-09-18 1977-12-30 Olivetti & Co Spa Macchina contabile a configurazione variabile
US4271466A (en) * 1975-02-20 1981-06-02 Panafacom Limited Direct memory access control system with byte/word control of data bus
DE2638125A1 (de) * 1975-09-04 1977-03-17 Tokyo Shibaura Electric Co Datenverarbeitungssystem
GB1540923A (en) * 1975-12-01 1979-02-21 Intel Corp Programmable single chip mos computer
US4152762A (en) * 1976-03-03 1979-05-01 Operating Systems, Inc. Associative crosspoint processor system
US4085448A (en) * 1976-10-04 1978-04-18 International Business Machines Corporation Data communication bus structure
US4217638A (en) * 1977-05-19 1980-08-12 Tokyo Shibaura Electric Co., Ltd. Data-processing apparatus and method
JPS5437438A (en) * 1977-08-27 1979-03-19 Nec Corp Bus control system
US4270184A (en) * 1978-03-16 1981-05-26 Tokyo Shibaura Denki Kabushiki Kaisha Microprocessor-based programmable logic controller
JPS54147747A (en) * 1978-05-12 1979-11-19 Hitachi Ltd Data processor
US4315308A (en) * 1978-12-21 1982-02-09 Intel Corporation Interface between a microprocessor chip and peripheral subsystems
JPS55110347A (en) * 1979-02-16 1980-08-25 Toshiba Corp Microprogram control system
US4287563A (en) * 1979-11-13 1981-09-01 Motorola, Inc. Versatile microprocessor bus interface
DE3176840D1 (en) * 1980-02-25 1988-09-15 Toshiba Kk An information-processing system consisting of an arithmetic control unit into a one-chip type by application of a highly-integrated semiconductor device

Also Published As

Publication number Publication date
EP0036185B1 (de) 1987-07-01
US4466055A (en) 1984-08-14
EP0172493A2 (de) 1986-02-26
DE3176290D1 (en) 1987-08-06
EP0172493B1 (de) 1990-11-14
EP0172493A3 (en) 1988-02-10
EP0036185A2 (de) 1981-09-23
EP0036185A3 (en) 1982-01-13

Similar Documents

Publication Publication Date Title
ES507355A0 (es) Sistema de proceso de datos.
DE3177233D1 (de) Datenverarbeitungssystem.
ES523749A0 (es) Sistema de proceso de datos.
NL192144B (nl) Informatieverwerkende inrichting.
NO810794L (no) Fluidumregister-system.
DE3177235D1 (de) Vektordatenverarbeitungsgeraet.
DE3580778D1 (de) Datenverarbeitungsvorrichtung.
DE3582662D1 (de) Virtuelles datenverarbeitungssystem.
DE3280448D1 (de) Datenkomprimierungssystem.
DE2920490A1 (de) Datenverarbeitungssystem
DK3879A (da) Databehandlingsanlaeg
DE3587684D1 (de) Verkaufsdatenverarbeitungssystem.
EP0056060A4 (de) Datenverarbeitungssystem.
AT388460B (de) Informationsverarbeitungsanordnung
NL7800281A (nl) Gegevensverwerkend stelsel.
NL193227B (nl) Informatie-verwerkende inrichting.
DE3481145D1 (de) Bargeldverarbeitungssystem.
NO812884L (no) Deteksjonssystem.
DE3587508D1 (de) Sendedatenverarbeitungssystem.
NL7809221A (nl) Dataverwerkingsstelsel.
ES523596A0 (es) Sistema de procesado de datos.
NO780580L (no) Databehandlingssystem.
DE3583903D1 (de) Datenverarbeitungssystem.
DE3382094D1 (de) Allzweck-datenverarbeitungssystem.
DE3485025D1 (de) Datenverarbeitungssystem.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition