DE2022548A1 - Triggerable monostable circuit - Google Patents

Description

MTENTANMMLTl

DnMOLLeFt-BORE-DRMANiTZ-DR-DEUFEL DIPL-INaFiNSTERWALD-DIPL-INQ ₁ QRAMKOW

• UONCHEN 22, ROBERT-KOCH-ara 1 TELEPHONE 226110

Munich, May 8, 1970

THE MARGOBJ ΟΟΜΡΑΙΓΓ LIMITKD

Bush House, Aldwych, London W.C. 2,

England

Triggerable, monostable circuit

The invention relates to a triggerable monostable circuit and particularly, but not exclusively, a triggerable monostable circuit suitable for use is suitable in the form of an integrated maintenance.

A well-known triggerable monostable circuit is in Pig.1 shown in the drawing.

TIg. 1 shows a circuit in which the bit & ektrodea of two transistors T. and T ^ are connected to a grounded supply voltage connection and the collector electrodes of these transistors are connected to a positive supply voltage connection + V via V resistors H ^ and Rp, respectively. BLn · Singangalclemme 1 is connected via a capacitor C to the collector electrode of the transistor T ^ and the base electrode of the transistor T ^. The base electrode of the transistor T ₁ is connected to the positive tereorgunap voltage via a resistor H ^ and also to the collector electrode of the transistor T ₂ * Lne diode H via a capacitor Gg

00335 2/1898

is connected between the base and emitter electrodes of the translator To, the cathode connection to the base electrode this transistor is present. Sin exit connection 2 1st with connected to the collector electrode of the transistor Tg.

During operation, the transistor T. is normally conductive and the transistor Tg is not conductive. The circuit is triggered when a pulse with a positive leading edge is applied to input 1. This pulse is passed through the capacitor C and the resistor R ,. differentiated so that a positive "spike" (needle pulse) is generated, which corresponds to the positive leading edge of the input pulse and serves _{to make the transistor T 2} conductive, whereby the potential of the output 2 of the circuit is lowered from + V to the ground potential. The negative spike resulting from the differentiation of the negative part of the trigger pulse is cut off by the diode Ό. This drop in voltage is transmitted via the capacitor C ^ to the base of the transistor T ^, as a result of which this transistor becomes non-conductive and the potential of the collector of the transistor therefore rises to + V. Since the collector of T ^ is connected to the base of Tg, the conductive state of Tg is maintained.

The capacitor C _m is charged via the resistor Bm by the positive supply voltage + V, the charging time being determined by the value of the capacitor C n and the resistor Rrp. If the capacitor or Cj reaches a potential which is equal to that of V ^ of the transistor T ^ let, the transistor T ,, becomes conductive, and the potential of the collector of the transistor gate ¹ S ^ and consequently also that of the base of the transistor Tg falls on the Ground potential, whereby the transistor ¹ S _{0 is} blocked. Bass potential of the

ORIGINAL INSPECTED

Starting clerase 2 therefore rises to + V. As a result of the differentiation of the input iapuleea by the capacitor C and the resistor R *, the only factor that controls the acidity of the output pulse at Kleasae 2, the charging time of the capacitor C ₅₁ , which is known to be due to the vert dee capacitor and the resistor R ^ beetiimt is.

The circuit therefore delivers an output pulse of constant length, even if the input pulse is longer than the desired output pulse.

In so-called integrated or microelectronic circuits, it is desirable to reduce the number of capacitances to a minimum, since capacitance elements, bits of any significant vertices, occupy relatively large areas of the integrated circuit "chips", if they are to be produced. Should not be created on the "chip" them, so buses aie separated ale discrete elements are provided, and therefore ma and are taken for their connection in the circuit Voreorg ". Since it is also desirable to reduce the number of external connections required, it is also disadvantageous in these cases to require a plurality of capacitors. The object of the invention is to create a triggerable monostable circuit which also works with input pulses whose duration is greater than that of the desired output pulse, but which does not require a differentiating capacitor.

According to the invention, a triggerable one is characterized

cLurcn ^ ³

■ onostable circuit / first and second transistors old of the same conductivity and of the same line type, whose Collectors and their strings are connected to each other,

00985-2 / 1886

BATH

through a third transistor, also from the same Line type is through a device for guiding the Input signals to the base of the first transistor, through a capacitor placed between the collectors of the first and second transistor gates and the base of the third transistor is connected by a first Supply voltage connection that is connected to the wrinkles of the three transistors are connected, through a second voltage supply connection, through a first resistor, between the collectors of the first and second transistor and the second supply voltage terminal is connected by a second resistor connected between the collector of the third transistor and the second supply voltage connection is connected, and by a third resistor connected between the base of the third transistor and the second supply voltage terminal lies.

A fourth transistor is preferably provided, its Input electrode with the base of the third transistor connected irt, ALtr fourth transistor sun create one jkusgangasigaatltait s two level values mis switching transistor work «oll»

Per fourth trannietei ¹ aufi of the same conductivity type as the other three iraeisiatoses eeiau Its base electrode is old connected to the Baals of the third transistor, and its collector-BBittor path is connected in series with a fourth resistor "between the first and second supply levels" *, whereby the output signal from the connection point of the fourth transistor gate and the fourth resistor is »abgenonEsn«

008862/1896

BATH ORIGINAL

Preferably the circuit becomes an integrated circuit built on a single "chip", and those mentioned first and second transistors have a common one Collector region.

The invention is described below by way of example Drawing described; in this shows:

Fig. 2 is a circuit diagram of a monostable circuit according to of the invention and

Pig, 3 and Pig. 4 graphic representations for explanation,

The one in Pig. 2 shown »onostable circuit has an input terminal 1, which is connected to the base of the transistor T ₁₁ , whose collector and Ealtter are correspondingly connected to the collector and emitter of a second transistor. The bitter of the transistors T ^ and are connected to a supply line 3 at ground potential, and the collectors of the transistors T ₁₁ and are connected to a second supply line 4 with the potential + V via a resistor U ^. The monostable © circuit has a third transistor T ^, whose slitter is also connected to the supply line 3 and whose collector is connected to the supply line 4 _{via a resistor H ^ 2 ei *.} The connection point A of the transistor T ^ * and the resistor R ^ is connected to the base of the transistor T ^ g. A capacitor Cj Ssgt between the collectors of the transistors T ₁₁ and T ₁₂ and the base of the * transistor T ₁ ,, and a resistor R ^ is connected between the base of the transistor T ₁ and the supply line 4. The base of a fourth transistor T _14- is at the base of the transistor T ₁ , its emitter at the supply

009852/1896

line 5 and its collector via a resistor H-, on the supply line 4. The connection point of the transistor T ^ and the resistor H ^, is on a Output terminal 2 out.

The circuit is made so that the transistors T ₁ and T ^ and the transistors T ^ ₁₄ and Τ _{Λ9 in} pairs are as similar as possible. The transistors T ^, T ^ »T ^ z and T ^ are, as shown, of the same conductivity type. The resistors R-2 ^and E- are also made with the same resistance values.

Two modes of operation of the circuit are described below.

Figure 3 graphically shows the waveforms appearing at various parts of the circuit. It will emphasizes that the waveforms are not to scale.

Waveform (i) shows an input pulse of duration t _in , which is fed to input terminal 1. The leading edge of this pulse turns on transistor T ^ and consequently the potential at the collector of that transistor drops as shown by waveform (ii). This potential profile also indicates the potential which, according to the drawing , exists on the left side of the capacitor G _{1 J.} The potential on the right side of capacitor C ₃ ,, which was of the transistor T ^ previously maintained at a value equal to the potential V ₁₃₆ also falls as shown by the waveform (iii). This drops the potential supplied to the base of the transistor T ^ *, and this transistor becomes non-conductive and

009952/1896

causes the potential of point 1, of a potential equal to V ₀₆ eat dee transistor T ,. χ to a potential equal to the V ^ _{6 of} the Transietor · T ^ ₂ , as illustrated by waveform (iv) let. This has the consequence that the transistor T ^ becomes conductive and thereby the left side of the capacitor «Cj holds low potential.

Since the potential of the right side of the capacitor Cg is lower than + V, a current flows through the resistor and Β _φ and charges the capacitor. If the potential on the right side of the capacitor Oy again reaches a potential equal to V ^ ₀ de «Transietore T ₁ , (shown in the will form (iii) with the duration%), the transistor T ₁ X becomes conductive again * Sas potential of the ftmktes A then falls on Y _Qe of transistor T ₁₅ (waveform (Iv)) off and the transistor T ^ becomes non-conductive

At point A an output signal can be canceled "but it can be seen that the%" Qa.nageh "relQh an ai" eoa Bmkt only slightly, so that, like gtts "ljgt _$ " in ¥ "fsty", it flies transistor in the form of 4SS-IrSnSlStOZ ¹ S T ^ Vorsueehea is. Da * the Baal of the transistor T ^ sugefuhrtii potential has the waveform (iii), so that the transistor at the beginning OSS? T _ift becomes nonconductive made and the potential of Äusgsngsklemme 2 rises, as shown by the Vellenform (v) illustrates 1st · If the transistor T ^ ₄ . only in time made conductive as the transistor T ^ χ _t so the potential at the output terminal "uf T _Qe diesas transistor decreases, the Abfallseit of liisgangeeignsles of dey Wechselgesohwindigkeit of _\% '2 ^ and the Terst & rlcung of the transistor T depends on ₁ ^. Although the Tranalstor T- _{2 is made} non-conductive, the potential increases its · »Collective

003352/1886

BATH ORIGINAL

gate illustrated with waveform (ii) does not turn on to + V unless transistor T ^ is terminated the input pulse blocks. As you can see from the waveforms, the sourness of the output pulse is not of that Length of the input waveform dependent.

This is how the circuit works when t._ is greater than as is tp. The following describes the operation when tp is greater than t. is.

Fig. 4- shows waveforms similar to those of the FLg. 3 correspond to different parts of the circuit «Again, the waveforms are not to scale. The mode of operation is similar to that of the previous example, but it can be seen that in the event that the input signal no longer continues at the end of the period tp, the transistor T _{11 is} non-conductive at the end of this time. As in the previous example, the transistor T ^ g is made non-conductive at the end of the period tp, so that at this point in time both transistors T ₁₁ and T _{12 are} non-conductive and the potential on the left side of the capacitor C ₃ rises as a result as illustrated by waveform (ii). As a result, the fall time of the output waveform (v) is reduced.

It can be seen that the duration tp of the output pulse depends solely on that determined by the values of C i and IL Charging time of the capacitor C ™ and not the duration of the Input pulse depends.

If the circuit according to the invention is integrated as Circuit executed, can for the transistors T ^ and T ^ 2 advantageously a common collector area be used.

- Claims -009852/1896

BAD ORiQfNAL

Claims (1)

20225A8 - 9 - ■■ .. ' claims Triggerable monostable circuit, characterized by a first and second transistor with similar conductivity and of the same conductivity type, their Collectors and emitters connected to one another in pairs are, through a third transistor, which is also of the same conductivity type, through a means for applying of the input signal to the base of the first transistor, through a capacitor connected between the collectors of the first and second transistor and the base of the third Tranaistore is connected through a first voltage supply terminal connected to the emitter of the third Transistor is connected, through a second power supply terminal, a first resistor which is connected between the Collectors of the first and second transistor and the second voltage supply connection is connected, a second transistor which is connected between the collector of the third transistor and the second voltage supply connection and by a third resistor between; the base of the third transistor and the wide voltage supply connection is connected. 2. Monostable circuit according to claim 1, characterized in that it also includes a fourth transistor of the same line type as the other three, and ■ that its input electrode connects to the base of the third Transistor is connected, the fourth transistor serves to work as a switching transistor to provide an output gas signal with two sweep values. 009852/1896 - ίο - 3 * monostable circuit according to claim 3 »characterized in that the base electrode of the fourth transistor with the base of the third transistor and that the collector-emitter path of the fourth transistor in series with a fourth resistor is connected between the first and the second voltage supply terminal, the output signal from the connection point of the fourth transistor and the fourth resistance is removed. 4. Monostable circuit according to one of the preceding claims, and implemented as an integrated circuit on a single "chip", characterized in that the first and second transistors have a common collector area. 009852/1896