DE102010044134B4 - Radar transmitter signal generator and method for radar transmitter signal generation - Google Patents

Abstract

A radar transmitter signal generator (110) for generating a millimeter-wave radar signal, comprising: a signal pattern generator (114) having a clock signal input; a clock generator (112) for generating a clock signal at a clock signal output directly or indirectly connected to the clock signal input of the signal pattern generator (114); a signal mixer (116) for mixing a pattern signal generated by said signal pattern generator (114) with said clock signal or a clock-based modulation signal to produce a modulated signal as an intermediate for radar transmitter signal generation, said modulated signal being coherent with said pattern signal; a first frequency multiplier (319) for multiplying the frequency of the modulated signal and generating a frequency-multiplied modulated signal; and a second frequency multiplier (219) for further multiplying the frequency of the frequency-multiplied signal to a radar transmission frequency range; wherein the first frequency multiplier (319) is associated with an intermediate frequency subassembly and the second frequency multiplier (219) is associated with a radio frequency subassembly, and wherein the frequency multiplier stages (219, 319) are configured such that no unwanted mixing products are folded into the wanted signal.

Description

The present invention relates to the generation of a radar transmission signal, and more particularly to techniques for achieving a desired frequency range for the radar transmission signal.

The ever-increasing demand for high-resolution sensors has led to the development of powerful radar systems, such. B. in modern automobiles, aircraft, drones, railways or other vehicles are used. This development continues. Increasingly, radar systems are in demand and developed, which are compact and inexpensive and require the least possible effort in the production, maintenance and during operation.

While the first radar systems and also a large part of the radar systems still in use today have the task of determining the distance and / or the direction of individual objects, so-called imaging radar systems have also been increasingly developed since the early 1990s. In the publication "Recent Advances in 94 GHz FMCW Imaging Radar Development" (IEEE IMS 2009, pages 77-80) D. S. Goshi et al. a. from Honeywell International, Torrance, USA, that in the early 1990's, synthetic vision systems were developed using both a 35 GHz pulse radar technique and a 94 GHz Frequency Modulated Continuous Wave (FMCW) radar technology to display a real time image a runway as a head-up display when landing in poor visibility conditions. The by D. S. Goshi u. a. The radar system proposed in the cited publication is a radar system in the millimeter wavelength range (mmW). The radar system operates at a frequency of 94 GHz and is a Frequency Modulated Continuous Wave (FMCW) radar system. The so-called FMCW Exciter is based on a direct digital synthesizer (Direct Digital Synthesizer: DDS). The DDS generates a signal that is located in the X-band of the radar system and has a high linearity. The Exciter includes its own built-in clock. However, the DDS receives its control signals from a computer module in the form of an industrial PC.

Slawomir Plata from the Telecommunications Research Institute, Gdansk Division, Poland describes in the publication PLATA, S .: FMCW Radar Transmitter based on DDS synthesis. In: International Conference on Microwave, Radar & Wireless Communications, MIKON 2006, pp. 1179-1183, some aspects of building a FMCW radar transmitter based on a DDS. According to this publication, significant parameters of these radar systems are a capability of detecting small targets, small resolution cell sizes, and high range resolution. The implementation of such radar systems, according to the Plata publication, requires solving a problem of generating microwave signals with excellent linear frequency modulation and very good phase noise performance. The basic principle here is also to supply the signal generated by the DDS by means of a quadrature modulator for frequency modulation in an intermediate frequency range (hereinafter and in the figures also by the abbreviation IF for "intermediate frequency") and to supply the modulated signal to a frequency multiplier, with the aid thereof the signal is transferred to the desired transmission frequency range.

As mentioned, in order to achieve a good accuracy of the radar system, high demands are placed on the linearity and the phase noise behavior of the radar system and in particular of the transmitting part. In addition, the accuracy of the radar system can also be increased by exploiting any coherence of certain signals that occur or are generated within the radar system. For example, by such measures, the occurrence of a systematic or random phase error in the course of a frequency modulation could be reduced or prevented, which could arise without consideration of the coherence between the useful signal (for example generated by a DDS) and the modulation signal.

Coherence means here and below that the phase reference between two or more signals, eg. B. the useful and modulation signal, stable and known. In an ideal coherent radar device, it should be noted in this connection that the period lengths of all occurring repetition rates of the phase equality are integer multiples of the period duration of the PRF period (Pulse Repetition Frequency).

An object of the present invention is to improve a radar system in terms of its accuracy. An alternative object or a supplementary task is to replace or supplement complex precautions to achieve high accuracy by simpler and / or less expensive measures.

At least one of said objects and / or any further tasks is achieved by a radar transmitter signal generator according to claim 1 or a method for Radarsendesignalerzeugung according to claim 14 or a computer program according to claim 15.

The inventive concept for generating a radar transmission signal based on the fact that a clock signal is used for both a generation of a pattern signal in the baseband and for a frequency modulation of this pattern signal. Frequency conditioning techniques that operate on the pattern signal are derived from a single, highly stable clock frequency that is also used in the generation of the pattern signal. Due to this relationship, corresponding high and intermediate frequency signals occurring in such a radar system are coherent with each other. This makes it possible to perform coherent radar measurements. A radar system having a radar transmitter signal generator in accordance with the teachings disclosed herein thus operates in a fully coherent manner.

In comparison to classical radar applications, novel radar applications such as imaging radar systems or near-field radar require a higher quality of the radar pattern signal (impulses, pulse sequences or chirp signal) since even the slightest deviation from the ideal signal form of the pattern signal can lead to high inaccuracies and errors in the evaluation of the detected radar signal.

Preferably, the modulated signal can be supplied to a frequency multiplication, so that at the output of a corresponding frequency multiplier there is a frequency-multiplied signal which accurately maps the modulated signal with respect to its signal form. Due to the frequency multiplication, the frequency-multiplied signal differs from the modulated signal not only in the position in the frequency domain but also in the bandwidth. The bandwidth is multiplied at a pure frequency multiplication with the same factor as the position in the frequency domain.

The modulated signal may be at an intermediate frequency of the radar transmitter signal generation at which signal processing operations may be performed (eg, filtering, sideband selection, etc.). At common intermediate frequencies, these signal processing operations can be achieved using standard available components without resorting to specialized high frequency techniques.

In general, it is necessary to convert the radar transmission signal from the intermediate frequency into the high-frequency range or to shift at which the radar system is to operate. This frequency conversion can be done by means of a frequency multiplier, which may be a high frequency component. Frequency multiplication in the RF range can be achieved using monolithically integrated millimeter-wave components (MMICs).

The frequency multiplier may include a phase locked loop (PLL). A frequency multiplier based on a phase locked loop typically has a frequency divider in a feedback loop of the phase locked loop. The phase-locked loop ensures that the phase of the feedback output signal substantially coincides with the phase of the input signal. If the output signal in the feedback branch is frequency-divided, the phase-locked loop attempts to generate the output signal such that its frequency-divided version substantially coincides with the input signal with regard to its phase position. Typically, the phase-locked loop ensures a match of the phase positions between the input signal and the feedback, optionally frequency-divided output signal within a tolerance range. Typically, this tolerance range is relatively narrow, for example ± 5 degrees or ± 10 degrees. Thus, a high degree of coherence can be maintained even in frequency multiplication operations.

The signal pattern generator may be a Direct Digital Synthesizer (DDS). Direct Digital Synthesis (DDS) is a technique for using digital data processing blocks as a means to produce a frequency and phase adjustable output related to a fixed frequency precision clock source. In the DDS, the reference frequency is used in the manner for generating the output signal, in which amplitude values are provided at temporally identical interval intervals. The interval distances stand thereby in a fixed relation to the period duration, which corresponds to the DDS reference clock frequency. The thus generated amplitude values describe in their temporal sequence the output signal generated by the DDS.

A DDS can typically be divided into three blocks: a phase accumulator, a phase-to-sine converter, and a digital-to-analog converter. The first two blocks are digital circuits on a DDS. The phase accumulator is basically an adder with a programmable step size (ΔPhase) representing the phase step that is passed through by the output signal during each or a fixed number of clock cycles. At each clock cycle, the phase accumulator represents the phase of the output sine wave The signal output to the phase accumulator is a digital ramp function having a frequency equal to the frequency of the output sine wave, unless the phase-to-sine converter utilizes any symmetry characteristics of the generated sinusoid. The phase-to-sine converter detects the output of the phase accumulator and sets a Sine amplitude output in bit representation ready. This function may be performed by a look-up table stored in a memory, or the sine values may be calculated by a digital algorithm. The phase accumulator and the phase-to-sine converter together form a DDS system with a digital output. The digital output is useful in many applications as a frequency reference (digital demodulation as an example), but most applications of direct digital synthesizers require a transformation of the digital sine wave into an analog frequency reference. If the phase step width (Δ phase) with which the phase accumulator is incremented or decremented varies in time, a chirp signal is produced. This variation of the phase step size (ΔPhase) can z. B. be achieved by a Frequenzakkumulator, which is preceded by the Phasenakkumulator. The value of the frequency accumulator, which is also updated periodically with the reference clock from the DDS, or a fixed multiple of the period of the reference clock, thereby serves the Phasenakkumulator as a step size. If the frequency step width (ΔFrequency) is incremented or decremented by the frequency accumulator with a constant value, a linear chirp results. However, the phase variation for the phase accumulator can also be stored in a storage medium, which also outputs its varying storage values cyclically to the phase accumulator and thus specifies the variable phase step size. The cyclic memory value output is based on a fixed ratio to the reference clock of the DDS. In both above-mentioned named variations of the phase step width (Δ phase), a complete cycle of the pattern signal would correspond to a single pass through the chirp pattern, ie from the lower start frequency to the upper end frequency and / or in the opposite direction. Other waveforms can also be generated by the DDS, such as: B. any pulse trains.

With novel DDS chips, it has become possible to practice the teachings disclosed herein. Due to the shared clock, the essential signals are coherent within the radar system. The combination of multiplication and addition, derived from a single clock frequency, produces a signal which, by further multiplication down to the millimeter-wave range, is suitable for applications requiring high signal fidelity and coherence due to phase stability and linearity, especially for SAR (Synthetic Aperture Radar). and ISAR (Inverse Synthetic Aperture Radar) applications.

In a radar transmitter signal generator in accordance with the teachings disclosed herein, a distribution structure for the clock signal may be provided which is configured to coherently distribute the clock signal generated by the clock to at least the signal pattern generator and the signal mixer. The distribution structure can be designed, for example, such that runtime differences between an interface to the signal pattern generator and an interface to the signal mixer are as low as possible or at least precisely known. This can also be extended to other interfaces with other components of the radar transmitter signal generator or of the entire radar system. To compensate for differences in length of the various branches of the distribution structure, shorter branches z. B. be equipped with a delay element or a delay line. The clock and distribution structure are typically digital devices, however, which already take into account the requirements of the analog signals processed by the radar transmitter signal generator, typically in particular with respect to the phase relationship and relationship.

Furthermore, it can be provided that the modulation signal is processed by a modulation signal frequency multiplier which is arranged between an output of the clock generator for the clock signal and a clock signal input of the signal mixer. Thereby, the modulation signal can be designed by reshaping or processing the clock signal so that the modulation signal is at a frequency provided for the desired frequency modulation of the pattern signal by the signal mixer. Since, as described above, the process of frequency multiplication introduces little if any phase error, which is generally negligible, the desired coherence of the modulation signal with other signals occurring in the radar transmitter signal generator is virtually unaffected. In this way, a modulation signal can be generated at the required frequency, which is substantially coherent with the clock signal.

In embodiments, the radar transmitter signal generator may further comprise a plurality of locally distributed frequency multipliers. The locally distributed frequency multipliers are each arranged in spatial proximity to an associated radar antenna element. Furthermore, the radar transmitter signal generation may include an intermediate distribution for distributing the modulated signal to the plurality of locally distributed frequency multipliers. For example, this intermediate distribution may be based on coaxial cables and mating connectors (Y-splitters, T-splitters, etc.). For example, some radar systems that are currently being developed for the automotive industry use multiple radar antenna elements attached to different ones Positions of the vehicle are arranged, however, are fed by a common Radarsendesignal. The feeding of the Radarsendesignals in the various antenna elements can either be done simultaneously or in a cyclically alternating manner, in the latter case, the signal paths to the individual antenna elements are individually controllable, that can be switched on and off. One or more final stages of the frequency conversion take place only in spatial proximity to the respective antenna element in order to avoid the transmission of high-frequency radar transmitter signals over relatively long distances (relative to the wavelength). Any necessary amplification can be done either by the respective frequency multiplier or an additional power amplifier. Likewise, a filter may be provided to filter the frequency-multiplied signal. A coaxial intermediate frequency distribution, for example at a center frequency of 7.833 GHz for the cost-efficient realization of spatially distributed 94 GHz systems can be so easily perform. The intermediate distribution may also distribute a signal to the plurality of locally distributed frequency multipliers that is already a result of frequency multiplication of the modulated signal. The term of the modulated signal accordingly comprises not only a signal output directly from the signal mixer, but also a signal based thereon which has already been further processed, as described, for example, in US Pat. B. may arise due to a frequency multiplication. In other words, the modulated signal may have undergone frequency multiplication prior to distribution through the intermediate distribution, and then undergo a second frequency multiplication by the plurality of locally distributed frequency multipliers to the desired radar transmit frequency. Likewise, the modulated signal may be filtered prior to being fed to the intermediate distribution without fundamentally altering its modulated signal property.

According to embodiments, the radar transmitter signal generator may further comprise at least one bandpass filter for filtering at least one signal, the signal to be filtered being selected from a group comprising the following signals: the clock signal, the modulation signal, the modulated signal and the frequency multiplied signal. Further bandpass filters and other filters may be provided in the radar transmitter signal generator as needed. It may be advantageous to filter the radar transmission signal at a frequency in the intermediate frequency range or in a medium frequency range, since in the intermediate frequency range the bandwidth of the radar transmission signal is smaller than in the high frequency range. Bandpass filtering in the high frequency range would require a high bandwidth bandpass filter in the form of a high frequency component.

According to embodiments, the radar transmitter signal generator may further comprise a first frequency multiplier for multiplying the frequency of the modulated signal and generating a frequency-multiplied modulated signal. It may also include a second frequency multiplier for further multiplying the frequency of the frequency-multiplied signal to a radar transmission frequency range. The first frequency multiplier may be associated with an intermediate frequency subassembly and the second frequency multiplier may be associated with a radio frequency subassembly. By this two-stage structure of the frequency multiplication of the frequency range of the modulated signal to the Radarsendefrequenzbereich a part of the frequency multiplication can still be done in the intermediate frequency range with the technology used there. Only the second stage, which is implemented in the RF assembly, typically relies on more expensive high frequency technology and components. The acting in the intermediate frequency range first frequency multiplier stage may, for. B. be variable and controllable in terms of frequency multiplication factor, so that different Frequenzvervielfachungsbetriebsarten be implemented by appropriate control commands or configurations. The high-frequency module, in contrast, can provide a fixed, unchanging frequency multiplication without this being absolutely necessary.

The intermediate frequency subassembly and the radio frequency subassembly may be implemented together in planar chip technology. The merging of the two modules in the intermediate frequency and high frequency range can lead to a highly integrated sensor system in planar chip technology on a few square centimeters.

The first frequency multiplier can multiply the frequency by an integer factor between 2 and 6. The second frequency multiplier can make a (further) multiplication of the frequency by an integer factor between 4 and 30. A typical factor for the first frequency multiplier is 4 and a typical factor for the second frequency multiplier is 12, resulting in a total frequency multiplier of 48. The arrangement for frequency multiplication in the intermediate frequency range (that is, to some extent the transfer of first frequency multiplier to second frequency multiplier) is chosen so that it can be used for a variety of radar systems for any frequency ranges above 1 GHz. This allows the important frequency ranges 10 GHz, 35 GHz, 78 GHz, 94 GHz and 210 GHz to be mapped.

In embodiments of a radar transmitter signal generator or method according to the teachings disclosed herein, the pattern signal is present in a frequency range up to 1 GHz and the modulated signal in a frequency range of about 1 GHz to about 30 GHz.

A method of radar transmitter signal generation, in accordance with the teachings disclosed herein, comprises generating a clock signal, generating a pattern signal using the clock signal, and mixing the pattern signal and the clock signal to obtain a modulated signal. The method of radar transmitter signal generation may be further specified by such technical features as disclosed and claimed in connection with the radar transmitter signal generator.

Preferred embodiments of the present invention will be explained below with reference to the accompanying drawings. Show it:

1 a schematic block diagram of a radar system with a Radarsendignalerzeuger according to the teachings disclosed herein;

2 a schematic block diagram of a radar system with an alternative embodiment of a Radarsendignalerzeugers according to the teachings herein disclosed;

3 a schematic block diagram of a radar system with yet another embodiment of a Radarsendesignalerzeugers according to the teachings herein disclosed;

4 a schematic block diagram of a radar system similar to 3 with specific exemplary frequency values;

5 a frequency domain diagram illustrating the in 4 carried out frequency treatment process;

6 a diagram illustrating the frequency of an exemplary chirp signal as a function of time;

7 illustrates a cycle of a chirp signal;

8th FIG. 12 is a schematic flow diagram of a method of radar transmitter signal generation in accordance with an embodiment of the teachings disclosed herein; FIG.

9 shows a schematic block diagram of a distribution structure for the clock signal; and

10 shows a schematic block diagram of an embodiment with locally distributed frequency multipliers and associated antenna elements.

1 shows a radar system 100 with a radar transmitter signal generator 110 , a receiver or receiver 140 and a radar evaluation unit 160 , The radar system 100 also includes a transmitting antenna 122 and a receiving antenna 123 however, which may also be grouped together as a unit and may physically consist of a single antenna or antenna array. The radar system 100 is designed to be over the transmit antenna 122 to emit a radar signal and an echo caused by the radar signal emitted by means of the receiving antenna 123 The received radar echo is received in the receiver 140 prepared, so in particular reinforced. The processed radar echo then becomes the radar evaluation unit 160 fed. The radar evaluation unit 160 Also receives an image of the radar transmission signal, as from the transmitting antenna 122 is emitted. For this purpose, a signal extraction 124 in the signal feed to the transmitting antenna 122 arranged, which picks up a part of the Radarsendesignals and the Radarauswertungseinheit 160 supplies. In the radar evaluation unit 160 the received radar echo is compared with the radar transmission signal, in particular with regard to a delay of the received radar echo with respect to the radar transmission signal and / or a frequency shift. A frequency shift between the original radar transmit signal and the received radar echo indicates movement of a remote object at which the radar signal was reflected. From the value of the frequency shift, the speed of the remote object can be determined, which is exploited in radar systems based on the Doppler effect.

The radar transmitter signal generator 110 includes a clock 112 (Abbreviation CLK for "Clock"). One from the clock 112 generated clock signal becomes a signal pattern generator 114 (Abbreviation SG for "signal generator") supplied. The signal pattern generator 114 generates characteristic pattern signals which are timed to correspond to the specification of the clock signal. The signal pattern generator usually generates a cyclically repeating signal section.

The generated pattern signal is transmitted via a corresponding output of the signal pattern generator 114 to a mixer 116 to hand over. An optional bandpass filter 113 filters the clock signal when needed and, if desired, such that substantially only the fundamental frequency of the clock signal remains in the form of a sine wave, instead a bandpass filter can be the filter 113 also be a low pass filter. The mixer 116 receives at a second signal input from the clock 112 output clock signal. The mixer 116 modulates the pattern signal with the clock signal, the clock signal typically having a higher frequency than the pattern signal. One from the mixer 116 generated modulated signal goes through an optional further signal conditioning 118 in which it is converted for the purposes as Radarsendesignal. Although it is usually common for the mixer to do this 116 output modulated signal is at least frequency converted and amplified, it could be the optional further signal conditioning 118 go through without modification.

The two the mixer 116 signals supplied as input signals, namely the pattern signal and the clock signal, go indirectly or directly to the reference clock 112 back. As a result, they are highly coherent with each other and also by the mixer 116 generated product in the form of the modulated pattern signal is coherent with the clock signal. If it is in the pattern signal generator 114 a systematic, known delay in the processing of the clock signal may occur in the connection from the clock 112 to the mixer 116 a delay element may be arranged that takes into account this known delay. The optional character of this delay element is described in the description of 9 in more detail.

As mentioned earlier, the main feature of the triangle setup is the mixer 116 , Signal pattern generator 114 together with the reference clock 112 the one that both the mixer 116 supplied input signal indirectly or directly from the signal of the reference clock 112 be derived. By "direct" in this context is meant that the signal of the reference clock 112 without further frequency conversion the signal pattern generator 114 and / or mixers 116 is supplied. By "indirect" supply in this context is meant that the reference clock passes through one or more frequency multipliers and / or frequency dividers before passing it to the signal pattern generator 114 and / or the mixer 116 is supplied. In this case, the factor of the frequency conversion in the branch between the reference clock 112 and the signal pattern generator 114 have a different or identical value, such as the frequency conversion factor in the branch between the reference clock 112 and the mixer 116 (see, for example 3 and 4 ). Combinations of "direct" and "indirect" feed are also possible. So z. B. the reference clock from the reference clock to the mixer 116 be supplied without additional frequency conversion. At the same time, the reference clock signal passes through to the signal pattern generator 114 but still a frequency divider. For each frequency conversion implemented, it is tacitly assumed here that filtering of the converted signals corresponding to the frequency conversion can be carried out. It is also assumed that the signal pattern generator 114 provides a signal that already contains no image frequencies.

2 shows a similar schematic block diagram as 1 , The radar transmitter 110 is here divided into an intermediate frequency section (IF) and a high frequency section (HF). The intermediate frequency section includes the clock 112 , the pattern signal generator 114 and the mixer 116 , The high frequency section 218 includes a frequency multiplier 219 that of the mixer 116 output modulated signal so that all occurring in the modulated signal frequencies are multiplied by a frequency multiplication factor M ₃ . The spectrum of the modulated signal is thus shifted according to the Frequenzvervielfahungsfaktor M ₃ to higher frequencies, whereby the bandwidth of the modulated signal is increased accordingly. The frequency multiplication factor M ₃ is usually an integer, positive number. Rationalized frequency multiplication factors may be implemented, if desired and / or required, by sequential frequency multiplication and frequency division.

Frequently, in the context of radar systems, the convention that all frequencies above 20 GHz are referred to as radio frequency (RF) and all the underlying frequencies as intermediate frequency (IF). Since that of the signal pattern generator 114 generated pattern signal includes a frequency spectrum that is mostly located in the megahertz range and has no DC component (0 Hz), the signal pattern generator 114 be regarded as a component in the intermediate frequency range. The same applies to the clock 112 ,

In 2 includes the radar signal evaluation 160 a transmit / receive correlator 162 and a high pass filter 164 , The send / receive correlator 162 receives this from the signal extraction 124 decoupled radar transmission signal and that of the receiver 140 recycled radar echo. These two signals are compared, with a large match typically for a short signal transit time between the antennas 122 . 123 and the remote object. This typically results in a high output value of the transmit (receive correlator 162 , When a chip signal is used as the pattern signal, the similarity between the transmission signal and the radar echo is derived from the difference of the instantaneous frequencies of the two signals.

3 shows a schematic block diagram of another embodiment. The signal pattern generator 114 also receives control information from a control unit in addition to the clock signal f _CLK 306 , The control unit 306 in turn receives control signals from a superordinate device, such as an operating mode selector. The control unit 306 In this embodiment also has a USB port (Universal Serial Bus), via which the control unit 306 can be configured and / or programmed. The from the control unit 306 to the signal pattern generator 114 transmitted control signals may have various parameters that are needed for the pattern signal generation, such. B. lower and upper cutoff frequency of a chirp signal, a basic waveform (sine, rectangle, sawtooth, etc.), duration of a pattern signal cycle. Based on these specifications, the signal pattern generator generates 114 the pattern signal, which at the upper signal output of the signal pattern generator 114 to a low-pass filter 311 is issued. At the output of the low-pass filter, the pattern signal is present in a filtered version, which essentially occupies a frequency range from f _B1 to f _B2 . This signal is through an amplifier 312 reinforced and then the mixer 116 fed.

As related to the description too 1 and 2 already explained, the signal pattern generator receives 114 also the clock signal with the clock frequency f _CLK from the clock 112 so that the generation of the pattern signal can be synchronized with the clock signal.

Starting from the clock 112 the clock signal also becomes a clock frequency multiplier 313 fed. The clock frequency multiplier 313 performs a frequency multiplication on the clock signal according to a frequency multiplication factor M ₁ . By means of a bandpass filter 314 Any unwanted frequency components are removed from the frequency-multiplied clock signal. The thus filtered clock signal with the frequency M ₁ · f _CLK is also the mixer 116 fed. Optionally, the clock signal for the signal pattern generator 114 also behind the bandpass filter 314 and in front of the mixer 116 be partially decoupled, if this z. B. Benefits Regarding the Default Settings of the Signal 114 includes.

The pattern signal modulated in this way is passed through another bandpass filter 317 filtered with a passband of f _IF1 to f _IF2 . Depending on the purity of the mixing products of the mixer, the bandpass filter 317 also be designed as a high pass or low pass, so as to separate one of the sidebands of the mixer. A second frequency multiplier 319 results in a frequency multiplication of the modulated signal with a frequency multiplication factor M ₂ . This frequency duplication still takes place in the intermediate frequency range; the resulting frequency-multiplied modulated signal is thus in the frequency range up to 20 GHz according to the above convention. In 3 are the components, components and parts belonging to the intermediate frequency range through the dashed frame 301 summarized. Another bandpass filter 320 filters that out of the second frequency multiplier 319 incoming output signal, so that essentially only signal components in the frequency range from M ₂ · f _IF1 to M ₂ · f _{IF2 are} transmitted. At this point, that's from the bandpass 320 filtered signal from the intermediate frequency module or the signal pattern generation board 301 to a high frequency block 302 to hand over.

Within the high frequency block 302 Another frequency duplication takes place by means of the already 2 known frequency multiplier 219 , The associated frequency multiplication factor is M ₃ . Through the frequency multiplier 219 The original pattern signal is now placed in the intended transmission frequency range of the radar A power amplifier 321 amplifies the radar end signal thus generated, which then via the transmitting antenna 122 is emitted. The frequency range used by the radar _transmission signal extends from f _HF1 to f _HF2 .

Also run as high frequency components and then to the high frequency block 302 belonging to the receiving antenna 123 (if necessary with the transmitting antenna 122 coincident), a low-noise amplifier 340 (LNA: Low Noise Amplifier) and the transmit / receive correlator 162 , The send / receive correlator 162 is about the signal extraction 124 also with the output of the power amplifier 321 connected. A subarea of the spectrum of an output signal of the transmit / receive correlator which is of interest for the radar evaluation 162 is in the intermediate frequency range. This partial spectrum of interest is determined by means of the high-pass filter 164 filtered out and through an amplifier 366 strengthened. An output signal of the amplifier 366 can then be fed to a downstream Radarauswertung.

4 corresponds essentially to the block diagram 3 However, exemplary frequency ranges have been indicated for the operation of the radar transmitter signal generator 110 and in particular to illustrate the frequency conditioning performed therein. The clock 112 outputs the clock signal, which has a frequency of 916.5 MHz. The clock 112 and the clock signal are highly stable in frequency. Of the Signal pattern generator 114 is in the in 4 illustrated embodiment as a direct digital synthesizer (DDS) running. The DDS 114 creates a chirp digitally in the intermediate frequency range. The DDS used may be a commercially available component. The generated pattern signal is as previously from the low-pass filter 311 filtered, resulting in a frequency range of 87 MHz to 164 MHz.

The clock signal at 916.5 MHz is provided by the frequency multiplier 313 doubled to 1833 MHz. The bandpass filter 314 typically has its center frequency at about 1833 MHz accordingly. For the center frequency of the bandpass filter 314 can a tolerance range of z. B. 3 MHz or 5 MHz, so that the bandpass filter 314 even with relatively minor deviations from the double clock frequency of the clock 112 can fulfill its filter task. At the output of the filter 314 For example, the clock signal is essentially present as a sine oscillation at twice the original clock frequency, ie as a sine oscillation at the frequency 1833 MHz.

That through the optional amplifier 312 amplified pattern signal and the frequency multiplied clock signal are in the mixer 116 mixed. Thereby, the pattern signal is modulated with the substantially sinusoidal clock signal of double frequency. One of the resulting modulation products covers a frequency range from 1920 MHz to 1997 MHz. This modulation product is by means of the bandpass filter 317 filtered out for further signal processing. The frequency multiplier 319 implements a frequency multiplication factor of 4. The output signal covers a frequency range from 7.68 GHz to 7.99 GHz. This frequency range is still in the intermediate frequency range.

With the next signal processing step, the radar transmission signal is translated from the intermediate frequency range to the high frequency range. This happens within the high frequency block 302 in particular by means of a further frequency multiplier 219 , The corresponding frequency multiplication factor M ₃ is in the in 4 illustrated embodiment 12. The power amplifier 321 is in 4 labeled as "High Power Amplifier" (HPA).

The signal extraction 124 Disconnects 25 dB less signal to the transmit / receive correlator than the signal provided by the High Power Amplifier. The absolute signal level is approx. +21 dBm at the input of the transmitting antenna 122 , The frequency range covered by the radar transmission signal extends from 92.2 GHz to 96.0 GHz, ie the center frequency is approximately 94.0 GHz.

In the in 4 Radarsend signal generator shown can large parts of the frequency processing of Radarsendesignals in the intermediate frequency range and thus on the chirp board 301 done by means of commercial components. Only the last frequency multiplication step with the frequency multiplier factor of 12 requires implementation by means of components from high-frequency technology.

The radar system described here can, for example, operate according to the FMCW method (Frequency Modulated Continuous Wave) or else according to other radar methods (eg as Doppler radar, pulse Doppler radar, etc.). The presented method leads to modern, small and light radars, which do without complex and inefficient pulse generators and deliver their transmission power as a continuous power.

In particular, the technical teachings described herein may be used in a radar sensor operating at a frequency of 94 GHz, and in the intermediate frequency range through the DDS 114 digitally generated chirp is frequency multiplied by the novel processing described herein, and further frequency multiplication in the RF range provides a high bandwidth radar sensor at 94GHz.

The low-frequency chirp production is done digitally by the DDS 114 , The DDS 114 generates a linear chirp from 87 MHz to 164 MHz This signal is the one in the clock 112 provided reference oscillator mixed fixed frequency of 1833 MHz and filtered at 1960 MHz. The fixed frequency of 1833 MHz arises from the doubling of the clock frequency f _CLK of 916.5 MHz, the DDS 114 is provided as a tact. Then the signal is quadrupled and the output frequency between 7.686 GHz and 7.994 GHz is filtered with a bandpass filter. All required components up to 10 GHz can be used in SMD (surface-mounted device) technology. The radar chirp preparation in the intermediate frequency range is chosen to use a frequency twelfth stage designed especially for this approach and directly provides a signal with a center frequency of 94 GHz with a bandwidth of 3.7 GHz. In addition to the required high bandwidth, the specially designed frequency-twelfth stage also has a high conversion gain (ratio of output to input power), so that costly additional gain stages at the input and output of the frequency tweaking unit can be dispensed with. The specially designed frequency-twelfth stage is designed as a fully monolithic integrated circuit (MMIC), which includes a extremely compact design of the entire high-frequency part is possible.

According to an already implemented embodiment, the size of the manufactured chirp board is 301 less than 18 cm ² . The board has a USB interface. This can be programmed and save any chirp forms. For radar operation there are then 16 free selectable signal forms available.

Basically, the chirp board may have a synchronization mechanism consisting of freely programmable logic outputs (marker signals) which are software controlled in response to signal generation by the signal master generator 114 change their signal levels. Also included in the synchronization mechanism is a differential clock signal output, the clock signal via software variable frequency divider ratios from the reference signal of the clock 112 is derived.

Furthermore, the chirp board can have an optionally usable trigger input, as well as a signal input that can be used to influence the signal generation during operation.

The arrangement for frequency multiplication in the intermediate frequency range has been chosen so that it can be used for a variety of radar systems for any frequency ranges above 1 GHz. Thus, the important frequency ranges 10 GHz, 35 GHz, 78 GHz and 210 GHz can be mapped in addition to the 94 GHz system described above.

Examples:

35 GHz system: By changing the clock frequency f _CLK and the filter, an output frequency with a center frequency of 8.75 GHz can be set at the interface between the intermediate frequency range and the high frequency range. A subsequent frequency quadrupling results in a radar system at a center frequency of 35 GHz with a realizable bandwidth in the range of several GHz.

Theoretically, a filter bandwidth of 8.8 GHz can be achieved without the different mixing products of the frequency multiplier over the observation period of a complete chirp period overlap in frequency. However, this theoretical value presupposes ideal filters that do not exist in reality. Also limits the maximum clock frequency of the currently available on the market direct digital synthesizer (DDS) the real achievable bandwidth and the concomitant maximum output signal bandwidth of the output signal generated by the DDS.

Frequency bandwidths of 4 GHz are at a center frequency of 35 GHz with the here presented technical teaching and with the z. Z. on the market available components already without problems.

78 GHz system: By using the lower sideband in the already presented 94 GHz system, a radar system with a center frequency of 78 GHz and an RF bandwidth of z. B. 3.8 GHz can be created. Larger frequency bandwidths are possible. A radar system operating at 78 GHz could be used, in particular, in the increasingly growing automotive radar market with high innovation potential.

210 GHz system: Another variant consists in the possibility of placing a generated frequency of 8.75 GHz at the input of the frequency tweaking unit. The result is a useful signal at a center frequency of 105 GHz. A downstream frequency doubling leads to a radar system with a center frequency of 210 GHz. The achievable frequency bandwidth is in the range of two-digit GHZ range.

According to an optional aspect of the technical teaching presented here, care is taken at all stages to ensure that no unwanted mixing products are folded into the useful signal. Despite the frequency multiplication in the intermediate-frequency and high-frequency ranges, a system with very low phase noise is produced, which allows measurements in the near range as well as measurements up to one kilometer away with good dynamics.

The emergence of unwanted mixing products and phase noise will be avoided in the frequency multiplier stages in that firstly at its output next to the frequency component at the desired multiplication factor, no further frequency components result at other multiplication factors or other harmonic frequencies of the input signal, and secondly the phase noise at the input of the frequency multiplier at its output only by the principle unavoidable factor of 20 · log (multiplication factor) is degraded, that is added by the frequency multiplier no additional phase noise.

The different distribution of the multiplication factors in the intermediate frequency range (factor 4) and high frequency range (factor 12 at 78 GHz and 94 GHz, or factor 4 at 35 GHz) allows a very wide range of applications. This type of processing can also be implemented so-called MIMO (Multiple Input Multiple Output) systems, which require the simultaneous operation of multiple transmit and receive modules. In particular for future use in automotive radar technology, it is possible to build flexible systems whose field of application can continue to go beyond the range of application in distance warning radars due to the high radio frequency bandwidth and can identify any objects in front of or next to the vehicle. The operating voltage is in the already implemented embodiment 5 V for all components, so that the entire system can be operated with a single supply voltage.

5 represents some of the 4 occurring signals in the frequency domain schematically. Assuming that the DDS 114 generates a chirp signal between the lower limit frequency 87 MHz and the upper limit frequency 164 MHz, this relatively low-frequency pattern signal occupies a corresponding frequency range in the spectrum, but due to the sine characteristic underlying the chirp signal, essentially only one frequency is present at the same time a chirp cycle within the frequency range of 87 MHz to 164.5 MHz or in the reverse direction. With this definition, the chirp signal has at the output of the DDS 114 a bandwidth of 77.5 MHz.

The one from the mixer 116 The resulting modulation results in the generation of a modulation spectrum with a bandwidth of 77.5 MHz, which extends from 1920 MHz to 1997.5 MHz. The frequency of 1833 MHz of the frequency doubled clock signal is also shown in FIG 5 shown.

The modulated signal then becomes in the frequency multiplier 319 with the multiplication factor 4 to a frequency range of 7.68 GHz to 7.99 GHz. The corresponding bandwidth is 0.31 GHz. These frequency conditioning methods described so far take place in the intermediate frequency range.

Another frequency conditioning process takes place mm in the high frequency range. It is another multiplication by a factor of 12 to obtain the final radar transmission signal covering a frequency range between 92.2 GHz and 96.0 GHz in the form of a chirp signal. The bandwidth is 3.72 GHz. Compared to the original bandwidth of 77.5 MHz, that of the DDS 114 is delivered, the bandwidth of the final radar end signal is greater by a factor of 48.

6 shows by way of example the course of the frequency of the chirp signal over the frequency. The frequency increases linearly from the lower limit frequency f _B1 to the upper limit frequency f _B2 . This repeats cyclically with a period T _CS .

7 illustrates a possible output signal of the DDS 114 in the form of a chirp signal normalized to the range [-1; 1]. 7 is not necessarily to scale with respect to in the 4 and 5 specified frequency range from 87 MHz to 164.5 MHz.

8th shows a schematic flow diagram of a method for radar transmitter signal generation. This in 8th The illustrated process may not be executed sequentially, but may be performed substantially simultaneously by different components of a corresponding radar transmitter signal generator 110 be performed.

After the start of the method, a clock signal is first generated, as in the reference numeral 802 indicated block indicated. The generated clock signal is then, at 804 Furthermore, the clock signal is also used in the context of mixing the clock signal and the pattern signal, denoted by the reference numeral 806 designated box of the flowchart is represented. The modulated signal is then fed to a frequency multiplier, which results in 8th by the reference numeral 808 marked box is shown. Finally, the obtained radar transmission signal is included 810 emitted or emitted.

From the flow chart it can be seen that the result of the clock signal generation 802 both for the pattern signal generation 804 as well as for mixing the clock signal and the pattern signal 806 is used.

In 9 is a distribution structure 910 for the clock signal from the clock 112 to the signal pattern generator 114 and to the mixer 116 shown schematically as a block diagram. The distribution structure comprises a delay element in the illustrated embodiment 915 in the branch from the clock 112 to the mixer 116 runs. The delay element 915 delays the clock signal in this branch by a value τ, through which one through the signal pattern generator 114 introduced delay is substantially offset. The delay element 915 is however only optional and therefore does not have to be mandatory be provided. Since the clock signal is typically periodic anyway, the signal pattern generator 114 the generated pattern signal will also provide in the next, after etc. cycle of the clock signal at its output. For example, the signal pattern generator 114 have an output register (eg a "latch") which updates its register contents synchronously with the clock signal, ie loads the new register contents.

10 schematically shows a motor vehicle in plan view. The motor vehicle includes a radar system that has a central assembly 301 and distributed antennas 122-1 to 122-6 , The central assembly may, as indicated by the reference numeral, substantially the intermediate frequency subassembly 301 correspond in the 3 and 4 is shown. The locally distributed antennas 122-1 to 122-6 are distributed on the circumference of the motor vehicle, with three antennas 122-1 to 122-3 are arranged on the vehicle front, two antennas 122-4 and 122-5 on the sides and an antenna 122-6 at the rear of the vehicle. This arrangement is purely exemplary; other arrangements with more or less locally distributed antenna are conceivable.

The central assembly 301 includes the clock 112 , the signal pattern generator 114 and the mixer 116 , which, however, for reasons of space in 10 Also not shown are the central assembly 301 the frequency multiplier 319 which places the modulated signal in an intermediate frequency range. That of the frequency multiplier 319 output signal leaves the central assembly and has a coherent distribution structure 1010 to the locally distributed antennas 122-1 to 122-6 distributed. Close to each one of the locally distributed antenna 122-1 to 122-6 is in each case another frequency multiplier 219-1 to 219-6 arranged and with the respective antenna element 122-1 to 122-6 connected. The respective further frequency multiplier 219-1 to 219-6 multiplies the frequency of the central module 301 provided modulated signal by the factor M ₃ , so that the frequency range provided for the operation of the radar system is reached, for example 94 GHz. The respective further frequency multipliers 219-1 to 219-6 can as part of a respective high-frequency module 302-1 to 302-6 be educated. Furthermore, the respective antenna element 122-1 to 122-6 also in the corresponding high-frequency module 302-1 to 302-6 be integrated. Not shown in 10 the signal decouplings in the 1 to 4 the component with the reference numeral 124 correspond. The high frequency assemblies 302-1 to 302-6 can also each have a send / receive correlator 162 and LNA 340 include (both not shown in 10 ).

If necessary, runtime differences can occur in the different branches of the distribution structure 1010 occur by delay elements 320-1 to 320-6 be largely compensated.

Although some aspects have been described in the context of a device, it will be understood that these aspects also constitute a description of the corresponding method, so that a block or a component of a device is also to be understood as a corresponding method step or as a feature of a method step. Similarly, aspects described in connection with or as a method step also represent a description of a corresponding block or detail or feature of a corresponding device. Some or all of the method steps may be performed by a hardware device (or using a hardware device). Apparatus), such as a microprocessor, a programmable computer or an electronic circuit. In some embodiments, some or more of the most important method steps may be performed by such an apparatus.

Depending on particular implementation requirements, embodiments of the invention may be implemented in hardware or in software. The implementation may be performed using a digital storage medium, such as a floppy disk, a DVD, a Blu-ray Disc, a CD, a ROM, a PROM, an EPROM, an EEPROM or FLASH memory, a hard disk, or other magnetic disk or optical memory are stored on the electronically readable control signals that can cooperate with a programmable computer system or cooperate such that the respective method is performed. Therefore, the digital storage medium can be computer readable.

Thus, some embodiments according to the invention include a data carrier having electronically readable control signals capable of interacting with a programmable computer system such that one of the methods described herein is performed.

In general, embodiments of the present invention may be implemented as a computer program product having a program code, wherein the program code is operable to perform one of the methods when the computer program product runs on a computer.

The program code can also be stored, for example, on a machine-readable carrier.

Other embodiments include the computer program for performing any of the methods described herein, wherein the computer program is stored on a machine-readable medium.

In other words, an embodiment of the method according to the invention is thus a computer program which has a program code for performing one of the methods described herein when the computer program runs on a computer.

A further embodiment of the inventive method is thus a data carrier (or a digital storage medium or a computer-readable medium) on which the computer program is recorded for carrying out one of the methods described herein.

A further embodiment of the method according to the invention is thus a data stream or a sequence of signals, which represent the computer program for performing one of the methods described herein. The data stream or the sequence of signals may be configured, for example, to be transferred via a data communication connection, for example via the Internet.

Another embodiment includes a processing device, such as a computer or a programmable logic device, that is configured or adapted to perform one of the methods described herein.

Another embodiment includes a computer on which the computer program is installed to perform one of the methods described herein.

Another embodiment according to the invention comprises a device or system adapted to transmit a computer program for performing at least one of the methods described herein to a receiver. The transmission can be done for example electronically or optically. The receiver may be, for example, a computer, a mobile device, a storage device or a similar device. For example, the device or system may include a file server for transmitting the computer program to the recipient.

In some embodiments, a programmable logic device (eg, a field programmable gate array, an FPGA, or a programmable logic device, a PLD) may be used to perform some or all of the functionality of the methods described herein. In some embodiments, a field programmable gate array may cooperate with a microprocessor to perform one of the methods described herein. In general, in some embodiments, the methods are performed by any hardware device. This may be a universal hardware such as a computer processor (CPU) or hardware specific to the process, such as an ASIC.

The embodiments described above are merely illustrative of the principles of the present invention. It will be understood that modifications and variations of the arrangements and details described herein will be apparent to others of ordinary skill in the art. Therefore, it is intended that the invention be limited only by the scope of the appended claims and not by the specific details presented in the description and explanation of the embodiments herein.

Claims (15)

Radar transmitter ( 110 ) for generating a millimeter-wave radar signal, comprising: a signal pattern generator ( 114 ) with a clock signal input; a clock ( 112 ) for generating a clock signal at a clock signal output connected to the clock signal input of the signal pattern generator ( 114 ) is directly or indirectly connected; a signal mixer ( 116 ) for mixing one of the signal pattern generator ( 114 ) generate a pattern signal with the clock signal or a clock signal based on the modulation signal for generating a modulated signal as an intermediate for the Radarsendesignalerzeugung, wherein the modulated signal is coherent with the pattern signal; a first frequency multiplier ( 319 ) for multiplying the frequency of the modulated signal and for generating a frequency-multiplied modulated signal; and a second frequency multiplier ( 219 ) for further multiplying the frequency of the frequency-multiplied signal to a radar transmission frequency range; wherein the first frequency multiplier ( 319 ) is associated with an intermediate frequency subassembly and the second frequency multiplier ( 219 ) is assigned to a high-frequency module, and where the frequency multiplier stages ( 219 . 319 ) are designed so that no unwanted mixing products are folded into the useful signal. Radar transmitter ( 110 ) according to claim 1, wherein the frequency multiplier ( 219 ; 319 ) has an input for the modulated signal for generating a frequency-multiplied signal. Radar transmitter ( 110 ) according to claim 1 or 2, wherein the second frequency multiplier ( 219 ) is a high frequency component. Radar transmitter ( 110 ) according to claim 2 or 3, wherein the frequency multiplier ( 219 ; 319 ) comprises a phase locked loop. Radar transmitter ( 110 ) according to one of the preceding claims, wherein the modulated signal is present at an intermediate frequency of the radar transmitter signal generation. Radar transmitter ( 110 ) according to one of the preceding claims, wherein the signal pattern generator ( 114 ) is a direct digital synthesizer. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, further comprising a coherent distribution structure for the clock signal, designed the clock signal generated by the clock to at least the signal pattern generator ( 114 ) and the signal mixer ( 116 ) to distribute. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, further comprising a modulation signal frequency multiplier ( 313 ), located between the clock signal output of the clock ( 112 ) and a clock signal input of the signal mixer ( 116 ). Radar transmitter signal generator ( 110 ) according to one of the preceding claims, further comprising a plurality of locally distributed frequency multipliers, each arranged in spatial proximity to an associated radar antenna element, and a coherent intermediate distribution for distributing the modulated signal to the plurality of locally distributed frequency multipliers. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, further comprising at least one band-pass filter for filtering at least one signal selected from the clock signal, the modulation signal, the modulated signal and the frequency-multiplied signal. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, wherein the intermediate frequency subassembly and the radio frequency subassembly are implemented together in planar chip technology. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, wherein the first frequency multiplier ( 319 ) multiplies the frequency by an integer factor between 2 and 4 inclusive and the second frequency multiplier ( 219 ) makes a multiplication of the frequency by an integer factor between 4 and 30 inclusive. Radar transmitter signal generator ( 110 ) according to one of the preceding claims, wherein the pattern signal is present substantially in a frequency range up to 1 GHz and wherein the modulated signal is present substantially in a frequency range of 1 GHz to 30 GHz. A method of generating radar signals in the millimeter-wave range of a radar signal, comprising: generating ( 802 ) of a clock signal; Generation ( 804 ) a pattern signal using the clock signal; and mixing ( 806 ) the pattern signal with the clock signal or a clock-based modulation signal to obtain a modulated signal, the modulated signal being coherent with the pattern signal; Multiplying the frequency of the modulated signal by means of a first frequency multiplier associated with an intermediate frequency subassembly to produce a frequency-multiplied modulated signal; and further multiplying the frequency-multiplied modulated signal to a radar transmitter frequency range by means of a second frequency multiplier associated with a radio frequency subassembly, wherein the frequency multiplies are performed such that no unwanted mixing products are folded into the useful signal. A computer program comprising program code for performing the method of claim 14 when the program is run on a computer.

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