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CN220253193U - Wafer cooling device - Google Patents

Wafer cooling device Download PDF

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Publication number
CN220253193U
CN220253193U CN202321861383.2U CN202321861383U CN220253193U CN 220253193 U CN220253193 U CN 220253193U CN 202321861383 U CN202321861383 U CN 202321861383U CN 220253193 U CN220253193 U CN 220253193U
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CN
China
Prior art keywords
wafer
space
cooling device
cooling
baffle
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Active
Application number
CN202321861383.2U
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Chinese (zh)
Inventor
南艳荣
刘明英
程里
肖志强
耿金旺
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Zhongxin North Integrated Circuit Manufacturing Beijing Co ltd
Semiconductor Manufacturing International Shanghai Corp
Original Assignee
Zhongxin North Integrated Circuit Manufacturing Beijing Co ltd
Semiconductor Manufacturing International Shanghai Corp
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Priority to CN202321861383.2U priority Critical patent/CN220253193U/en
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

The application provides a wafer cooling device, include: the top and the bottom of the shell are respectively provided with an air inlet and an air outlet, and the interior of the shell sequentially comprises a first space, a second space and a third space along the top to bottom direction of the shell; at least one guide plate which is arranged in the first space and provided with a plurality of guide holes; the wafer placing structure is arranged in the second space and is used for placing the wafer; the air pump is connected with the air outlet. The wafer cooling device can ensure that all wafers reach ideal cooling effect, shortens cooling time and improves productivity.

Description

Wafer cooling device
Technical Field
The present disclosure relates to semiconductor manufacturing technology, and in particular, to a wafer cooling device.
Background
In a wafer fabrication process, after the wafers are fabricated in the corresponding semiconductor device cavities, the wafers are typically placed on corresponding wafer carriers (e.g., wafer boats) and then cooled by introducing a cooling gas through the top of the wafer carriers. However, during the cooling process, heat may accumulate above the wafer carrier, resulting in a significant increase in the wafer temperature above the wafer carrier, which may not result in a desired cooling of the wafer.
Accordingly, it is desirable to provide a wafer cooling apparatus that can effectively solve the problem of poor wafer cooling effect.
Disclosure of Invention
The embodiment of the application provides a wafer cooling device, which comprises: the shell is characterized in that an air inlet and an air outlet are respectively formed in the top and the bottom of the shell, and a first space, a second space and a third space are sequentially formed in the shell along the direction from the top to the bottom of the shell; the at least one guide plate is arranged in the first space, and a plurality of guide holes are formed in the guide plate; the wafer placing structure is arranged in the second space and is used for placing the wafer; and the air pump is connected with the air outlet.
In some embodiments, the wafer cooling device further includes a partition plate disposed between the second space and the third space, and a plurality of through holes are formed in the partition plate.
In some embodiments, a sealing connection is formed between a circumferential edge of the separator plate and an inner sidewall of the housing.
In some embodiments, the diameter of the first space increases gradually in a top-to-bottom direction of the housing.
In some embodiments, the at least one baffle includes a first baffle and a second baffle in a top-to-bottom direction of the housing, the second baffle disposed between the first space and the second space.
In some embodiments, the first baffle has a diameter of 120mm to 150mm.
In some embodiments, the second baffle and/or the separator plate has a diameter of 320mm to 340mm.
In some embodiments, the number of deflector holes on the first deflector is 50 to 80, and the number of deflector holes on the second deflector and/or through holes on the separator is 80 to 120.
In some embodiments, the aperture of the deflector aperture and/or the through-hole is 2mm to 8mm.
In some embodiments, the wafer placement structure includes a multi-layer placement plate along a top-to-bottom direction of the housing, the placement plate for carrying the wafer.
According to the wafer cooling device, through the combination of the guide plate and the air pump, cooling gas can flow from the top to the bottom (namely from top to bottom) of the wafer cooling device, so that heat of wafers placed layer by layer in the wafer placing structure flows out of the bottom of the wafer cooling device, heat can be prevented from being gathered upwards, an ideal cooling effect can be achieved in a limited time by the upper layer of wafers placed closer to the top in the wafer placing structure, in addition, when the wafers are cooled by the wafer cooling device provided by the embodiment, as the wafers placed in the wafer placing structure are placed layer by layer from bottom to top, lower-layer wafers placed closer to the top in the wafer placing structure can be placed into the wafer placing structure earlier than upper-layer wafers, more cooling time can be achieved for the lower-layer wafers compared with the upper-layer wafers, even if the heat flows to the bottom, the ideal cooling effect can be achieved by the lower-layer wafers, and therefore all wafers in the wafer cooling device can be guaranteed to be uniformly cooled, and the overall cooling effect can be improved.
Drawings
The following figures describe in detail exemplary embodiments disclosed in the present application. Wherein like reference numerals refer to like structure throughout the several views of the drawings. Those of ordinary skill in the art will understand that these embodiments are non-limiting, exemplary embodiments, and that the drawings are for illustration and description purposes only and are not intended to limit the scope of the present application, other embodiments may equally well accomplish the intent of the utility model in this application. It should be understood that the drawings are not to scale.
Wherein:
fig. 1 is a schematic diagram of a wafer cooling apparatus according to some embodiments of the present application.
Detailed Description
The following description provides specific applications and requirements to enable any person skilled in the art to make and use the teachings of the present application. Various modifications to the disclosed embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments and applications without departing from the spirit and scope of the application. Thus, the present application is not limited to the embodiments shown, but is to be accorded the widest scope consistent with the claims.
In wafer fabrication process technology, the via material between the different metal layers in the wafer and the interconnect material of the metal layers are typically copper. When the wafer is subjected to chemical mechanical polishing, the microstructure of the copper surface layer in the wafer is usually lost due to mechanical force, so that the copper in the wafer is required to be subjected to heat treatment, the lattice loss of the copper caused by the chemical mechanical polishing is repaired, and the wafer is required to be cooled after the heat treatment of the copper is completed.
When cooling a wafer, the wafer is generally placed in a corresponding wafer carrier (e.g., a wafer boat), and the wafer is cooled down over time, which reduces the cooling efficiency of the wafer, so that the wafer requires more cooling time to cool down sufficiently, and delays the subsequent processing of the wafer, thereby increasing the time for wafer production and manufacturing, and resulting in reduced throughput.
At present, in order to improve the cooling efficiency of the wafer, a cylindrical tube is used to introduce a cooling gas (such as nitrogen) into the top of the wafer carrier to cool the wafer, and since the wafer is generally placed layer by layer in the wafer carrier from bottom to top, during the cooling process, the lower layer wafer first placed in the wafer carrier will be sufficiently cooled, but as more wafers are placed layer by layer in the wafer carrier, heat will be accumulated upwards, so that the upper layer wafer in the wafer carrier needs more cooling time, and the upper layer wafer in the wafer carrier cannot achieve an ideal cooling effect within a specified time, for example, does not drop to room temperature. If the wafer is not cooled to the desired level, the wafer is removed from the wafer carrier and transferred into the wafer cassette, and heat from the wafer is collected in the wafer cassette, which may cause a high temperature in the wafer cassette and result in failure of the die.
The embodiment of the application provides a wafer cooling device, which comprises a shell, wherein an air inlet and an air outlet are respectively formed in the top and the bottom of the shell, and a first space, a second space and a third space are sequentially formed in the shell along the top to bottom direction of the shell; at least one guide plate which is arranged in the first space and provided with a plurality of guide holes; the wafer placing structure is arranged in the second space and is used for placing the wafer; the air pump is connected with the air outlet. According to the wafer cooling device, through the combination of the guide plate and the air pump, cooling gas can flow from the top to the bottom (namely from top to bottom) of the wafer cooling device, so that heat of wafers placed layer by layer in the wafer placing structure flows out of the bottom of the wafer cooling device, heat can be prevented from being gathered upwards, an ideal cooling effect can be achieved in a limited time by the upper layer of wafers placed closer to the top in the wafer placing structure, in addition, when the wafers are cooled by the wafer cooling device provided by the embodiment, as the wafers placed in the wafer placing structure are placed layer by layer from bottom to top, lower-layer wafers placed closer to the top in the wafer placing structure can be placed into the wafer placing structure earlier than upper-layer wafers, more cooling time can be achieved for the lower-layer wafers compared with the upper-layer wafers, even if the heat flows to the bottom, the ideal cooling effect can be achieved by the lower-layer wafers, and therefore all wafers in the wafer cooling device can be guaranteed to be uniformly cooled, and the overall cooling effect can be improved.
The technical scheme of the utility model is described in detail below with reference to the examples and the accompanying drawings.
Fig. 1 is a schematic diagram of a wafer cooling apparatus according to some embodiments of the present application.
As shown in fig. 1, the wafer cooling apparatus 100 may include a housing 110, at least one baffle 120 (e.g., a first baffle 121 and/or a second baffle 122), a wafer placement structure 130, and an air pump 140. Wherein, air inlet 111 and gas outlet 112 have been seted up respectively at shell 110 top and top, shell 110 inside along the top of shell 110 to the bottom direction (i.e. the top down direction that shows in fig. 1) can include first space 113, second space 114 and third space 115 in proper order, guide plate 120 can set up in first space 113, a plurality of water conservancy diversion holes 123 have been seted up on the guide plate 120, wafer placement structure 130 can set up in the second space for place wafer 200, air pump 140 can be connected with the gas outlet.
In some embodiments, the wafer placement structure 130 may include multiple layers of placement plates 131 along the top-to-bottom direction of the housing 110, each layer of placement plates being operable to place the wafers 200, thereby ensuring that multiple wafers 200 can be placed in the wafer cooling apparatus 100 from top to bottom for cooling.
The operation of the wafer cooling device 100 will be described in detail with reference to the structure of the wafer cooling device 100.
When the wafer cooling device 100 works, the cooling gas can be introduced into the wafer cooling device 100 from the air inlet 111, i.e. firstly enters the first space 113, and then flows downwards into the wafer placing structure 130 in the second space 114 through the flow guiding holes 123 on the flow guiding plate 120, wherein the flow guiding effect of the flow guiding plate 120 can enable the air flow of the cooling gas to be more uniformly distributed in the wafer placing structure 130, so that the cooling effect of the cooling gas on the wafer in the wafer placing structure 130 is more uniform. The cooling gas (referred to as hot gas) that takes heat from the wafer 200 flows down into the third space 115 and is then pumped out of the gas outlet 112 by the gas pump 140 for cooling purposes. The hot air in the third space 115 is pumped away by the pumping force of the air pump 140, so that the flow of the cooling air in the wafer placing structure 130 in the wafer cooling device 100 can be accelerated, thereby being beneficial to improving the cooling speed of the wafer 200, enabling the wafer 200 to achieve an ideal cooling effect in a shorter time, and being beneficial to improving the related productivity of the wafer 200.
In the wafer cooling device 100 provided in this embodiment, the cooling gas flows from top to bottom under the guiding action of the guiding plate 120 and the pumping action of the air pump 140, so that the heat of the wafer 200 in the wafer placing structure 130 can be guided to flow downward, and then flows out from the air outlet 112 together, so that the heat can be prevented from being accumulated upward at the wafer 200 (simply referred to as an upper wafer) carried on the placing plate 131 located at the upper layer in the wafer placing structure 130, and the upper wafer is prevented from being cooled slower than the wafer 200 (simply referred to as a lower wafer) carried by the placing plate 131 located at the lower layer in the wafer placing structure 130, so that the upper wafer can achieve the ideal cooling effect in a limited time. It should be noted that, when the wafer cooling apparatus 100 works, the wafers in the wafer placement structure are placed layer by layer from bottom to top, so that the lower wafer is placed in the wafer placement structure 130 earlier than the upper wafer, and the lower wafer has more cooling time than the upper wafer, even if the heat flows downwards under the guidance of the cooling gas, the lower wafer and the upper wafer can achieve an ideal cooling effect within a limited time, so that all the wafers in the wafer placement structure can achieve an ideal cooling effect uniformly, and the overall cooling time required for achieving the ideal effect can be shortened, thereby being beneficial to improving the relevant productivity of the wafers.
In some embodiments, to block the hot gas in the third space 130 from flowing back (i.e. flowing upward), the wafer cooling device 100 may further include a partition plate 150 disposed between the second space 114 and the third space 115, and a plurality of through holes 151 may be formed on the partition plate 150, where the plurality of through holes 151 may allow the hot gas through holes coming out of the wafer placement 130 to enter the third space 115. Further, the edge of the isolation plate 150 may form a sealing connection with the inner sidewall of the housing 110, so as to ensure that the hot air can only enter the third space 115 through the through hole 151, and avoid the backflow of the hot air in the third space 115 caused by the gap between the edge of the isolation plate 150 and the inner sidewall of the housing 110. In some embodiments, the material of the separation plate 150 and the placement plate 131 may be a metal material such as stainless steel, which enables the separation plate 150 and the placement plate 131 to have high strength without being damaged. In some embodiments, a sealed connection may be formed between the edge of the spacer 1500 and the inner sidewall of the housing 110 by welding. In some embodiments, the spacer 150 may have a diameter of 320mm to 340mm. In some embodiments, the aperture of the through hole 151 may be 2mm to 8mm, so that the problem that the cooling effect of the wafer is affected due to the slower flow of the hot gas caused by too small aperture of the through hole 151 can be avoided, and the risk that the hot gas flows back upwards in the third space 115 due to too large aperture of the through hole 151 can be avoided. In some embodiments, the number of through holes 151 may be 80 to 120, so that the problem that the cooling effect of the wafer is affected due to the slower flow of hot gas caused by too small number of through holes 151 can be avoided, and the risk that hot gas flows back upwards in the third space 115 due to too large number of through holes 151 can be avoided.
In some embodiments, the diameter of the first space 113 may gradually increase along the top of the housing 110 toward the bottom, for example, the first space 113 may be in a horn shape, which is beneficial to increasing the contact area between the cooling gas and the wafer 200 in the wafer placement structure 130 after the cooling gas enters the second space 114 from the first space 113, so that the cooling gas can effectively take away the heat of the wafer 200, and the wafer 200 can quickly achieve an ideal cooling effect. Further, the at least one baffle 120 may include a first baffle 121 and a second baffle 122 along a top-to-bottom direction of the housing 110, wherein the second baffle 122 may be disposed between the first space 113 and the second space 114. In some embodiments, the first deflector 121 may have a diameter of 120 to 150mm and the second deflector 122 may have a diameter of 320 to 340mm. Through the arrangement of the first deflector 121 and the second deflector 122, when the cooling gas enters the first space 113, the cooling gas firstly flows into the second space 114 through the deflector holes 123 on the first deflector 121, and then flows into the second space 114 through the deflector holes 123 on the second deflector 122 to cool the wafer 200 in the wafer placing structure 130, wherein the cooling gas sequentially passes through the first deflector 121 and the second deflector 122, so that the cooling gas entering the second space 114 has a larger contact area with the wafer 200 in the wafer placing structure 130, and therefore the cooling gas can effectively take away the heat of the wafer 200, and the wafer 200 can quickly achieve an ideal cooling effect. In some embodiments, the at least one baffle 120 may include only the first baffle 121 or the second baffle 122, and may further include baffles other than the first baffle 121 and the second baffle 122, for example, a third baffle, a fourth baffle, or the like disposed above the first baffle 121 or between the first baffle 121 and the second baffle 122.
In some embodiments, the diameter of the flow guiding holes 123 on the first flow guiding plate 121 and the second flow guiding plate 122 may be 2mm to 8mm, so that the flow speed of the cooling gas may be limited to have a good cooling effect on the wafer. In some embodiments, the number of the flow guiding holes 123 on the first flow guiding plate 121 may be 50 to 80, and the number of the flow guiding holes 123 on the second flow guiding plate 122 may be 80 to 120, so that a larger contact area between the cooling gas and the wafer 200 in the wafer placing structure 130 after passing through the first flow guiding plate 121 and the second flow guiding plate 122 in sequence can be ensured, and therefore, the cooling gas can effectively take away the heat of the wafer 200, and the wafer 200 can quickly achieve an ideal cooling effect.
Possible beneficial effects of embodiments of the present application include, but are not limited to: (1) In the wafer cooling device provided by the embodiment of the application, through the combination of the guide plate and the air pump, the cooling gas can guide heat to flow downwards from top to bottom, so that heat can be prevented from gathering upwards, an ideal cooling effect can be achieved in a limited time by an upper layer wafer which is closer to the top in a wafer placing structure, and therefore, all wafers in the wafer cooling device can be guaranteed to uniformly achieve the ideal cooling effect, and the total cooling time required for enabling all the wafers to achieve the ideal effect can be shortened, and the improvement of the relevant productivity of the wafers is facilitated; (2) The cooling gas sequentially passes through the first guide plate and the second guide plate and enters the wafer placing structure, so that the cooling gas can be ensured to have larger contact area with the wafer in the wafer placing structure after sequentially passing through the first guide plate and the second guide plate, and therefore the cooling gas can effectively take away the heat of the wafer 200, and the wafer can quickly achieve an ideal cooling effect.
It should be noted that, the advantages that may be generated by different embodiments may be different, and in different embodiments, the advantages that may be generated may be any one or a combination of several of the above, or any other possible advantages that may be obtained.
While the basic concepts have been described above, it will be apparent to those skilled in the art that the foregoing detailed disclosure is by way of example only and is not intended to be limiting. Although not explicitly described herein, various modifications, improvements, and adaptations of the present application may occur to one skilled in the art. Such modifications, improvements, and modifications are intended to be suggested within this specification, and therefore, such modifications, improvements, and modifications are intended to be included within the spirit and scope of the exemplary embodiments of the present application.
It should be noted that, in the description of the present application, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "fixed" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; the device can be rotationally connected or slidingly connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in conjunction with the specific circumstances.
In addition, when terms such as "first," "second," "third," etc. are used in the present specification to describe various features, these terms are used merely to distinguish between the features and are not to be construed as indicating or implying any association, relative importance, or implicitly indicating the number of features indicated.
In addition, the present specification describes exemplary embodiments by reference to idealized exemplary cross-sectional and/or plan and/or perspective views. Thus, differences from the illustrated shapes, due to, for example, manufacturing techniques and/or tolerances, are to be expected. Thus, the exemplary embodiments should not be construed as limited to the shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the exemplary embodiments.
Meanwhile, the present application uses specific words to describe embodiments of the present specification. Reference to "one embodiment," "an embodiment," and/or "some embodiments" means that a particular feature, structure, or characteristic is associated with at least one embodiment of the present application. Thus, it is emphasized and should be appreciated that two or more references to "an embodiment" or "one embodiment" or "an alternative embodiment" in various positions in this application are not necessarily referring to the same embodiment. Furthermore, certain features, structures, or characteristics of one or more embodiments of the present application may be combined as suitable.
Likewise, it should be noted that in order to simplify the presentation disclosed herein and thereby aid in understanding one or more inventive embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof. This method of disclosure, however, is not intended to imply that more features than are presented in the claims are required for the subject application. Indeed, less than all of the features of a single embodiment disclosed above.
Finally, it should be understood that the embodiments described herein are merely illustrative of the principles of the embodiments of the present application. Other variations are also possible within the scope of this application. Thus, by way of example, and not limitation, alternative configurations of embodiments of the present application may be considered in keeping with the teachings of the present application. Accordingly, embodiments of the present application are not limited to only the embodiments explicitly described and depicted herein.

Claims (10)

1. A wafer cooling apparatus, comprising:
the shell is characterized in that an air inlet and an air outlet are respectively formed in the top and the bottom of the shell, and a first space, a second space and a third space are sequentially formed in the shell along the direction from the top to the bottom of the shell;
the at least one guide plate is arranged in the first space, and a plurality of guide holes are formed in the guide plate;
the wafer placing structure is arranged in the second space and is used for placing the wafer;
and the air pump is connected with the air outlet.
2. The wafer cooling device of claim 1 further comprising a spacer plate disposed between the second space and the third space, the spacer plate having a plurality of through holes formed therein.
3. The wafer cooling device of claim 2 wherein a sealing connection is formed between a peripheral edge of the spacer plate and an inner sidewall of the housing.
4. The wafer cooling device of claim 2 wherein the diameter of the first space increases gradually in a top-to-bottom direction of the enclosure.
5. The wafer cooling device of claim 4 wherein the at least one baffle comprises a first baffle and a second baffle along a top-to-bottom direction of the enclosure, the second baffle disposed between the first space and the second space.
6. The wafer cooling device of claim 5 wherein the first baffle has a diameter of 120mm to 150mm.
7. The wafer cooling device of claim 5 wherein the second baffle and/or the spacer has a diameter of 320mm to 340mm.
8. The wafer cooling device of claim 5 wherein the number of deflector holes on the first deflector is 50 to 80 and the number of deflector holes on the second deflector and/or through holes on the separator plate is 80 to 120.
9. The wafer cooling device according to claim 5, wherein the aperture of the deflector hole and/or the through hole is 2mm to 8mm.
10. The wafer cooling device of claim 1 wherein the wafer placement structure comprises a multi-layered placement plate along a top-to-bottom direction of the housing, the placement plate for carrying the wafer.
CN202321861383.2U 2023-07-14 2023-07-14 Wafer cooling device Active CN220253193U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202321861383.2U CN220253193U (en) 2023-07-14 2023-07-14 Wafer cooling device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202321861383.2U CN220253193U (en) 2023-07-14 2023-07-14 Wafer cooling device

Publications (1)

Publication Number Publication Date
CN220253193U true CN220253193U (en) 2023-12-26

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