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CN215817612U - BMS battery management system charge-discharge circuit based on battery management chip - Google Patents

BMS battery management system charge-discharge circuit based on battery management chip Download PDF

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Publication number
CN215817612U
CN215817612U CN202122168250.4U CN202122168250U CN215817612U CN 215817612 U CN215817612 U CN 215817612U CN 202122168250 U CN202122168250 U CN 202122168250U CN 215817612 U CN215817612 U CN 215817612U
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China
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battery management
resistor
management chip
pin
capacitor
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CN202122168250.4U
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Chinese (zh)
Inventor
张晖
王景
李朋
姜凯
李锐
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Shandong Inspur Scientific Research Institute Co Ltd
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Shandong Inspur Scientific Research Institute Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/10Energy storage using batteries

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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)

Abstract

A charging and discharging circuit of a BMS battery management system based on a battery management chip is connected with an NTC thermistor through an interface, and can realize the collection of temperature data of a battery pack. The capacitor I plays a role in filtering, the resistor III and the resistor IV are pull-up resistors, the resistor V is a pull-up resistor, the battery management chip controls the on-off of the MOS transistor I, the resistor VI is a current-limiting resistor, the battery management chip controls the on-off of the MOS transistor II, the resistor VII is a sampling resistor, and the resistor VIII, the capacitor IV, the capacitor V, the capacitor VI and the resistor IX form an RC filter circuit. The SRN pin of the battery management chip is connected with the resistor VIII and used for collecting voltage difference between two ends of the resistor VII, so that charging and discharging current is obtained, detection of the charging and discharging current of the BMS battery management system is realized, and safety of the BMS battery management system is improved.

Description

BMS battery management system charge-discharge circuit based on battery management chip
Technical Field
The utility model relates to the technical field of lithium battery management, in particular to a battery management chip-based BMS battery management system charging and discharging circuit.
Background
With the development of battery technology, lithium ion batteries have the advantages of small size, light weight, high energy density, no memory effect, small self-discharge, long cycle life and the like, and are widely applied to the fields of new energy automobiles, photovoltaic energy storage and the like. The BMS is called a battery management system, and is mainly used for carrying out data acquisition, analysis, state estimation and management on parameters such as electrical characteristics and thermal characteristics of each battery unit, improving the utilization rate of the battery, preventing the battery from being overcharged and overdischarged and prolonging the service life of the battery.
The charging and discharging circuits of the existing BMS battery management system are mostly lack of protection functions, charging overshoot is easy to generate, the charging current is too large, the charging circuit is overheated, and the like, so that the service life of the battery is shortened, and even safety accidents are caused.
Disclosure of Invention
In order to overcome the defects of the technology, the utility model provides the battery management chip-based BMS battery management system charging and discharging circuit which can acquire temperature data and charging and discharging current in real time.
The technical scheme adopted by the utility model for overcoming the technical problems is as follows:
a BMS battery management system charge and discharge circuit based on battery management chip includes:
the battery management chip is characterized in that a VC15 pin of the battery management chip is connected to one end of a resistor I, the other end of the resistor I is respectively connected to a power supply, a 16 pin of a battery pack interface and a VIN pin of a power supply interface, a VC0 pin of the battery management chip is connected to a 1 pin of the battery pack interface through a resistor II, a CAP2 pin of the battery management chip is connected to a VC5X pin through a capacitor I, a TS2 pin and a VC5X pin of the battery management chip are connected to an interface used for connecting an NTC thermistor, a VSS pin of the battery management chip is grounded, an SCL pin of the battery management chip is connected to a 3.3V power supply through a resistor III, and an SDA pin of the battery management chip is connected to a 3.3V power supply through a resistor IV;
the grid electrode of the MOS tube I is connected to the CHG pin of the battery management chip through a resistor V, and the source electrode of the MOS tube I is connected to the GND pin of the power interface;
the grid electrode of the MOS transistor II is connected to the DSG pin of the battery management chip through a resistor VI, the drain electrode of the MOS transistor II is connected to the drain electrode of the MOS transistor I, the source electrode of the MOS transistor II is grounded through the resistor VII, the capacitor IV and the resistor VII are connected in parallel, one end of the capacitor IV is connected to one end of the resistor VIII, the other end of the capacitor IV is connected to one end of a resistor IX, the other end of the resistor VIII is connected to the SRN pin of the battery management chip and one end of the capacitor V respectively, the other end of the resistor IX is connected to the SRP pin of the battery management chip and one end of the capacitor VI respectively, and the other end of the capacitor V is connected with the other end of the capacitor VI in series.
Preferably, the battery management chip is a BQ76940 type battery management chip.
In order to realize filtering, the REGOUT pin of the battery management chip is grounded through a capacitor ii, and the CAP1 pin of the battery management chip is grounded through a capacitor iii.
The utility model has the beneficial effects that: the NTC thermistor is connected through the interface, and the collection of temperature data of the battery pack can be realized. The capacitor I plays a role in filtering, the resistor III and the resistor IV are pull-up resistors, the resistor V is a pull-up resistor, the battery management chip controls the on-off of the MOS transistor I, the resistor VI is a current-limiting resistor, the battery management chip controls the on-off of the MOS transistor II, the resistor VII is a sampling resistor, and the resistor VIII, the capacitor IV, the capacitor V, the capacitor VI and the resistor IX form an RC filter circuit. The SRN pin of the battery management chip is connected with the resistor VIII and used for collecting voltage difference between two ends of the resistor VII, so that charging and discharging current is obtained, detection of the charging and discharging current of the BMS battery management system is realized, and safety of the BMS battery management system is improved.
Drawings
FIG. 1 is a circuit block diagram of the present invention;
in the figure, 1, a battery management chip 2, a battery pack interface 3, a power interface 4, a resistor I5, a resistor II 6, a capacitor I7, a capacitor II 8, a capacitor III 9, a resistor III 10, a resistor IV 11, a MOS transistor I12, a resistor V13, a MOS transistor II 14, a resistor VI 15, a resistor VII 16, a resistor VIII 17, a capacitor IV 18, a capacitor V19, a capacitor VI 20, a resistor IX 21 and an interface are arranged.
Detailed Description
The utility model is further described below with reference to fig. 1.
A BMS battery management system charge and discharge circuit based on battery management chip includes: the battery management chip 1 is characterized in that a VC15 pin of the battery management chip 1 is connected to one end of a resistor I4, the other end of the resistor I4 is respectively connected to a power supply, a 16 pin of a battery pack interface 2 and a VIN pin of a power supply interface 3, a VC0 pin of the battery management chip is connected to a 1 pin of the battery pack interface 2 through a resistor II 5, a CAP2 pin of the battery management chip is connected to a VC5X pin through a capacitor I6, a TS2 pin and a VC5X pin of the battery management chip are connected to an interface 21 for connecting an NTC thermistor, a VSS pin of the battery management chip is grounded, an SCL pin of the battery management chip is connected to a 3.3V power supply through a resistor III 9, and an SDA pin of the battery management chip is connected to a 3.3V power supply through a resistor IV 10; a gate of the MOS transistor i 11 is connected to the CHG pin of the battery management chip 1 via a resistor v 12, and a source thereof is connected to the GND pin of the power interface 3; the grid electrode of the MOS tube II 13 is connected to the DSG pin of the battery management chip 1 through a resistor VI 14, the drain electrode of the MOS tube II is connected to the drain electrode of the MOS tube I11, the source electrode of the MOS tube II is grounded through a resistor VII 15, a capacitor IV 17 and the resistor VII 15 are connected in parallel, one end of the capacitor IV 17 is connected to one end of a resistor VIII 16, the other end of the capacitor IV 17 is connected to one end of a resistor IX 20, the other end of the resistor VIII 16 is respectively connected to the SRN pin of the battery management chip 1 and one end of a capacitor V18, the other end of the resistor IX 20 is respectively connected to the SRP pin of the battery management chip 1 and one end of a capacitor VI 19, and the other end of the capacitor V18 is connected with the other end of the capacitor VI 19 in series. Battery pack interface 2 can connect 15 lithium cell series batteries, battery pack interface 2's 1 foot is the total negative pole of group battery, is connected with battery management chip 1's VCO pin through resistance II 5, resistance II 5 plays the current-limiting effect, battery pack interface 2's 16 feet is the total positive pole of group battery, connect in battery management chip 1's VC15 pin through resistance I4, realize the group battery total voltage and detect, resistance I4 plays the current-limiting effect. The collection of battery pack temperature data can be achieved by connecting the NTC thermistors in the BMS battery management system through the interface 21. The capacitor I6 plays a role in filtering, the resistor III 9 and the resistor IV 10 are pull-up resistors, the resistor V12 is a pull-up resistor, the battery management chip 1 controls the on-off of the MOS transistor I11, the resistor VI 14 is a current-limiting resistor, the battery management chip 1 controls the on-off of the MOS transistor II 13, the resistor VII 15 is a sampling resistor, and the resistor VIII 16, the capacitor IV 17, the capacitor V18, the capacitor VI 19 and the resistor IX 20 form an RC filter circuit. The SRN pin of the battery management chip 1 is connected with the resistor VIII 16 and used for collecting voltage difference between two ends of the resistor VII 15, so that charging and discharging current is obtained, detection of the charging and discharging current of the BMS battery management system is realized, and safety of the BMS battery management system is improved.
Preferably, the battery management chip 1 is a BQ76940 type battery management chip.
The REGOUT pin of the battery management chip 1 is grounded through a capacitor II 7, and the CAP1 pin of the battery management chip 1 is grounded through a capacitor III 8. And the capacitor II 7 and the capacitor III 8 both have filtering functions.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the utility model. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (3)

1. A BMS battery management system charge-discharge circuit based on battery management chip, characterized by includes:
the battery management chip (1) is characterized in that a VC15 pin of the battery management chip is connected to one end of a resistor I (4), the other end of the resistor I (4) is respectively connected to a power supply, a 16 pin of a battery pack interface (2) and a VIN pin of a power supply interface (3), a VC0 pin of the battery management chip is connected to the 1 pin of the battery pack interface (2) through a resistor II (5), a CAP2 pin of the battery management chip is connected to a VC5X pin through a capacitor I (6), a TS2 pin and a VC5X pin of the battery management chip are connected to an interface (21) for connecting an NTC thermistor, a VSS pin of the battery management chip is grounded, an SCL pin of the battery management chip is connected to a 3.3V power supply through a resistor III (9), and an SDA pin of the battery management chip is connected to the 3.3V power supply through a resistor IV (10);
the grid of the MOS tube I (11) is connected to the CHG pin of the battery management chip (1) through a resistor V (12), and the source of the MOS tube I is connected to the GND pin of the power interface (3);
the grid electrode of the MOS transistor II (13) is connected to the DSG pin of the battery management chip (1) through a resistor VI (14), the drain electrode of the MOS transistor II is connected to the drain electrode of the MOS transistor I (11), the source electrode of the MOS transistor II is grounded through a resistor VII (15), a capacitor IV (17) and the resistor VII (15) are connected in parallel, one end of the capacitor IV (17) is connected to one end of a resistor VIII (16), the other end of the capacitor IV (17) is connected to one end of a resistor IX (20), the other end of the resistor VIII (16) is connected to the SRN pin of the battery management chip (1) and one end of a capacitor V (18) respectively, the other end of the resistor IX (20) is connected to the SRP pin of the battery management chip (1) and one end of a capacitor VI (19) respectively, and the other end of the capacitor V (18) is connected with the other end of the capacitor VI (19) in series.
2. The battery management chip-based BMS battery management system charging and discharging circuit of claim 1, wherein: the battery management chip (1) is a BQ76940 type battery management chip.
3. The battery management chip-based BMS battery management system charging and discharging circuit of claim 1, wherein: the REGOUT pin of the battery management chip (1) is grounded through a capacitor II (7), and the CAP1 pin of the battery management chip (1) is grounded through a capacitor III (8).
CN202122168250.4U 2021-09-09 2021-09-09 BMS battery management system charge-discharge circuit based on battery management chip Active CN215817612U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202122168250.4U CN215817612U (en) 2021-09-09 2021-09-09 BMS battery management system charge-discharge circuit based on battery management chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202122168250.4U CN215817612U (en) 2021-09-09 2021-09-09 BMS battery management system charge-discharge circuit based on battery management chip

Publications (1)

Publication Number Publication Date
CN215817612U true CN215817612U (en) 2022-02-11

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