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CN202256409U - A probe card and multi-chip test system using it - Google Patents

A probe card and multi-chip test system using it Download PDF

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Publication number
CN202256409U
CN202256409U CN2011202994225U CN201120299422U CN202256409U CN 202256409 U CN202256409 U CN 202256409U CN 2011202994225 U CN2011202994225 U CN 2011202994225U CN 201120299422 U CN201120299422 U CN 201120299422U CN 202256409 U CN202256409 U CN 202256409U
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CN
China
Prior art keywords
probe
interface
spring needle
circuit board
ate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN2011202994225U
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Chinese (zh)
Inventor
辜诗涛
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangdong Leadyo Ic Testing Co Ltd
Original Assignee
Dongguan Leadyo Micro Electronics Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
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Priority to CN2011202994225U priority Critical patent/CN202256409U/en
Application granted granted Critical
Publication of CN202256409U publication Critical patent/CN202256409U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Measuring Leads Or Probes (AREA)

Abstract

The utility model relates to the field of microelectronic technical equipment, in particular to a probe card and a multi-chip test system using the probe card, wherein the probe card comprises a printed circuit board, a needle swinging area, an input/output interface area and a spring needle interface area which are arranged on the printed circuit board, and can be used for matching the multi-chip test system to realize the physical connection and the electrical connection between the test system and a plurality of chips on a wafer, thereby realizing the test of the wafer; the multi-chip test system using the probe card comprises a control console, a probe station, the probe card, automatic test equipment, an interface circuit board, a multimeter and display equipment, and has the characteristics of facilitating the test of a wafer, improving the test efficiency and reducing the test cost.

Description

A kind of probe and the multicore built-in testing system that uses it
Technical field
The utility model relates to the microelectric technique apparatus field, particularly relates to a kind of probe and the multicore built-in testing system that uses it.
Background technology
The manufacture process of semiconductor subassembly; Wafer manufacturing, wafer sort, encapsulation and last test be can be divided into haply, circuit and electronic component (like transistor, electric capacity, logic switch etc.) on wafer, made, after completing; Wafer becomes sound of laughing a chip; Then chip is carried out dependence test, generally include voltage, electric current, sequential and function etc., underproof chip is eliminated; And wafer cut into several independently chips, qualified chip encapsulates and carries out last test.
Along with the raising of integrated circuit complexity, the complexity of its test is also along with improve, and the part large scale integrated circuit requires to carry out hundreds of inferior voltage, electric current and timing sequence test, and 1,000,000 times functional test guarantees that device meets the use standard fully.
The test of wafer is needed the test macro of specialty, and mate suitable probe.Because generally only suitable single-chip test of in the past wafer sort system or twin-core built-in testing, testing efficiency is extremely low, and complicated operation, testing cost are high.
Therefore; To the problem that exists in the prior art; Need a kind of multicore built-in testing system that can be used for mating that provides badly; Realize physical connection and the probe that is electrically connected between a plurality of chips on test macro and the wafer, also need a kind of effective and convenient operation and the low multicore built-in testing system of testing cost of providing badly.
Summary of the invention
The purpose of the utility model is to avoid weak point of the prior art and a kind of probe is provided and uses its multicore built-in testing system; This probe can be used for mating multicore built-in testing system; Realize between a plurality of chips on test macro and the wafer physical connection be electrically connected; Thereby realize the test to wafer, this multicore built-in testing system had both made things convenient for the test of wafer, can improve testing efficiency again, reduce testing cost.
The purpose of the utility model realizes through following technical measures.
A kind of probe and the multicore built-in testing system that uses it are provided,
A kind of probe comprises printed circuit board (PCB) and is arranged on balancing point district, IO interface district and the spring needle interface area on the printed circuit board (PCB) that said printed circuit board (PCB) is a multilayer board; Said balancing point district is arranged on the bottom of printed circuit board (PCB), and said balancing point district is of a size of the probe of placing two chips at least; Said IO interface district and spring needle interface area all are arranged on the top layer of said printed circuit board (PCB);
Said spring needle interface area is provided with the spring needle interface, and said IO interface district is provided with the stitch of input/output signal, and said balancing point district is provided with the probe of contact measured chip; The output terminal of said spring needle interface is electrically connected with the input interface of said IO interface, and the output interface of said IO interface is electrically connected with the input end of said probe.
Preferably; Said probe is set to 352 pins, and said IO interface is set to 16, and each said IO interface is set to 32 stitch; Said IO interface is set to 512 stitch altogether, and said spring needle interface area is provided with 352 spring needle interfaces; Said 352 spring needle interfaces respectively with 512 stitch of IO interface in 352 stitch be connected, said 352 stitch are connected with said 352 probes respectively.
Preferably, said printed circuit board (PCB) bottom is provided with the probe stationary seat, and said probe protrudes from said probe stationary seat.
A kind of multicore built-in testing system that uses above probe; Comprise control desk, probe station, probe, ATE, interface card, multimeter and display device; Said probe is arranged on the table top of said probe station, and said interface card is arranged at said ATE bottom surface, said ATE be positioned at probe directly over; Said interface card is electrically connected with said probe; Said probe station and said ATE all are electrically connected with multimeter, and said control desk is electrically connected with said ATE, and said interface card is provided with spring needle; One end connecting interface circuit board of said spring needle, the other end of spring needle connects the spring needle interface of said probe.
Preferably, said probe station and said ATE all are electrically connected through general purpose interface bus with multimeter.
Preferably, said control desk is a computer.
Preferably, said control desk is electrically connected with ATE through communication interface.
Preferably, said display device includes display screen and keyboard, and said keyboard is positioned at said display screen below.
Preferably, said probe station be positioned at probe under be provided with the wafer putting position.
Preferably, said probe station is provided with CS, and said ATE is provided with CS.
The beneficial effect of the utility model:
A kind of probe of the utility model comprises printed circuit board (PCB) and is arranged on balancing point district, IO interface district and the spring needle interface area on the printed circuit board (PCB) that printed circuit board (PCB) is a multilayer board; The balancing point district is arranged on the bottom of printed circuit board (PCB), and the balancing point district is of a size of the probe of placing two chips at least; IO interface district and spring needle interface area all are arranged on the top layer of printed circuit board (PCB); The spring needle interface area is provided with the spring needle interface, and the IO interface district is provided with the stitch of input/output signal, and the balancing point district is provided with the probe of contact measured chip; The output terminal of spring needle interface is electrically connected with the input interface of IO interface, and the output interface of IO interface is electrically connected with the input end of probe.
A kind of probe of the utility model has following characteristics: through balancing point district, IO interface district and spring needle interface area are set on printed circuit board (PCB); The balancing point district is of a size of the probe of placing two chips at least; Can be used for mating multicore built-in testing system, realize between a plurality of chips on test macro and the wafer physical connection be electrically connected.
A kind of multicore built-in testing system that uses above probe; Comprise control desk, probe station, probe, ATE, interface card, multimeter and display device, probe is arranged on the table top of probe station, and interface card is arranged at the ATE bottom surface; ATE be positioned at probe directly over; Interface card is electrically connected with probe, and probe station and ATE all are electrically connected with multimeter, and interface card is provided with spring needle; One end connecting interface circuit board of spring needle, the spring needle interface of the other end linking probe card of spring needle.
A kind of multicore built-in testing system of above probe that uses of the utility model has following characteristics: through the automatic control of control desk; The automatically replaceable chip to be tested of probe station; Make things convenient for the test of wafer; Through the probe that design can be tested the multicore sheet simultaneously, can improve testing efficiency again, reduce testing cost.
Description of drawings
Utilize accompanying drawing that the utility model is further specified, but the content in the accompanying drawing does not constitute any restriction to the utility model.
Fig. 1 is the fabric synoptic diagram of a kind of probe of the utility model.
Fig. 2 is the top level structure synoptic diagram of a kind of probe of the utility model.
Fig. 3 is the structural representation of multicore built-in testing system of probe of a kind of Fig. 1 of use and Fig. 2 of the utility model.
In Fig. 1, Fig. 2 and Fig. 3, include:
Control desk 1; Probe station 2; Probe 3; ATE 4; Interface card 5; Balancing point district 6; Probe 7; The first IO interface IO0; The second IO interface IO1; The 3rd IO interface IO2; The 4th IO interface IO4; The 5th IO interface IO5; The 6th IO interface IO6; The 7th IO interface IO7; The 8th IO interface IO9; The 9th IO interface IO10; The tenth IO interface IO11; The 11 IO interface IO12; The 12 IO interface IO13; The 13 IO interface IO14; The 14 IO interface IO15; The 15 IO interface IO16; The 16 IO interface IO17; Relay control interface U1; Relay control interface U3; Relay control interface U5; Relay control interface U7; Relay control interface U9; Relay control interface U11; Relay control interface U13; Relay control interface U19; Relay control interface U20; Relay control interface U21; Relay control interface U22; Relay control interface U23; Relay control interface U24; Relay control interface U25; Relay control interface U26; Relay control interface U31; Wire jumper pad REF15; Wire jumper pad REF14; Wire jumper pad REF13; Wire jumper pad REF12; Wire jumper pad REF11; Wire jumper pad REF10; Wire jumper pad REF19; Wire jumper pad REF18; Wire jumper pad SPARE; Wire jumper pad DPS4.
Embodiment
In conjunction with following examples the utility model is described further.
embodiment 1.
A kind of probe 3 of present embodiment as shown in Figures 2 and 3,
Comprise printed circuit board (PCB) and be arranged on balancing point district 6, IO interface district and the spring needle interface area on the printed circuit board (PCB), printed circuit board (PCB) is a multilayer board; Balancing point district 6 is arranged on the bottom of printed circuit board (PCB), and balancing point district 6 is of a size of the probe of placing two chips at least; IO interface district and spring needle interface area all are arranged on the top layer of printed circuit board (PCB); The spring needle interface area is provided with the spring needle interface, and the IO interface district is provided with the stitch of input/output signal, and balancing point district 6 is provided with the probe 7 of contact measured chip; The output terminal of spring needle interface is electrically connected with the input interface of IO interface, and the output interface of IO interface is electrically connected with the input end of probe 7.
A kind of probe 3 of present embodiment has following characteristics: through balancing point district 6, IO interface district and spring needle interface area are set on printed circuit board (PCB); Balancing point district 6 is of a size of the probe of placing two chips at least; Can be used for mating multicore built-in testing system, realize between a plurality of chips on test macro and the wafer physical connection be electrically connected.
A kind of multicore built-in testing system of above probe 3 that uses of present embodiment is as shown in Figure 1,
A kind of multicore built-in testing system that uses above probe 3 comprises control desk 1, probe station 2, probe 3, ATE 4, interface card 5, multimeter and display device, and probe 3 is arranged on the table top of probe station 2; Interface card 5 is arranged at ATE 4 bottom surfaces; ATE 4 be positioned at probe 3 directly over, interface card 5 is electrically connected with probe 3, probe station 2 all is electrically connected with multimeter with ATE 4; Control desk 1 is electrically connected with ATE 4; Interface card 5 is provided with spring needle, an end connecting interface circuit board 5 of spring needle, the spring needle interface of the other end linking probe card 3 of spring needle.
A kind of multicore built-in testing system of above probe 3 that uses of present embodiment has following characteristics:
Through the automatic control of control desk 1, probe station 2 automatically replaceable chips to be tested are to replace the artificial chip to be tested of changing, and convenient the use through the probe 3 that design can be tested the multicore sheet simultaneously, can be improved testing efficiency again, reduced testing cost.
A kind of multicore built-in testing system that uses above probe 3 of present embodiment, its principle of work is following:
When the chip on the wafer is tested, probe 3 is arranged on the probe station 2, utilizes each pin of probe 7 contact chips; ATE 44 can produce signal and give chip to be measured according to the program that control desk 11 sets, also can measure the response that chip to be measured produces simultaneously, and compare with preset value; If comparative result is identical then through test; On display screen, show PASS, if the comparative result difference shows FAIL then not through test on display screen; And will not come out through ink dot, thereby the chip that will not meet the requirement of product specification book screens through the chip marking of testing.Probe station 2 automatically replaceable chips to be tested.Display device can be provided with other display modes of test result through keyboard.Multicore built-in testing system can verify voltage, electric current, sequential and the function etc. of chip, and can test a plurality of chips simultaneously.
embodiment 2.
A kind of probe 3; Other structures of present embodiment are identical with embodiment 1; Difference is: probe 7 is set to 352 pins, and IO interface is set to 16, and each IO interface is set to 32 stitch; IO interface is set to 512 stitch altogether, and the spring needle interface area is provided with 352 spring needle interfaces; 352 spring needle interfaces respectively with 512 stitch of IO interface in 352 stitch be connected, 352 stitch are connected with 352 probes 7 respectively.
Probe 7 is set to 352, can test 8 chips that possess 44 pins simultaneously.
The printed circuit board (PCB) bottom is provided with the probe stationary seat, and probe 7 protrudes from the probe stationary seat.Make things convenient for the pin of probe 7 contact chips.
To the chip testing of different size, can design different probe 3 and mate with test macro, the quantity of probe 7 is different, and peripheral circuit is different, and the number of chips that can test simultaneously is also different, and the designing probe card 3 according to actual needs.
embodiment 3.
A kind of multicore built-in testing system that uses the probe 3 of embodiment 1 or use the probe 3 of embodiment 2; Other structures of present embodiment are identical with embodiment 1, and difference is: probe station 2 all is electrically connected through general purpose interface bus with multimeter with ATE 4.Can the magnitude of voltage that multimeter is tested be sent to ATE 4.
Control desk 1 is an industrial PC, through control program is set in industrial PC, realizes the Automatic Control to test macro.
Control desk 1 is electrically connected with ATE 4 through communication interface.Can realize the communication between control desk 1 and the ATE 4.
Display device includes display screen and keyboard, and keyboard is positioned at the display screen below.The display mode of the test result on the display screen can be set through keyboard.
Probe station 2 be positioned at probe 3 under be provided with the wafer putting position.With wafer be placed on probe 3 under, move upward through the control wafer, can realize the purpose that wafer contacts with probe 7 on the probe 3.
Probe station 2 is provided with CS, and ATE 4 is provided with CS.
Should be noted that at last; Above embodiment only be used to explain the utility model technical scheme but not to the restriction of the utility model protection domain; Although the utility model has been done detailed description with reference to preferred embodiment; Those of ordinary skill in the art should be appreciated that and can make amendment or be equal to replacement the technical scheme of the utility model, and do not break away from the essence and the scope of the utility model technical scheme.

Claims (10)

1. probe, it is characterized in that: comprise printed circuit board (PCB) and be arranged on balancing point district, IO interface district and the spring needle interface area on the printed circuit board (PCB), said printed circuit board (PCB) is a multilayer board; Said balancing point district is arranged on the bottom of printed circuit board (PCB), and said balancing point district is of a size of the probe of placing two chips at least; Said IO interface district and spring needle interface area all are arranged on the top layer of said printed circuit board (PCB);
Said spring needle interface area is provided with the spring needle interface, and said IO interface district is provided with the stitch of input/output signal, and said balancing point district is provided with the probe of contact measured chip; The output terminal of said spring needle interface is electrically connected with the input interface of said IO interface, and the output interface of said IO interface is electrically connected with the input end of said probe.
2. a kind of probe according to claim 1; It is characterized in that: said probe is set to 352 pins; Said IO interface is set to 16; Each said IO interface is set to 32 stitch, and said IO interface is set to 512 stitch altogether, and said spring needle interface area is provided with 352 spring needle interfaces; Said 352 spring needle interfaces respectively with 512 stitch of IO interface in 352 stitch be connected, said 352 stitch are connected with said 352 probes respectively.
3. a kind of probe according to claim 2 is characterized in that: said printed circuit board (PCB) bottom is provided with the probe stationary seat, and said probe protrudes from said probe stationary seat.
4. the multicore built-in testing system of use such as the described probe of claim 1-3; It is characterized in that: comprise control desk, probe station, probe, ATE, interface card, multimeter and display device; Said probe is arranged on the table top of said probe station, and said interface card is arranged at said ATE bottom surface, said ATE be positioned at probe directly over; Said interface card is electrically connected with said probe; Said probe station and said ATE all are electrically connected with multimeter, and said control desk is electrically connected with said ATE, and said interface card is provided with spring needle; One end connecting interface circuit board of said spring needle, the other end of spring needle connects the spring needle interface of said probe.
5. a kind of multicore built-in testing according to claim 4 system, it is characterized in that: said probe station and said ATE all are electrically connected through general purpose interface bus with multimeter.
6. a kind of multicore built-in testing according to claim 4 system, it is characterized in that: said control desk is a computer.
7. a kind of multicore built-in testing according to claim 6 system, it is characterized in that: said control desk is electrically connected with ATE through communication interface.
8. a kind of multicore built-in testing according to claim 4 system, it is characterized in that: said display device includes display screen and keyboard, and said keyboard is positioned at said display screen below.
9. a kind of multicore built-in testing according to claim 4 system is characterized in that: said probe station be positioned at probe under be provided with the wafer putting position.
10. a kind of multicore built-in testing according to claim 4 system, it is characterized in that: said probe station is provided with CS, and said ATE is provided with CS.
CN2011202994225U 2011-08-17 2011-08-17 A probe card and multi-chip test system using it Expired - Lifetime CN202256409U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011202994225U CN202256409U (en) 2011-08-17 2011-08-17 A probe card and multi-chip test system using it

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Application Number Priority Date Filing Date Title
CN2011202994225U CN202256409U (en) 2011-08-17 2011-08-17 A probe card and multi-chip test system using it

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103777131A (en) * 2012-10-25 2014-05-07 上海华岭集成电路技术股份有限公司 Integrated circuit testing system and integrated circuit testing method
CN112213607A (en) * 2019-06-21 2021-01-12 利亘通国际有限公司 Method for expanding and upgrading functions of automatic test system
CN113640558A (en) * 2021-08-11 2021-11-12 山东大学 A replaceable probe set and probe card
CN114256730A (en) * 2020-09-24 2022-03-29 华为技术有限公司 Chip testing device
CN115201529A (en) * 2022-07-29 2022-10-18 海宁理万集成电路有限公司 Novel parallel semiconductor parameter testing system

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103777131A (en) * 2012-10-25 2014-05-07 上海华岭集成电路技术股份有限公司 Integrated circuit testing system and integrated circuit testing method
CN103777131B (en) * 2012-10-25 2016-07-06 上海华岭集成电路技术股份有限公司 Integrated circuit test system and method for testing
CN112213607A (en) * 2019-06-21 2021-01-12 利亘通国际有限公司 Method for expanding and upgrading functions of automatic test system
CN114256730A (en) * 2020-09-24 2022-03-29 华为技术有限公司 Chip testing device
CN114256730B (en) * 2020-09-24 2024-03-26 华为技术有限公司 Chip testing device
CN113640558A (en) * 2021-08-11 2021-11-12 山东大学 A replaceable probe set and probe card
CN115201529A (en) * 2022-07-29 2022-10-18 海宁理万集成电路有限公司 Novel parallel semiconductor parameter testing system

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C56 Change in the name or address of the patentee

Owner name: GUANGDONG LEADYO CHIP TESTING CO., LTD.

Free format text: FORMER NAME: DONGGUAN LEADYO MICRO-ELECTRONICS CO., LTD.

CP03 Change of name, title or address

Address after: Guangdong province Dongguan City Wanjiang 523000 Mo Wu Village Industrial Zone

Patentee after: GUANGDONG LEADYO IC TESTING CO., LTD.

Address before: Guangdong province Dongguan City Wanjiang 523041 Mo Wu community Mo Wu Village Industrial Zone Dongguan Liyang Electronics Co Ltd

Patentee before: Dongguan Leadyo Micro Electronics Co., Ltd.

CX01 Expiry of patent term
CX01 Expiry of patent term

Granted publication date: 20120530