CN209232793U - A kind of display panel and display device - Google Patents
A kind of display panel and display device Download PDFInfo
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- CN209232793U CN209232793U CN201822094220.1U CN201822094220U CN209232793U CN 209232793 U CN209232793 U CN 209232793U CN 201822094220 U CN201822094220 U CN 201822094220U CN 209232793 U CN209232793 U CN 209232793U
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Abstract
The utility model discloses a kind of display panel and display devices.Display panel includes: pixel unit, pixel unit includes pixel drive unit and the luminescence unit positioned at pixel drive unit far from substrate side, wherein, pixel drive unit includes thin film transistor (TFT), luminescence unit includes lower electrode, and there are the first overlapping regions with projection of the lower electrode on substrate for the grid of thin film transistor (TFT)；First metal line, between grid and lower electrode and covering grid, the first metal line are formed with opening, and the projection on substrate that is open is located in grid projects on substrate, be open and projection of the grid on substrate there are the second overlapping regions；Second metal line, where being located at the first metal line and lower electrode between plane, and the second metal line is electrically connected with the first metal line；There are third overlapping regions for the projection of second metal line and opening on substrate；Wherein, third overlapping region and the first overlapping region be not be overlapped.The utility model increases storage capacitance.
Description
Technical field
The utility model embodiment is related to field of display technology more particularly to a kind of display panel and display device.
Background technique
Organic Light Emitting Diode (Organic Light-Emitting Diode, OLED) utilizes self luminous light emitting machine
System, does not need backlight, when being applied to display panel and display device, the integral thickness of display panel and display device compared with
It is thin, it is advantageously implemented its lightening design.Meanwhile Organic Light Emitting Diode is high with display brightness, visual angle is wide, fast response time
Etc. advantages, currently, being widely used in display fields such as mobile phone, PDA, digital cameras.
In OLED display, the capacitance of storage capacitance is bigger, and the image quality of the display picture of OLED display is got over
Stablize.However, the capacitance of prior art storage capacitance increases, it usually needs increase the positive area of two pole plates, but aobvious
Under conditions of showing limited area, the positive area for increasing two pole plates is restricted.
Utility model content
In view of this, the purpose of this utility model is to propose a kind of display panel and display device, to pass through reasonable line arrangement
Increase the capacitance of storage capacitance.
To achieve the above objectives, the present invention adopts the following technical solutions:
On the one hand, the utility model embodiment provides a kind of display panel, comprising:
Substrate；
At least one pixel unit being formed on the substrate, the pixel unit include pixel drive unit and are located at
Luminescence unit of the pixel drive unit far from the substrate side, wherein the pixel drive unit includes film crystal
Pipe, the luminescence unit include lower electrode, the grid of the thin film transistor (TFT) and the projection of the lower electrode on the substrate
There are the first overlapping regions；
First metal line between the grid and the lower electrode and covers the grid, first metal
Wiring is formed with opening, and projection of the opening on substrate is located in the grid projects on substrate, and it is described be open and
There are the second overlapping regions for the projection of the grid on the substrate；
Second metal line, where being located at first metal line and the lower electrode between plane, and described second
Metal line is electrically connected with first metal line；The projection of second metal line and the opening on the substrate
There are third overlapping regions；
Wherein, the third overlapping region and first overlapping region be not be overlapped.
Optionally, along the extending direction of vertical second metal line, the width of the third overlapping region be less than or
Equal to the width of second metal line, the width of the preferably described third overlapping region is greater than or equal to second hardware cloth
The half of the width of line, less than or equal to the width of second metal line.
Optionally, first metal line connects same signal source with second metal line.
Optionally, the width of second metal line is 2-10 μm.
Optionally, the display panel further includes between first metal line and the lower electrode place plane
Third metal line, the third metal line and the opening projection on the substrate there are the 4th overlapping region,
And the third metal line is electrically connected with the grid.
Optionally, it the third metal line and the second metal line same layer and is arranged in parallel.
Optionally, the spacing between the third metal line and second metal line is greater than or equal to 2 μm.
Optionally, the lower electrode and the opening projection on the substrate be there are the 5th overlapping region, and described the
The area of five overlapping regions is greater than or equal to zero；The display panel further includes between the grid and the lower electrode
Shielded layer, the shielded layer at least cover the grid positioned at the 5th overlapping region.
Optionally, first metal line extends in a first direction, and second metal line extends in a second direction,
The first direction and second direction intersection.
Optionally, the source-drain electrode of second metal line and the thin film transistor (TFT) is located on the same floor.
On the other hand, the utility model embodiment provides a kind of display device, including display described in one side face
Panel.
The beneficial effects of the utility model are: display panel provided by the utility model, passes through the grid in thin film transistor (TFT)
First metal line of setting covering grid between pole and the lower electrode of luminescence unit, so that the first metal line and grid are just
First storage capacitance is formed to region；Meanwhile (such as other are thin with other elements to realize the grid covered by the first metal line
The source/drain of film transistor) connection, be formed with opening (contact hole) on the first metal line, the opening is on substrate
Projection is located in grid project on substrate, and be open and projection of the grid on substrate there are the second overlapping regions, at this point, leading to
It crosses in the first metal line and the second metal line that setting is electrically connected with the first metal line between plane where lower electrode, makes
Second metal line and projection of the opening on substrate are there are third overlapping region, and third overlapping region and the first overlapping region
(overlapping region of projection of the grid with lower electrode on substrate) be not be overlapped, so that being located at the second gold medal of third overlapping region
Belong to the grid face that wiring is directly exposed with opening, and then forms the second storage capacitance；Due to the second metal line and first
Metal line electrical connection, therefore the first storage capacitance and the second storage capacitance parallel connection form the storage capacitance of pixel unit.Cause
This, the utility model increases the storage capacitance of pixel unit by reasonable line arrangement, and then can reduce pel spacing, improves display
Shield resolution ratio.
Detailed description of the invention
The exemplary embodiment of the utility model will be described in detail by referring to accompanying drawing below, make the ordinary skill of this field
Personnel become apparent from the above-mentioned and other feature and advantage of the utility model, in attached drawing:
Fig. 1 is a kind of local domain structure schematic diagram of existing display panel；
Fig. 2 is the structural schematic diagram of a-quadrant in Fig. 1；
Fig. 3 is a kind of local domain structure schematic diagram of display panel provided by the embodiment of the utility model；
Fig. 4 is the structural schematic diagram of B area in Fig. 3；
Fig. 5 is the schematic diagram of the section structure of storage capacitance provided by the embodiment of the utility model；
Fig. 6 is the equivalent circuit diagram of existing driving transistor and OLED；
Fig. 7 is the output characteristic curve of existing driving transistor and OLED；
Fig. 8 is another structural schematic diagram of B area in Fig. 3；
Fig. 9 is the schematic diagram of the section structure of driving transistor and OLED provided by the embodiment of the utility model；
Figure 10 is the equivalent circuit diagram of driving transistor and OLED provided by the embodiment of the utility model；
Figure 11 is a kind of equivalent circuit diagram of pixel unit provided by the embodiment of the utility model；
Figure 12 is white picture Vss saturation curve contrast schematic diagram provided by the embodiment of the utility model；
Figure 13 is red picture Vss saturation curve contrast schematic diagram provided by the embodiment of the utility model；
Figure 14 is green picture Vss saturation curve contrast schematic diagram provided by the embodiment of the utility model；
Figure 15 is blue picture Vss saturation curve contrast schematic diagram provided by the embodiment of the utility model；
Figure 16 is the contrast schematic diagram of display screen service life provided by the embodiment of the utility model.
Specific embodiment
Further illustrate the technical solution of the utility model below with reference to the accompanying drawings and specific embodiments.It can manage
Solution, specific embodiment described herein are used only for explaining the utility model, rather than the restriction to the utility model.Separately
Outside it should also be noted that, illustrating only part relevant to the utility model for ease of description, in attached drawing and not all knot
Structure.
Fig. 1 is a kind of local domain structure schematic diagram of existing display panel；Fig. 2 is the structural representation of a-quadrant in Fig. 1
Figure.With reference to Fig. 1 and Fig. 2, currently, (can be usually the lateral ELVDD power supply for being parallel to scan line using the first metal line 15
Line) and the grid 13 of thin film transistor (TFT) form the storage capacitance of pixel unit 12.But in order to thin film transistor (TFT)
Grid 13 provides initializing signal, needs to be correspondingly formed opening 19 on the first metal line 15, however the formation of opening 19 is big
The positive area of the first metal line 15 and grid 13 is reduced greatly, and then reduces storage capacitance.Therefore, it is necessary to increase
The area of one metal line 15 and grid 13 increases storage capacitance, still, under the conditions of display area is limited, increases the
The area of one metal line 15 and grid 13 will increase pel spacing, lowers display resolution, is unfavorable for high pixel resolution
The design of display screen.
Based on the above issues, the utility model embodiment provides a kind of display panel, by the way that the second metal is rationally arranged
Wiring, using existing opening on the first metal line, so that grid of second metal line by opening and thin film transistor (TFT)
Form the second storage capacitance, so with the first metal line shape in parallel with the first storage capacitance that the grid of thin film transistor (TFT) is formed
The storage capacitance of pixel unit increases the storage capacitance of pixel unit.Illustratively, Fig. 3 is the utility model embodiment
A kind of local domain structure schematic diagram of the display panel provided；Fig. 4 is the structural schematic diagram of B area in Fig. 3；Fig. 5 is this reality
With the schematic diagram of the section structure for the storage capacitance that new embodiment provides.As shown in Fig. 3, Fig. 4 and Fig. 5, which includes:
Substrate 11；
At least one pixel unit 12 being formed on substrate 11, pixel unit 12 is including pixel drive unit and is located at picture
Luminescence unit of the plain driving unit far from substrate side, wherein pixel drive unit includes thin film transistor (TFT) (thin film transistor (TFT) M1
~M7), luminescence unit includes lower electrode, grid (grid 13 of driving transistor M3) and lower 14 (this of electrode of thin film transistor (TFT)
Embodiment can be anode) there are the first overlapping region Z1 for projection on the substrate 11；
First metal line 15 between grid 13 and lower electrode 14 and covers grid 13,15 shape of the first metal line
At there is an opening 19, the projection of opening 19 on the substrate 11 is located in grid 13 project on the substrate 11, and opening 19 and grid 13
There are the second overlapping region Z2 for projection on the substrate 11；
Second metal line 16, between 14 place plane of the first metal line 15 and lower electrode, and the second hardware cloth
Line 16 is electrically connected with the first metal line 15；There are third friendships with 19 projection on the substrate 11 that is open for second metal line 16
Folded region Z3；
Wherein, third overlapping region Z3 and the first domain crossover region Z1 be not be overlapped.
Above-mentioned first metal line 15 extends in a first direction, and the second metal line 16 extends in a second direction, first party
Intersect to second direction.
It should be noted that Fig. 3 only as the example for describing technical solutions of the utility model, is not intended as practical to this
The limitation of novel display panel structure.
In the present embodiment, the part face of grid 13 and the first metal line 15 in addition to opening 19 forms the first storage electricity
Holding C1, the second metal line 16 is located at the part of third overlapping region Z3 and 13 face of grid forms the second storage capacitance C2, the
One metal line 15 and the second metal line 16 are electrically connected by via hole 18.At this point, the storage electricity of the first storage capacitance C1 and second
It is in parallel to hold C2, forms the storage capacitance of pixel unit, therefore, the storage capacitance of pixel unit is by the first storage electricity in the present embodiment
Hold C1 and the second storage capacitance C2 parallel connection is formed, and then the capacitance of storage capacitance can be improved, avoids the flashing of display picture.
The first gold medal of grid is covered by being arranged between the grid of thin film transistor (TFT) and the lower electrode of luminescence unit as a result,
Belong to wiring, so that the face region of the first metal line and grid forms the first storage capacitance；Meanwhile to realize by the first metal
It is routed the connection of the grid and other elements (source/drains of such as other thin film transistor (TFT)s) of covering, shape on the first metal line
At having opening (contact hole), projection of the opening on substrate is located in grid projects on substrate, and is open and grid is in base
There are the second overlapping regions for projection on plate, at this point, by where the first metal line and lower electrode between plane setting with
Second metal line of the first metal line electrical connection, making the projection of the second metal line and opening on substrate, there are third friendships
Folded region, and third overlapping region and the first overlapping region (overlapping region of grid and projection of the lower electrode on substrate) are no
Overlapping, so that the grid face that the second metal line for being located at third overlapping region is directly exposed with opening, and then shape
At the second storage capacitance；Since the second metal line is electrically connected with the first metal line, the first storage capacitance and second is deposited
Storage holds the storage capacitance that parallel connection forms pixel unit.Therefore, the utility model increases pixel unit by reasonable line arrangement
Storage capacitance, and then pel spacing can be reduced, improve display resolution.
Based on the above embodiment, optionally, along the extending direction of vertical second metal line 16, third overlapping region Z3's
Width is less than or equal to the width of the second metal line 16, and the preferably width of third overlapping region Z3 is greater than or equal to the second metal
The half of the width of wiring 16, less than or equal to the width of the second metal line 16, to increase while meeting cabling requirement
The positive area of second metal line 16 and the grid 13 exposed by opening 19, increases storage capacitance.Wherein, the second metal
The width of wiring is 2-10 μm, to meet the requirement of signal transfer impedance.
Optionally, the first metal line and the second metal line connect same signal source, provide for the pole plate of storage capacitance
Reference signal.It is preferred that the first metal line and the second metal line connect ELVDD power supply, to provide stable pole plate with reference to letter
Number.
Based on the above embodiment, optionally, with reference to Fig. 3 and Fig. 4, display panel further include be located at the first metal line 15 with
Third metal line 10 between lower 14 place plane of electrode, the projection of third metal line 10 and opening 19 on the substrate 11
There are the 4th overlapping region Z4, and third metal line 10 is electrically connected with grid 13, i.e., third metal line 10 is at opening 19
It is electrically connected by via hole with grid 13.At this point, third metal line 10 can connect initializing signal, it is initial to be carried out to luminescence unit
Change.
In above-described embodiment, the first metal line 15 can be arranged in parallel with scan line, and the second metal line 16 can be with
Data line is arranged in parallel.In addition, to avoid third metal line 10 and the first metal line 15 and scan line from being shorted, third gold
Belong to wiring 10 and 16 same layer of the second metal line and is arranged in parallel.Wherein, third metal line 10 and the second metal line 16 it
Between spacing be greater than or equal to 2 μm, to avoid on third metal line 10 and the second metal line 16 transmit signal it is mutual do
It disturbs, meets cabling requirement.
Based on the above embodiment, in an alternative embodiment of the invention, Fig. 6 be it is existing driving transistor and OLED etc.
Imitate circuit diagram；Fig. 7 is the output characteristic curve of existing driving transistor and OLED.As shown in Figure 1, currently, on substrate 11
There are the grids 13 of thin film transistor (TFT) (driving transistor M3) and lower electrode 14 (anode) mutually to overlap for each pixel unit 12
There are the first overlapping region Z1 with anode 14 for situation, such as grid 13 of driving transistor M3, at this point, in OLED ignition,
Since the performance of OLED can degenerate, anode potential is caused to rise.The coupling formed between anode and the grid for driving transistor
The grid that the rising of anode potential is fed back to driving transistor by capacitor is closed, so that the source-drain current decline of driving transistor, from
And influence the service life of display screen.Specifically, in OLED ignition, the performance of OLED can degenerate with reference to Fig. 6 and Fig. 7,
At this point, the characteristic curve of OLED becomes curve n from the curve m in Fig. 7, the electric current of OLED drops to y point by x point, correspondingly, driving
The source-drain current of dynamic transistor reduces, its source-drain voltage is caused to decline, and the voltage between ELVDD and ELVSS is constant, therefore OLED
Anode potential rise；Because the grid of driving transistor is with anode, there are overlapping regions again, drive the grid and sun of transistor
It will form coupled capacitor between pole, the capacitive coupling of the grid and anode that drive transistor at this time acts on, and anode potential is risen
The grid of driving transistor is fed back to, so that the grid voltage of driving transistor becomes larger, leads to the source-drain voltage for driving transistor
Decline, drives the characteristic curve of transistor to become curve p from the curve o in Fig. 7, the electric current of OLED drops to z point by y point, leads
The electric current of OLED is caused to further decrease, to influence the service life of display screen.
Based on the above issues, it in the another specific embodiment of the utility model, is shielded by being arranged in display panel
Layer come eliminate anode potential variation to driving transistor grid influence.Illustratively, Fig. 8 is the another kind of B area in Fig. 3
Structural schematic diagram；Fig. 9 is the schematic diagram of the section structure of driving transistor and OLED provided by the embodiment of the utility model.Such as Fig. 8
With shown in Fig. 9, there are the 5th overlapping region Z5, the faces of the 5th overlapping region Z5 for the projection of lower electrode 14 and opening 19 on substrate
Product is greater than zero；Display panel further includes the shielded layer 17 between grid 13 and lower electrode 14, and shielded layer 17 at least covers position
In the grid 13 of the 5th overlapping region Z5, wherein shielded layer 17 connects a fixed current potential.
Based on the utility model above-described embodiment, since the first metal line 15 covers grid 13, it is located at the 5th
The lower electrode 14 of overlapping region Z5 just can form coupled capacitor between grid 13, so that under the source-drain current of driving transistor
Drop, to influence the service life of display screen.In the present embodiment, in OLED ignition, with reference to Figure 10, due to connecing a fixed current potential
The shielded layer 17 of VDD is set to the 5th overlapping region Z5 of covering, is formed between the grid 13 and anode 14 of driving transistor M3
Two equivalent capacitys, respectively the first equivalent capacity Cp1 and the second equivalent capacity Cp2.Wherein, the first equivalent capacity Cp1 is formed
Between anode 14 and node N, the second equivalent capacity Cp2 is formed between node N and the grid 13 for driving transistor M3.This
When, apply a changeless current potential VDD to shielded layer 17, may make the current potential of node N also to fix, i.e. the current potential of node N
It is not influenced by the potential change of anode 14, at this point, driving the electricity of the grid 13 of transistor M3 since the current potential of node N is fixed
Position is also fixed therewith, and then the current potential of the grid 13 of transistor M3 is driven not influenced by the potential change of anode 14, in OLED
In ignition, the current potential of the grid 13 of transistor M3 is driven not rise with the rising of the current potential of anode 14, to reduce
The capacitive coupling between the grid 13 and anode of driving transistor M3 is eliminated, improvement solves drive transistor source leakage current
The problem of decline, improves the service life of display screen.
Optionally, shielded layer 17 is the metal layer being separately provided.Preferably, shielded layer and the grid for being located at driving transistor
A metal layer between anode is located on the same floor, as a result, shielded layer can driving transistor grid and anode between one
Metal layer is prepared in same technique, to save process.
Particularly, when the area of the 5th overlapping region Z5 is equal to zero, it can refer to Fig. 4, be open at the first metal line 15
The first overlapping region Z1, i.e. the first overlapping region Z1 and the second overlapping region Z2 (or opening 19) nothing is completely covered in 19 part
It is overlapping.At this point, the first metal line 15 is multiplexed with shielded layer 17.Optionally, the first metal line 15 is connected to ELVDD power supply,
At this point, the node N in Figure 10 is connected to ELVDD power supply.
Based on the above embodiment, in a specific embodiment of the utility model, as in figs. 3 and 11, pixel driver
Unit include driving transistor M3, data-signal writing transistor M2, extra transistor M4, storage unit reset transistor M5,
Light emitting control transistor and luminous reset transistor M7, light emitting control transistor include the first light emitting control transistor M1 and second
Light emitting control transistor M6.
Specifically, the reset transistor M7 that shines includes the grid G 7 for being electrically connected to the second scanning signal Scan2, is electrically connected to
The drain D 7 of reference voltage Vref and the source S 7 for being electrically connected to anode.LED control signal Emit and light emitting control transistor
Grid (grid G 6 of grid G 1 and the second light emitting control transistor M6 including the first light emitting control transistor M1) electrical connection,
The drain D 1 of first light emitting control transistor M1 is electrically connected with ELVDD, the drain D 6 and OLED of the second light emitting control transistor M6
Anode and luminous reset transistor M7 source S 7 be electrically connected, drive transistor M3 drain D 3 and the second light emitting control
The source S 6 of transistor M6 is electrically connected, and the source S 1 of the source S 3 and the first light emitting control transistor M1 that drive transistor M3 is electrically connected
It connects, the grid G 3 of transistor M3 is driven (to store including above-mentioned first storage capacitance C1 in parallel and second with storage capacitance Cst
Capacitor C2) the second pole plate electrical connection, optionally, driving transistor M3 grid G 3 be storage capacitance Cst the second pole plate.
The first pole plate of storage capacitance Cst is electrically connected with ELVDD.The grid G 5 and the first scanning signal of storage unit reset transistor M5
Scan1 electrical connection, the luminous reset transistor M7's of the drain D 5 and previous stage (previous row) of storage unit reset transistor M5
Source S 7 is electrically connected (drain D 5 of the first line storage unit reset transistor M5 is electrically connected with reference voltage), and storage unit is multiple
The source S 5 of bit transistor M5 is electrically connected with the drain D 4 of extra transistor M4.The source S 4 and driving crystal of extra transistor M4
The drain D 3 of pipe M3 and the electrical connection of the source S 6 of the second light emitting control transistor M6, the grid G 4 of extra transistor M4 and second
Scanning signal Scan2 electrical connection.The grid G 2 of data-signal writing transistor M2 is electrically connected with the second scanning signal Scan2, number
It is believed that the source S 2 of number writing transistor M2 is electrically connected with data line, the drain D 2 and driving of data-signal writing transistor M2
The source S 3 of transistor M3 is electrically connected.Wherein, storage unit reset transistor M5 and extra transistor M4 can be brilliant for double grid type
Body pipe.
In addition, the working principle of above-mentioned pixel drive unit is specifically described in the present embodiment:
At t1 period (initial phase), the first scanning signal Scan1 is low level, the second scanning signal Scan2 and
LED control signal Emit is high level.At this point, storage unit reset transistor M5 is connected, with the pixel drive unit of the first row
For example, reference voltage Vref is applied to the second pole plate of storage capacitance Cst by storage unit reset transistor M5, at this point,
The current potential for driving the grid G 3 of transistor M3 is also reference voltage Vref.
In t2 period (voltage data signal write phase), the second scanning signal Scan2 is low level, the first scanning letter
Number Scan1 and LED control signal Emit is high level, and data-signal writing transistor M2 and extra transistor M4 are led at this time
It is logical, meanwhile, driving the current potential of the grid G 3 of transistor M3 is reference voltage Vref and low potential, and driving transistor M3 is also led
Logical, the data-signal Vdata on data line is by data-signal writing transistor M2, driving transistor M3 and extra transistor
M4, is applied to first node N1, and the current potential of first node N1 is gradually drawn high by the current potential on data line.When driving transistor M3's
Grid voltage is pulled high to the threshold voltage V for being less than or equal to driving transistor M3 with the voltage difference of its source S 3thWhen, drive crystal
Pipe M3 will be in off state.Since the source S 3 of driving transistor M3 passes through data-signal writing transistor M2 and data line electricity
The current potential of connection, source S 3 keeps VdataIt is constant, so driving the grid of transistor M3 when driving transistor M3 cut-off
G3 current potential is Vdata-|Vth|, wherein VdataFor the value of the voltage on data line, | Vth| for the threshold voltage of driving transistor M3.
At this point, the first pole plate of storage capacitance Cst and the voltage difference Vc of the second pole plate are as follows:
Vc=V1-V2=VELVDD-(Vdata-|Vth|)
Wherein, V1 represents the current potential of the first pole plate, and V2 represents the current potential of the second pole plate, wherein VELVDDFor the electricity of ELVDD
Pressure value.
In voltage data signal write phase, wrapped in the first pole plate of storage capacitance Cst and the voltage difference Vc of the second pole plate
Threshold voltage containing driving transistor M3 | Vth|, that is to say, that in voltage data signal write phase, it is brilliant to have detected driving
The threshold voltage V of body pipe M3th, and store it on storage capacitance Cst.
Reset transistor M7 shine by the first pole of the current potential write-in light-emitting component on reference voltage line, to light-emitting component
First electrode potential is initialized, and can reduce the voltage of the first pole of former frame light-emitting component to the first pole of a later frame light-emitting component
The influence of voltage further increases display homogeneity.
In t3 period (light emitting phase), LED control signal Emit is low level, the first scanning signal Scan1 and the
Two scanning signal Scan2 are high level, at this time the first light emitting control transistor M1 and the second light emitting control transistor M6 conducting, are driven
The leakage current driving OLED of dynamic transistor M3 shines.
Display panel provided in this embodiment forms first between lateral ELVDD power supply line and the grid for driving transistor
Storage capacitance forms the second storage capacitance between longitudinal ELVDD power supply line and the grid for driving transistor, so that pixel unit
Storage capacitance is formed by the first storage capacitance and the second storage capacitance parallel connection, increases the storage capacitance of pixel unit, Jin Erke
Reduce pel spacing, improves display resolution.In addition, setting connects a fixed electricity between the grid and anode of driving transistor
The shielded layer of position, and shielded layer at least covers the grid of driving transistor and the overlapping region of anode, and due to driving transistor
Grid and shielded layer between coupling make drive transistor grid potential remain unchanged, that is, drive transistor grid
Electrode potential is not influenced by anode potential variation, so that the capacitive coupling eliminated between the grid and anode of driving transistor is made
With, avoid in OLED ignition drive transistor grid potential rise with the rising of anode potential, and then improve solution
The problem of drive transistor source of having determined leakage current declines, improves the service life of display screen.
Illustratively, lateral ELVDD power supply line and longitudinal direction ELVDD power supply line be located at driving transistor grid and anode it
Between, lateral ELVDD power supply line is located at longitudinal direction side of the ELVDD power supply line far from anode, lateral ELVDD power supply line and longitudinal direction
ELVDD power supply line is electrically connected by via hole；Shielded layer is located on the same floor with transverse direction ELVDD power supply line or longitudinal direction ELVDD power supply line,
At this point, shielded layer can be directly connected to ELVDD by having wiring, avoids and signal lead is separately provided for shielded layer and avoids
A fixed voltage is provided separately for shielded layer.Further, lateral ELVDD power supply line is multiplexed with shielded layer.As shown in figure 3, horizontal
A pole plate to ELVDD power supply line 15 as storage capacitance Cst, and drive 13 reusable of grid of transistor M3 for storage
The grid 13 of driving transistor M3 can be completely covered in another pole plate of capacitor Cst, therefore, lateral ELVDD power supply line 15, this
When, lateral ELVDD power supply line 15 is multiplexed with shielded layer 17, can not only increase lateral ELVDD power supply line 15 and driving transistor
The positive area of the grid 13 of M3 can also play the grid 13 and anode 14 to driving transistor M3 to increase storage capacitance
Shielding action.
Optionally, the source-drain electrode of the second metal line and driving transistor is located on the same floor.Illustratively, the second hardware cloth
Line is longitudinal direction ELVDD power supply line, i.e. longitudinal direction ELVDD power supply line and the source-drain electrode of driving transistor is located on the same floor.In view of picture
The source electrode of a transistor (such as figure transistor M1) in plain driving unit need to be connected to ELVDD, and because source electrode usually and data
Line is located on the same floor, and the extending direction of longitudinal direction ELVDD power supply line is consistent with the extending direction of data line, longitudinal ELVDD power supply
Line and data line no overlap, and then the source-drain electrode of longitudinal ELVDD power supply line and driving transistor can be set to same layer, both may be used
It avoids longitudinal ELVDD power supply line and data line from being shorted, and process can be saved.
In addition, the utility model embodiment has also carried out compliance test result to above-mentioned display panel.Specifically, in Figure 12, it is bent
Line a is the white picture Vss saturation curve for being provided with the display panel of shielded layer, and curve b is the display panel of not set shielded layer
White picture Vss saturation curve；In Figure 13, curve c is the red picture Vss saturation curve for being provided with the display panel of shielded layer,
Curve d is the red picture Vss saturation curve of the display panel of not set shielded layer；In Figure 14, curve e is to be provided with shielded layer
The green picture Vss saturation curve of display panel, curve f are that the green picture Vss of the display panel of not set shielded layer is saturated song
Line；In Figure 15, curve g is the blue picture Vss saturation curve for being provided with the display panel of shielded layer, and curve h is not set shielding
The blue picture Vss saturation curve of the display panel of layer.Pass through the technical solution of the utility model it can be seen from Figure 12-13,
It drives and shielded layer is set between the grid of transistor and the anode of OLED, Vss saturation curve can be made to become gentler, in turn
It can illustrate to reduce influence of the anode voltage rising to electric current.
Figure 16 is the contrast schematic diagram of display screen service life provided by the embodiment of the utility model.It can be with from Figure 16
Find out, 6 samples that the present embodiment is respectively extracted from the display panel of the display panel and not set shielded layer that are provided with shielded layer
This, use (luminous) service life for being provided with the display panel of shielded layer is 43h~100h, and average life 66.2h is not set
The service life for setting the display panel of shielded layer is 43h~58h, therefore average life 48.3h is provided with shielded layer
The use of display panel increase by 37% than the service life of the display panel of not set shielded layer, and then can illustrate that this is practical
It is novel by driving transistor grid and OLED anode between shielded layer is set, improve the service life of display screen.
It should be noted that the utility model embodiment does not limit the concrete type of the various embodiments described above display panel
It is fixed, can for OLED display panel, light emitting diode with quantum dots (Quantum Dot Light Emitting Diodes,
QLED) display panel or skilled person will appreciate that other display panels.
In addition, the utility model embodiment additionally provides a kind of display device, which includes any of the above-described implementation
The display panel of example.
The display device can be mobile phone, computer, television set and intelligence wearing display equipment etc., and the present embodiment does not make this
Particular determination.
Note that above are only the preferred embodiment and institute's application technology principle of the utility model.Those skilled in the art's meeting
Understand, the utility model is not limited to specific embodiment described here, is able to carry out for a person skilled in the art various bright
Aobvious variation is readjusted, be combined with each other and is substituted without departing from the protection scope of the utility model.Therefore, although passing through
Above embodiments are described in further detail the utility model, but the utility model is not limited only to the above implementation
Example can also include more other equivalent embodiments in the case where not departing from the utility model design, and the utility model
Range is determined by the scope of the appended claims.
Claims (12)
1. a kind of display panel characterized by comprising
Substrate；
At least one pixel unit being formed on the substrate, the pixel unit include pixel drive unit and are located at described
Luminescence unit of the pixel drive unit far from the substrate side, wherein the pixel drive unit includes thin film transistor (TFT), institute
Stating luminescence unit includes lower electrode, and there are for the grid of the thin film transistor (TFT) and the projection of the lower electrode on the substrate
One overlapping region；
First metal line between the grid and the lower electrode and covers the grid, first metal line
Be formed with opening, projection of the opening on substrate is located in the grid projects on substrate, and it is described be open with it is described
There are the second overlapping regions for the projection of grid on the substrate；
Second metal line, where being located at first metal line and the lower electrode between plane, and second metal
Wiring is electrically connected with first metal line；The projection of second metal line and the opening on the substrate exists
Third overlapping region；
Wherein, the third overlapping region and first overlapping region be not be overlapped.
2. display panel according to claim 1, which is characterized in that along the extension side of vertical second metal line
To the width of the third overlapping region is less than or equal to the width of second metal line.
3. display panel according to claim 2, which is characterized in that the width of the third overlapping region is greater than or equal to
The half of the width of second metal line.
4. display panel according to claim 1, which is characterized in that first metal line and second hardware cloth
Line connects same signal source.
5. display panel according to claim 1, which is characterized in that the width of second metal line is 2-10 μm.
6. display panel according to claim 1, which is characterized in that the display panel further includes being located at first gold medal
Third metal line where belonging to wiring and the lower electrode between plane, the third metal line is with the opening described
There are the 4th overlapping regions for projection on substrate, and the third metal line is electrically connected with the grid.
7. display panel according to claim 6, which is characterized in that the third metal line and second hardware cloth
It line same layer and is arranged in parallel.
8. display panel according to claim 7, which is characterized in that the third metal line and second hardware cloth
Spacing between line is greater than or equal to 2 μm.
9. display panel according to claim 1, which is characterized in that the lower electrode and the opening are on the substrate
Projection there are the 5th overlapping region, the area of the 5th overlapping region is greater than or equal to zero；The display panel further includes
Shielded layer between the grid and the lower electrode, the shielded layer are at least covered positioned at the 5th overlapping region
The grid.
10. display panel according to claim 1, which is characterized in that first metal line extends in a first direction,
Second metal line extends in a second direction, the first direction and second direction intersection.
11. display panel according to claim 1, which is characterized in that second metal line and the film crystal
The source-drain electrode of pipe is located on the same floor.
12. a kind of display device, which is characterized in that including such as described in any item display panels of claim 1-11.
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| CN201822094220.1U CN209232793U (en) | 2018-12-13 | 2018-12-13 | A kind of display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822094220.1U CN209232793U (en) | 2018-12-13 | 2018-12-13 | A kind of display panel and display device |
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| CN209232793U true CN209232793U (en) | 2019-08-09 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111028687A (en) * | 2019-12-16 | 2020-04-17 | 厦门天马微电子有限公司 | Display panel and display device |
| CN111951729A (en) * | 2020-08-17 | 2020-11-17 | 上海天马有机发光显示技术有限公司 | Array substrate, display panel and display device |
| CN112599010A (en) * | 2020-12-15 | 2021-04-02 | 昆山国显光电有限公司 | Display panel and display device |
| CN113393806A (en) * | 2021-06-30 | 2021-09-14 | 上海天马微电子有限公司 | Display panel and display device |
| CN113516947A (en) * | 2021-04-22 | 2021-10-19 | 武汉天马微电子有限公司 | Display panel and display device |
| CN113826209A (en) * | 2020-02-27 | 2021-12-21 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| JP7551204B2 (en) | 2019-08-19 | 2024-09-17 | 三星電子株式会社 | Display device |
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| JP7551204B2 (en) | 2019-08-19 | 2024-09-17 | 三星電子株式会社 | Display device |
| CN111028687A (en) * | 2019-12-16 | 2020-04-17 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113826209A (en) * | 2020-02-27 | 2021-12-21 | 京东方科技集团股份有限公司 | Display panel, manufacturing method thereof and display device |
| CN111951729A (en) * | 2020-08-17 | 2020-11-17 | 上海天马有机发光显示技术有限公司 | Array substrate, display panel and display device |
| CN111951729B (en) * | 2020-08-17 | 2023-06-09 | 武汉天马微电子有限公司 | Array substrate, display panel and display device |
| CN112599010A (en) * | 2020-12-15 | 2021-04-02 | 昆山国显光电有限公司 | Display panel and display device |
| CN113516947A (en) * | 2021-04-22 | 2021-10-19 | 武汉天马微电子有限公司 | Display panel and display device |
| CN113393806A (en) * | 2021-06-30 | 2021-09-14 | 上海天马微电子有限公司 | Display panel and display device |
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