CN208351313U - A kind of analog output equipment of PLC host - Google Patents

Abstract

The utility model provides a kind of analog output equipment of PLC host, and the PLC analog output equipment includes: main control unit, is connect by parallel bus with the PLC host；Micro-control unit is communicated to connect by isolation serial peripheral interface bus and the main control unit；D/A conversion unit is communicated to connect by isolation serial peripheral interface bus and the micro-control unit；Filter unit is electrically connected with the D/A conversion unit.The utility model is in order to overcome the shortcomings of the analog output equipment of existing PLC host, using the output of integrated DAC chip design simulation amount, the output of integrated current voltage mode, especially under current output mode, using dynamic power management technology, system power dissipation and the degree of heat are reduced, reduces periphery circuit design cost, the temperature drift for reducing analog signal simultaneously, improves the precision of analog signal.

Description

A kind of analog output equipment of PLC host

Technical field

The utility model belongs to programmable controller chip technology field, is related to a kind of output equipment, more particularly to one The analog output equipment of kind PLC host.

Background technique

Currently, PLC (programmable controller) analog output module both domestic and external, most analog output module, Module design is carried out using discrete mode, voltage and current output needs two sets of circuits to complete, increases design difficulty and cost, Since design is complicated, the reliability of module is reduced, the power consumption of equipment is increased.

Therefore, how a kind of analog output equipment of PLC host is provided, by solve the prior art using in a manner of discrete into Row module design, voltage and current output need two sets circuits to complete, lead to increase design difficulty and cost, and reduce module can By property, increases many disadvantages such as equipment volume, have become those skilled in the art's technical problem urgently to be resolved in fact.

Utility model content

In view of the foregoing deficiencies of prior art, the purpose of this utility model is to provide a kind of simulations of PLC host Output equipment is measured, module design is carried out using discrete mode for solving the prior art, voltage and current output needs two sets of electricity Road is completed, and the problem of increasing design difficulty and cost, reducing the reliability of module, increase equipment volume is caused.

In order to achieve the above objects and other related objects, the analog output that the utility model provides a kind of PLC host is set Standby, the PLC analog output equipment includes: main control unit, is connect by parallel bus with the PLC host；Microcontroller list Member is communicated to connect by isolation serial peripheral interface bus and the main control unit；D/A conversion unit, it is serial outer by being isolated If interface bus and the micro-control unit communicate to connect；Filter unit is electrically connected with the D/A conversion unit.

In an embodiment of the utility model, it is total that the main control unit with the micro-control unit also passes through clock signal Line connection, for providing clock reference for the micro-control unit.

In an embodiment of the utility model, also pass through institute between the micro-control unit and the D/A conversion unit The the first transmission reset signal for stating micro-control unit to the D/A conversion unit, passes through the D/A conversion unit The second communication bus to the micro-control unit returns digital-to-analogue status error signal.

In an embodiment of the utility model, the filter unit includes: current-limiting circuit；Pressure limiting circuit, with the limit Current circuit is electrically connected；PI filtering circuit is electrically connected with the current-limiting circuit respectively；High frequency filtering circuit, with the PI mistake Circuit is filtered to be electrically connected；Anti-surge circuit is electrically connected with the high frequency filtering circuit.

In an embodiment of the utility model, the filter unit further include: connect with the D/A conversion unit Input terminal；In the first output end and second output terminal of the analog signal after the filtering unit filters.

In an embodiment of the utility model, the current-limiting circuit uses current-limiting resistance；Wherein, the current-limiting resistance One end is connect with input terminal.

In an embodiment of the utility model, the pressure limiting circuit includes first capacitor, the second capacitor, first diode And second diode；Wherein, the cathode of one end of first capacitor and first diode connects, the other end ground connection of first capacitor, The anode of first diode is connect with the cathode of the second diode, and the cathode of the second diode is connect with one end of the second capacitor, The other end of second capacitor is grounded.

In an embodiment of the utility model, the PI filter circuit includes third capacitor, the 4th capacitor, the 5th capacitor And first inductance；Wherein, one end of the third capacitor is connect with one end of the first inductance, another termination of the third capacitor The other end on ground, first inductance is connect with one end of the 4th capacitor, the other end ground connection of the 4th capacitor, and the one of the 5th capacitor End is connect with one end of the 4th capacitor, the other end ground connection of the 5th capacitor.

In an embodiment of the utility model, the high frequency filtering circuit includes the first magnetic bead and second being arranged in parallel Magnetic bead；The anti-surge circuit uses two-way TVS pipe；One end of first magnetic bead and the second magnetic bead is electric with the described 5th respectively One end of appearance is connected with the other end, the other end of first magnetic bead and the second magnetic bead both ends with the two-way TVS pipe respectively Connection.

As described above, the analog output equipment of PLC host described in the utility model, has the advantages that

The analog output equipment of PLC host described in the utility model is in order to overcome the analog output of existing PLC host The deficiency of equipment, using the output of integrated DAC chip design simulation amount, integrated current voltage mode output, especially in electric current Under output modes, using dynamic power management technology, system power dissipation and the degree of heat are reduced, reduces periphery circuit design cost, The temperature drift for reducing analog signal simultaneously, improves the precision of analog signal.

Detailed description of the invention

Fig. 1 is shown as theory structure of the analog output equipment of the PLC host of the utility model in an embodiment and shows It is intended to.

Fig. 2 is shown as implementing circuit figure of the filter unit of the utility model in an embodiment.

Component label instructions

The analog output equipment of 1 PLC host

11 main control units

12 micro-control units

13 D/A conversion units

14 filter units

15 power supply units

16 boosting units

141 current-limiting circuits

142 pressure limiting circuits

143 PI filtering circuits

144 high frequency filtering circuits

145 anti-surge circuits

S1~Sn step

Specific embodiment

The embodiments of the present invention is illustrated by particular specific embodiment below, those skilled in the art can be by this Content disclosed by specification understands other advantages and effect of the utility model easily.

Please refer to attached drawing.It should be clear that this specification structure depicted in this specification institute accompanying drawings, ratio, size etc., only to cooperate The revealed content of specification, so that those skilled in the art understands and reads, being not intended to limit the utility model can be real The qualifications applied, therefore do not have technical essential meaning, the tune of the modification of any structure, the change of proportionate relationship or size It is whole, in the case where not influencing the effect of the utility model can be generated and the purpose that can reach, it should all still fall in the utility model institute The technology contents of announcement obtain in the range of capable of covering.Meanwhile in this specification it is cited as "upper", "lower", "left", "right", The term of " centre " and " one " etc. is merely convenient to being illustrated for narration, rather than to limit the enforceable range of the utility model, Its relativeness is altered or modified, under the content of no substantial changes in technology, when being also considered as the enforceable scope of the utility model.

The technical principle of the analog output equipment of PLC host provided by the utility model are as follows:

This output equipment, as main control chip, is provided parallel bus interface, is led to PLC host using domestic FPGA Letter is communicated with association processing MCU by spi bus.Coprocessor MCU passes through isolation spi bus communication mode and DAC chip simultaneously Immediate data interaction is carried out, transmits the outputting data signals (including DAC output signal, reset signal etc.) of host, and read The status signal (including DAC status error signal) of DAC passback, DAC are responsible for that processing MCU signal will be assisted to be converted into really Analog signal realizes 16bit resolution voltage signal output (0~5V/1~5V/0~10V/-10~+10V) and current signal It exports (0~20mA/4~20mA).

The present embodiment provides a kind of analog output equipment of PLC host, the PLC analog output equipment includes:

Main control unit is connect by parallel bus with the PLC host；

Micro-control unit is communicated to connect by isolation serial peripheral interface bus and the main control unit；

D/A conversion unit is communicated to connect by isolation serial peripheral interface bus and the micro-control unit；

Filter unit is electrically connected with the D/A conversion unit.

The analog output equipment of PLC host provided by the present embodiment is described in detail below with reference to diagram. Output of the analog output equipment of PLC host described in the present embodiment using integrated DAC chip design simulation amount, integrated current Voltage mode output, using dynamic power management technology, reduces system power dissipation and fever journey especially under current output mode Degree reduces periphery circuit design cost, while reducing the temperature drift of analog signal, improves the precision of analog signal.

Referring to Fig. 1, being shown as theory structure schematic diagram of the analog output equipment of PLC host in an embodiment. As shown in Figure 1, the analog output equipment 1 of the PLC host includes main control unit 11, micro-control unit 12, digital-to-analogue conversion list Member 13, filter unit 14 and power supply unit 15.

The main control unit 11 passes through isolation serial peripheral interface bus (isolation SPI2 bus) and the micro-control unit Communication connection, the digital signal sent for receiving the PLC host, and data interaction is carried out with the micro-control unit 12； It is connected by clock signal bus (SYS_OSC), for providing clock reference (to save a crystalline substance for the micro-control unit 12 The cost of body).By parallel bus interface bus, it is connect with the PLC main-machine communication.In the present embodiment, the master control list Member 11 uses fpga chip, and there is reset pin 111 to connect for inputting the DEBUG pin 112 of computer program with FLASH FLASH pin 113, clock pins 114.

The micro-control unit 12 being connect with the main control unit 11, it is serial outer by being isolated with the AD conversion unit 13 If interface bus (isolation SPI1 bus) communication connection, carries out data interaction with the AD conversion unit 13.In the present embodiment In, isolation SPI1 bus mainly transmits DAC value to AD conversion unit 13, then by AD conversion unit 13 export electric current or Voltage value to outside.Meanwhile micro-control unit 12 can read the register value of DAC by isolation SPI1 bus, as DAC state is believed Breath, each channel output error message etc..

Also by the micro-control unit 12 to described between the micro-control unit 12 and the D/A conversion unit 13 The first communication bus (isolation DAC REST) transmission reset signal of D/A conversion unit 13, extremely by the D/A conversion unit The second communication bus (isolation DAC FAULT) passback digital-to-analogue status error signal of the micro-control unit.In the present embodiment, The micro-control unit 12 (MCU) is single-chip microcontroller.In the present embodiment, the micro-control unit 12 (MCU) has reset pin 121, for inputting the DEBUG pin 122 of computer program, for what is connect with LED, the LED indication pin 123 of indication LED.

The number that the D/A conversion unit 13 connecting with the micro-control unit 12 is used to transmit micro-control unit 12 is believed Number be converted to analog signal.In the present embodiment, the D/A conversion unit 13 has (switch) switched pins 131, conversion Pin 131 is the DCDC switch that DAC chip is internally integrated, for generating pwm signal, with the boosting unit 16 outside driving.It is logical Overregulate the adjustable booster circuit output voltage of PWM duty cycle, DAC is needed under current-mode using using this part electric Road, for exporting 0-20MA, the electric current of 4-20MA.

As shown in Figure 1, exporting 4 tunnel analog signal AO0, AO1, AO2, AO3 by the D/A conversion unit 13.

It is used to export the D/A conversion unit 13 with the filter circuit 14 that the D/A conversion unit 13 is electrically connected Analog signal be filtered.In the present embodiment, while realizing the function of basic output analog signal, the digital-to-analogue turns Unit 13 is changed in order to increase interference free performance, implements the verification of CRC-8 packet error on software, improves the reliability of data. The measures such as output filter circuit, clamp circuit are designed in hardware aspect, using completely isolated design method, reduce external interference Interference to output data.

Referring to Fig. 2, being shown as implementing circuit figure of the filter unit in an embodiment.As shown in Fig. 2, the filtering is single Member 14 includes: current-limiting circuit 141, pressure limiting circuit 142, PI filtering circuit 143, high frequency filtering circuit 144 and anti-surge circuit 145。

The input terminal OUT_A2 being connect with the D/A conversion unit；

In the first output end CON_OUT_A2 and second output terminal of the analog signal after the filtering unit filters CON_OUT_A2_GND。

Current-limiting circuit 141 is used to limit the electric current inputted in the filter circuit 14；

It is used to limit the electricity for inputting the filter circuit 14 with the pressure limiting circuit 142 that the current-limiting circuit 141 is electrically connected Pressure.

The PI filtering circuit 143 being electrically connected respectively with the current-limiting circuit 141 is used for DM EMI signal.

It is used to eliminate High-frequency Interference with the high frequency filtering circuit 144 that the PI filtering circuit 143 is electrically connected, for example, The interference signals such as ESD, EFT.

Anti-surge circuit 145 is electrically connected for preventing surge from interfering with the high frequency filtering circuit 144.

With continued reference to Fig. 2, the current-limiting circuit 141 uses current-limiting resistance R1, wherein one end of the current-limiting resistance R1 with Input terminal connection.

The pressure limiting circuit 142 includes first capacitor C1, the second capacitor C2, first diode D1 and the second diode D2； Wherein, one end of first capacitor C1 is connect with the cathode of first diode D1, the other end ground connection of first capacitor C1, the one or two pole The anode of pipe D1 is connect with the cathode of the second diode D2, and the cathode of the second diode D2 is connect with one end of the second capacitor C2, The other end of second capacitor C2 is grounded.

The PI filter circuit 143 includes third capacitor C3, the 4th capacitor C4, the 5th capacitor C5 and the first inductance L1；Its In, one end of the third capacitor C3 is connect with one end of the first inductance L1, the other end ground connection of the third capacitor C3, described The other end of first inductance L1 is connect with one end of the 4th capacitor C4, the other end ground connection of the 4th capacitor C4, the 5th capacitor C5's One end is connect with one end of the 4th capacitor C4, the other end ground connection of the 5th capacitor C5.

The high frequency filtering circuit 144 includes the first magnetic bead FB1 and the second magnetic bead FB2 being arranged in parallel；The antisurge Circuit 145 uses two-way TVS pipe D3.One end of the first magnetic bead FB1 and the second magnetic bead FB2 respectively with the 5th capacitor C5 One end connected with the other end, the other end of the first magnetic bead FB1 and the second magnetic bead FB2 respectively with the two-way TVS pipe D3 Both ends connection.

The power supply unit 15 being electrically connected with the peripheral booster circuit 16 of the AD conversion unit 13 is used for output voltage. In the present embodiment, in terms of power consumption control, dynamic power supplies control function, which is based upon, realizes DC- that is least in power-consuming in piece and optimizing DC boost converter can adjust the voltage of output driver within the scope of 7.4V to 29.5V, make module under current-mode Power consumption is minimum.Under the horsepower requirements increasingly required, the power consumption of equipment is reduced, while reducing the degree of heat of device, significantly The temperature drift for reducing analog device improves the precision of the signal of module output.

In conclusion the utility model is to overcome the shortcomings of the analog output equipment of existing PLC host, using integrated The output of DAC chip design simulation amount, integrated current voltage mode output, especially under current output mode, using dynamic Power management techniques reduce system power dissipation and the degree of heat, reduce periphery circuit design cost, while reducing analog signal Temperature drift improves the precision of analog signal.The utility model effectively overcomes various shortcoming in the prior art and has high industrial Utility value.

The above embodiments are only illustrative of the principle and efficacy of the utility model, and not for limitation, this is practical new Type.Any person skilled in the art can all carry out above-described embodiment under the spirit and scope without prejudice to the utility model Modifications and changes.Therefore, such as those of ordinary skill in the art without departing from the revealed essence of the utility model All equivalent modifications or change completed under mind and technical idea, should be covered by the claim of the utility model.

Claims (9)

1. a kind of analog output equipment of PLC host, which is characterized in that the analog output equipment of the PLC host includes:

Main control unit is connect by parallel bus with the PLC host；

Micro-control unit is communicated to connect by isolation serial peripheral interface bus and the main control unit；

D/A conversion unit is communicated to connect by isolation serial peripheral interface bus and the micro-control unit；

Filter unit is electrically connected with the D/A conversion unit.

2. the analog output equipment of PLC host according to claim 1, which is characterized in that

The main control unit also passes through clock signal bus with the micro-control unit and connect, for mentioning for the micro-control unit For clock reference.

3. the analog output equipment of PLC host according to claim 1, which is characterized in that

Also pass through the micro-control unit to the digital-to-analogue conversion list between the micro-control unit and the D/A conversion unit First transmission reset signal of member, it is total by the second communication of the D/A conversion unit to the micro-control unit Line returns digital-to-analogue status error signal.

4. the analog output equipment of PLC host according to claim 1, which is characterized in that

The filter unit includes:

Current-limiting circuit；

Pressure limiting circuit is electrically connected with the current-limiting circuit；

PI filtering circuit is electrically connected with the current-limiting circuit respectively；

High frequency filtering circuit is electrically connected with the PI filtering circuit；

Anti-surge circuit is electrically connected with the high frequency filtering circuit.

5. the analog output equipment of PLC host according to claim 1, which is characterized in that

The filter unit further include:

The input terminal being connect with the D/A conversion unit；

In the first output end and second output terminal of the analog signal after the filtering unit filters.

6. the analog output equipment of PLC host according to claim 4, which is characterized in that

The current-limiting circuit uses current-limiting resistance；Wherein, one end of the current-limiting resistance is connect with input terminal.

7. the analog output equipment of PLC host according to claim 4, which is characterized in that

The pressure limiting circuit includes first capacitor, the second capacitor, first diode and the second diode；Wherein, first capacitor The connection of the cathode of one end and first diode, the other end ground connection of first capacitor, anode and the second diode of first diode Cathode connection, the cathode of the second diode connect with one end of the second capacitor, and the other end of the second capacitor is grounded.

8. the analog output equipment of PLC host according to claim 4, which is characterized in that

The PI filtering circuit includes third capacitor, the 4th capacitor, the 5th capacitor and the first inductance；Wherein, the third capacitor One end connect with one end of the first inductance, the other end of third capacitor ground connection, the other end of first inductance and the One end of four capacitors connects, and the other end ground connection of the 4th capacitor, one end of the 5th capacitor is connect with one end of the 4th capacitor, and the 5th The other end of capacitor is grounded.

9. the analog output equipment of PLC host according to claim 8, which is characterized in that

The high frequency filtering circuit includes the first magnetic bead and the second magnetic bead being arranged in parallel；The anti-surge circuit is using two-way TVS pipe；

One end of first magnetic bead and the second magnetic bead is connect with one end of the 5th capacitor and the other end respectively, and described first The other end of magnetic bead and the second magnetic bead is connect with the both ends of the two-way TVS pipe respectively.