CN205917019U - MEMS devices - Google Patents
MEMS devices Download PDFInfo
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- CN205917019U CN205917019U CN201620687058.2U CN201620687058U CN205917019U CN 205917019 U CN205917019 U CN 205917019U CN 201620687058 U CN201620687058 U CN 201620687058U CN 205917019 U CN205917019 U CN 205917019U
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- layer
- vibration diaphragm
- cavity
- sacrifice layer
- mems device
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Abstract
The utility model provides a MEMS devices includes: the basement has first cavity, first sacrifice layer is located the basement, has the second cavity, vibration membrane layer, the at least partly of vibration membrane layer is supported by first sacrifice layer, and vibration membrane layer is including the vibration diaphragm that is located second cavity top, and the vibration diaphragm has to the second cavity outstanding suddenly towards the surface of second cavity, the second sacrifice layer is located vibration diaphragm, has the third cavity, the vibration diaphragm at least some be located the third cavity, the back electrode plate layer is located the second sacrifice layer, and the partly at least of back electrode plate layer supports the back electrode plate of back electrode plate layer above being located the third cavity by the second sacrifice layer, prevent the adhesion layer, lie in all the exposed surfaces between basement and vibration between the membrane layer, back electrode plate layer and the vibration diaphragm. The utility model discloses can reduce or prevent the adhesion between basement and vibration between the membrane layer, back electrode plate layer and the vibration diaphragm effectively.
Description
Technical field
This utility model belongs to mems technical field, forms anti-adhesion bump more particularly, to one kind using sacrifice layer
And form the dual anti-adhesion mems device of alchlor anti adhering layer between exercise quality block layer and polycrystalline buried regions or substrate
Part.
Background technology
Mems technology is described as 21 century with revolutionary new and high technology, and its development starts from the sixties in 20th century, mems
It is the abbreviation of English micro electro mechanical systems, i.e. microelectromechanical systems, is microelectronics and microcomputer
The ingenious combination of tool.In the mems process technology based on silicon, portioned product such as capacitance-type micro silicon microphone, to such product
The research progress of existing more than 20 year of product, the method implementing has multiple, primary structure such as silicon substrate, cavity, sacrifice
Oxide layer, vibration diaphragm, insulating oxide, polycrystalline back pole plate etc., but the microstructure manufacture in micro- silicon microphone device and should
With during, when superficial attractive forces between vibration diaphragm and silicon substrate are more than the elastic restoring force of micro structure, adjacent is micro-
To stick together between type structure (substrate, vibration diaphragm, back pole plate etc.), thus leading to component failure, making decrease in yield, glue
Even become in micromachined and application process and produced the main cause that finished product is scrapped, seriously constrained capacitance type micro-silicon Mike
Wind development and commercial application, in view of this it is necessary to give to the structure and manufacture method of existing capacitance-type micro silicon microphone
To improve to solve the above problems.
Utility model content
The purpose of this utility model is to provide a kind of mems device.
According to one side of the present utility model, a kind of mems device is provided to include: substrate, it is empty that described substrate has first
Chamber;First sacrifice layer, in described substrate, has the second cavity in described first sacrifice layer;Vibration diaphragm layer, described vibration
At least a portion of membrane layer is supported by described first sacrifice layer, and described vibration diaphragm layer is included above described second cavity
Vibration diaphragm, described vibration diaphragm has the bump prominent to described second cavity towards the surface of described second cavity;The
Two sacrifice layers, on described vibration diaphragm, have the 3rd cavity in described second sacrifice layer, and at least the one of described vibration diaphragm
Part is located in described 3rd cavity;Backplane flaggy, on described second sacrifice layer, at least a portion of described backplane flaggy
Supported by described second sacrifice layer, described backplane flaggy includes the back pole plate above described 3rd cavity;Wherein, described
Mems device also includes: anti adhering layer, between described substrate and described vibration diaphragm layer, backplane flaggy and vibration diaphragm it
Between all exposed surfaces on.
Preferably, the material of described first sacrifice layer and described second sacrifice layer is silicon oxide.
Preferably, described substrate is Semiconductor substrate, and described first sacrifice layer is located in described Semiconductor substrate.
Preferably, described bump be shaped as v shape, inverted trapezoidal or circular arc, described bump is from described vibration diaphragm direction
The height that the surface of described second cavity projects is 0.5 μm to 0.8 μm.
Preferably, described mems device also includes: 3rd sacrifice layer, on described backplane flaggy;Metal level, positioned at institute
State in 3rd sacrifice layer, described metal level includes lead.
Preferably, in described 3rd sacrifice layer, there is through hole, described metal level is via described through hole and described vibration diaphragm
Layer, described backplane flaggy connect.
Preferably, the material of described vibration diaphragm layer and/or described backplane flaggy is polysilicon.
Preferably, on the surface that described anti adhering layer is also located on described backplane flaggy and/or described mems device is exposed.
Preferably, the material of described anti adhering layer is alchlor.
According to another aspect of the present utility model, provide a kind of manufacture method of mems device, comprising: provide substrate,
First sacrifice layer is formed on described substrate;The upper surface of described first sacrifice layer is performed etching to form pit;Described
The upper surface of one sacrifice layer forms the vibration diaphragm layer including release aperture, and described vibration diaphragm layer fills described pit;Formation is covered
Cover the second sacrifice layer of described vibration diaphragm layer;Form the back pole plate including release aperture in the upper surface of described second sacrifice layer
Layer;Form deep trouth at the back side of substrate, and formation the is corroded in described substrate by described deep trouth to described substrate
One cavity;By the release aperture of described vibration diaphragm layer and the release aperture of described backplane flaggy to described first sacrifice layer and
Two sacrifice layers are corroded to form the second cavity in the first sacrifice layer, to form the 3rd cavity, filling in the second sacrifice layer
Vibration diaphragm layer in described pit is prominent to described second cavity;Between described substrate and described vibration diaphragm layer, the back of the body
Anti adhering layer is formed on all exposed surfaces between pole plate layer and vibration diaphragm.
Preferably, the material of described first sacrifice layer and described second sacrifice layer is silicon oxide.
Preferably, described substrate is Semiconductor substrate, and described first sacrifice layer is located in described Semiconductor substrate.
Preferably, described pit be shaped as v shape, inverted trapezoidal or circular arc, depth be 0.5 μm to 0.8 μm.
Preferably, described manufacture method also includes: forms 3rd sacrifice layer on described backplane flaggy;Sacrificial the described 3rd
Form metal level on domestic animal layer, and lead is formed to described metallic layer graphic.
Preferably, described manufacture method also includes: forms through hole in described 3rd sacrifice layer, described metal level is via institute
State through hole to be connected with described vibration diaphragm layer, described backplane flaggy.
Preferably, the material of described vibration diaphragm layer and/or described backplane flaggy is polysilicon.
Preferably, described manufacture method also includes: on described backplane flaggy and/or the exposed surface of described mems device
The described anti adhering layer of upper formation.
Preferably, the material of described anti adhering layer is alchlor.
Preferably, by the way of hf acid is stifling, gaseous corrosion is carried out to described first sacrifice layer or the second sacrifice layer.
In the mems device of this utility model embodiment, vibration diaphragm has bump on the surface of cavity downward,
This bump can reduce the contact area of vibration diaphragm and substrate effectively, thus reducing or preventing adhesion, it is to avoid component failure;
The anti-adhesion of alchlor is formed on all exposed surface between vibration diaphragm and substrate, between backplane flaggy and vibration diaphragm
Layer, due to hydrophobicity and the low surface adhesion of alchlor, had both played the purpose of dual anti-adhesion, and had not affected device
Energy.
Brief description
By the description to this utility model embodiment referring to the drawings, of the present utility model above-mentioned and other mesh
, feature and advantage will be apparent from, in the accompanying drawings:
Fig. 1 is the schematic flow sheet of the manufacture method of the mems device according to this utility model embodiment;
Fig. 2 to Figure 12 is the corresponding device of each step in manufacture method according to the mems device of this utility model embodiment
Part generalized section.
Specific embodiment
It is more fully described various embodiment of the present utility model hereinafter with reference to accompanying drawing.In various figures, identical
Element to be represented using same or similar reference.For the sake of clarity, the various pieces in accompanying drawing are not drawn to paint
System.
This utility model can present in a variety of manners, some of them example explained below.
Fig. 1 is the schematic flow sheet of the manufacture method of the mems device according to this utility model embodiment.As shown in figure 1,
The manufacture method of the mems device according to the present embodiment may include steps of.
In step s101, provide substrate, form the first sacrifice layer on the substrate.
In step s102, the upper surface of described first sacrifice layer is performed etching to form pit.
In step s103, form, in the upper surface of described first sacrifice layer, the vibration diaphragm layer including release aperture, described
Vibration diaphragm layer fills described pit.
In step s104, form the second sacrifice layer covering described vibration diaphragm layer.
In step s105, form, in the upper surface of described second sacrifice layer, the backplane flaggy including release aperture.
In step s106, the back side of substrate formed deep trouth, and by described deep trouth described substrate is corroded with
Form the first cavity in described substrate.
In step s107, by the release aperture of described vibration diaphragm layer and the release aperture of described backplane flaggy to described
First sacrifice layer and the second sacrifice layer are corroded to form the second cavity in the first sacrifice layer, to be formed in the second sacrifice layer
3rd cavity, the vibration diaphragm layer being filled in described pit is prominent to described second cavity.
In step s108, the exposed surface between described substrate and described vibration diaphragm layer forms anti adhering layer.
It is described in detail referring to Fig. 2 to Figure 12.
As shown in Fig. 2 providing substrate 10 first, then the first sacrifice layer 102 is formed on described substrate 10.As one
Preferably example, this substrate 10 can be Semiconductor substrate 101.More specifically, Semiconductor substrate 101 can be conventional half
Silicon substrate in semiconductor process, for example, can be the n-type silicon substrate that crystal orientation is<100>.The material of the first sacrifice layer 102 can be
Insulant in conventional semiconductor process, such as silicon oxide.It is, for example possible to use thermal oxide, low-pressure chemical vapor phase deposition
Or the method such as plasma enhanced chemical vapor deposition (pecvd) forms silicon oxide material in Semiconductor substrate 101 (lpvcd)
First sacrifice layer 102 of matter.The typical thickness of the first sacrifice layer 102 can be 1 μm to 2 μm.
As shown in figure 3, performing etching the upper surface of described first sacrifice layer 102 to form pit 103.Further and
Speech, can form the figure of pit 103 using the photoetching process in conventional semiconductor process in the upper surface of the first sacrifice layer 102
Shape window, then forms pit 103 by the method such as dry etching or wet etching.The depth of pit 103 is as subsequently formed
Bump height it is preferable that pit 103 depth be 0.5 μm to 0.8 μm.The flat shape of pit 103 and size can roots
Set according to being actually needed, for example v shape, inverted trapezoidal, circular arc etc..Preferably, the size of the graphical window of pit 103 is 1 μ
M to 2 μm.As a nonrestrictive example, the flat shape of pit a can be 1 μm * 0.6 μm of v shape.
As shown in figure 4, the upper surface in described first sacrifice layer 102 forms the vibration diaphragm layer 104 including release aperture, institute
State vibration diaphragm layer and fill described pit 103.The material of this vibration diaphragm layer 104 can be for example the polycrystalline of polysilicon or doping
Silicon, but it is not limited to this.
Furthermore, it is possible to use the method for low-pressure chemical vapor phase deposition (lpvcd), the first sacrifice layer 102 forms sediment
The polysilicon of long-pending doping, and graphical to it, and temperature during deposit can be 570 DEG C to 630 DEG C, the polycrystal layer that deposit is formed
Thickness can be 0.4 μm to 1.0 μm.Then, formed including release aperture by the photoetching and etching technics of semiconductor industry
Graphical, thus forming vibration diaphragm layer 104.In the bottom of vibration diaphragm layer 104, vibration diaphragm layer 104 also fills up pit
103.Wherein, the part being filled in pit 103 forms follow-up bump, can prevent viscous between vibration diaphragm layer and substrate
Even.
As shown in figure 5, forming the second sacrifice layer 105 covering described vibration diaphragm layer 104.Described second sacrifice layer 105
Material can be oxidation material, preferably silicon oxide.For example, it is possible to by low-pressure chemical vapor phase deposition (lpvcd) or wait from
The method of sub- enhanced chemical vapor deposition (pecvd) forms the second sacrifice layer 105 of silicon oxide material, and its thickness is generally permissible
It is 2.0 μm to 4.0 μm.
As shown in fig. 6, the upper surface in described second sacrifice layer 105 forms the backplane flaggy 106 including release aperture.This back of the body
The material of pole plate layer 106 can be for example the polysilicon of polysilicon or doping, but is not limited to this.
Furthermore, it is possible to use the method for low-pressure chemical vapor phase deposition (lpvcd), the second sacrifice layer 105 forms sediment
The polysilicon of long-pending doping, and graphical to it.Temperature during deposit can be 570 DEG C to 630 DEG C, the polycrystal layer that deposit is formed
Thickness can be 1.0 μm to 2.0 μm.Then, formed including release aperture by the photoetching and etching technics of semiconductor industry
Graphical, thus forming backplane flaggy 106.
As shown in fig. 7,3rd sacrifice layer 107 is formed on described backplane flaggy 106.The material of described 3rd sacrifice layer 107
Material can be oxidation material, preferably silicon oxide.For example, it is possible to be increased by low-pressure chemical vapor phase deposition (lpvcd) or plasma
The method of strong type chemical vapor deposition (pecvd) forms the 3rd sacrifice layer 107 of silicon oxide material, and its thickness can be generally
0.3 μm to 0.5 μm.
As shown in figure 8, performing etching in described 3rd sacrifice layer 107, to form through hole 108a and 108b, through hole 108a's
Vibration diaphragm layer 104 is exposed in bottom, and backplane flaggy 106 is exposed in the bottom of through hole 108b.Furthermore, can be using conventional half
The photoetching process of conductor, forms the window of through hole 108a and the window of through hole 108b in 3rd sacrifice layer 107, passes through dry afterwards
The method such as method etching or wet etching forms through hole 108a and 108b.The depth of through hole 108a makes through hole 108a bottom-exposed go out
Vibration diaphragm layer 104, the depth of through hole 108b makes through hole 108b bottom-exposed go out backplane flaggy 106.Through hole 108a can be used as
The fairlead that subsequent metal layer is connected with vibration diaphragm layer 104, through hole 108b can be used as subsequent metal layer and backplane flaggy 106
The fairlead being connected.
As shown in figure 9, form metal level 109 in described 3rd sacrifice layer 107, and graphical to described metal level 109
Form lead.Furthermore, can be using the sputtering in conventional semiconductor process or evaporation technology, in 3rd sacrifice layer 107
Upper deposited metal layer 106, its thickness can be 1 μm~2 μm, its material can be fine aluminium (al), aluminum silicon (al-si1%) or
ti+tin+al-si.Afterwards, by the photoetching and etching technics of semiconductor industry, metal level 106 is patterned, thus shape
Become one or more leads.
As shown in Figure 10, form deep trouth at the back side of substrate 10, and by described deep trouth, described substrate 10 is corroded
To form the first cavity 110 in described substrate.Furthermore, by conventional semiconductor photoetching technological method, in substrate 10
The back side forms cavity pattern, by special deep etching machine, typically can select the ams200 deep trouth of alcatel company of the U.S.
The etching apparatus such as etching machine, using mems industry routine bosch technique, etch cavity deep trouth.
As shown in figure 11, can be in the way of being fumigated using hf acid gas phase, by described first cavity 110 and vibration diaphragm layer
104 release aperture is corroded to described first sacrifice layer 102 with the first sacrifice layer 102 below described vibration diaphragm 104
Middle formation the second cavity, the vibration diaphragm layer 104 being filled in described pit 103 is prominent to described second cavity;By described
The release aperture of backplane flaggy 106 is corroded sacrificial with second below described backplane flaggy 106 to described second sacrifice layer 105
Form the 3rd cavity in domestic animal layer 105.Furthermore, for the first sacrifice layer 102 of silicon oxide material, hf acid gas can be adopted
Mutually fumigate mode, by the first sacrifice layer 102 between vibration diaphragm layer 104 and substrate 10 a part corrosion remove so that
Vibration diaphragm layer 104 is released, and obtains movable vibration diaphragm.Vibration diaphragm after release in motion, at least partly meeting
Enter the second cavity in the first sacrifice layer 102.For the second sacrifice layer 105 of silicon oxide material, hf acid gas phase can be adopted
Stifling mode, the part corrosion of the second sacrifice layer 105 between backplane flaggy 106 and vibration diaphragm layer 104 is removed, shape
Become the 3rd cavity.
After the first sacrifice layer 102 is partially removed, the vibration diaphragm layer 104 in pit 103 comes out, and is formed
Bump 104a.This bump 104a can reduce contact area between vibration diaphragm and substrate 10 or with the first sacrifice layer
Contact area between 102, so, even if coming in contact, because elastic restoring force is much larger than the superficial attractive forces of bump 104a,
Therefore can't stick together.
As shown in figure 12, on the exposed surface between described substrate 10 and described vibration diaphragm layer 104, backplane flaggy
106 and described mems device on anti adhering layer is formed on other exposed surfaces.The material of described anti adhering layer is three oxidations
Aluminum.
Furthermore, using atomic layer deposition (ald) equipment, deposit source is used as by trimethyl aluminium and water, controls anti-
Answer room temperature in the range of 100 DEG C~400 DEG C, pressure in several millibars, in described substrate 10 and described vibration diaphragm layer
Alchlor is deposited on exposed surface between 104, on other exposed surfaces on backplane flaggy 106 and described mems device
Layer 111, its thickness can be 2nm~10nm.The hydrophobicity of alchlor and low surface adhesion, had both played dual anti-adhesion
Purpose, and do not affect device performance.
In the mems device of this utility model embodiment, vibration diaphragm has bump on the surface of cavity downward,
This bump can reduce the contact area of vibration diaphragm and substrate effectively, thus reducing or preventing adhesion, it is to avoid component failure;
The anti-adhesion of alchlor is formed on all exposed surface between vibration diaphragm and substrate, between backplane flaggy and vibration diaphragm
Layer, due to hydrophobicity and the low surface adhesion of alchlor, had both played the purpose of dual anti-adhesion, and had not affected device
Energy.
Additionally, in the manufacture method of mems device of this utility model embodiment, being formed in the upper surface of the first sacrifice layer
Pit, and vibration diaphragm layer is formed on the first sacrifice layer and fills pit, after removing sacrifice layer segment, is filled in pit
Interior vibration diaphragm layer forms bump, reduces the contact area of exercise quality block and substrate, such that it is able to reducing or preventing to glue
Even, it is to avoid component failure;On all exposed surface between vibration diaphragm and substrate, between backplane flaggy and vibration diaphragm
Form alchlor anti adhering layer, due to hydrophobicity and the low surface adhesion of alchlor, both play the mesh of dual anti-adhesion
, and do not affect device performance.
According to embodiment of the present utility model as described above, these embodiments do not have all of details of detailed descriptionthe,
Do not limit the specific embodiment that this utility model is only described yet.Obviously, as described above, a lot of modifications and change can be made
Change.This specification is chosen and is specifically described these embodiments, is to preferably explain that principle of the present utility model and reality should
With so that skilled artisan can be well using this utility model and repairing on the basis of this utility model
Change use.Protection domain of the present utility model should be defined by the scope that this utility model claim is defined.
Claims (9)
1. a kind of mems device is it is characterised in that include:
Substrate, described substrate has the first cavity;
First sacrifice layer, in described substrate, has the second cavity in described first sacrifice layer;
Vibration diaphragm layer, at least a portion of described vibration diaphragm layer is supported by described first sacrifice layer, described vibration diaphragm layer
Including the vibration diaphragm above described second cavity, described vibration diaphragm has to institute towards the surface of described second cavity
State the bump that the second cavity projects;
Second sacrifice layer, on described vibration diaphragm layer, has the 3rd cavity, described vibration diaphragm in described second sacrifice layer
At least a portion be located at described 3rd cavity in;
Backplane flaggy, on described second sacrifice layer, at least a portion of described backplane flaggy is propped up by described second sacrifice layer
Support, described backplane flaggy includes the back pole plate above described 3rd cavity;
Wherein, described mems device also includes:
Anti adhering layer, all naked between described substrate and described vibration diaphragm layer, between backplane flaggy and vibration diaphragm
On dew surface.
2. mems device according to claim 1 is it is characterised in that described first sacrifice layer and described second sacrifice layer
Material be silicon oxide.
3., it is characterised in that described substrate is Semiconductor substrate, described first is sacrificial for mems device according to claim 1
Domestic animal layer is located in described Semiconductor substrate.
4. mems device according to claim 1 it is characterised in that described bump be shaped as v shape, inverted trapezoidal or circular arc
Shape, described bump is 0.5 μm to 0.8 μm from described vibration diaphragm towards the height that the surface of described second cavity projects.
5. mems device according to claim 1 is it is characterised in that also include: 3rd sacrifice layer, positioned at described back pole plate
On layer;
Metal level, in described 3rd sacrifice layer, described metal level includes lead.
6. mems device according to claim 5 is it is characterised in that have through hole in described 3rd sacrifice layer, described gold
Belong to layer to be connected with described vibration diaphragm layer, described backplane flaggy via described through hole.
7. mems device according to claim 1 is it is characterised in that described vibration diaphragm layer and/or described backplane flaggy
Material be polysilicon.
8. mems device according to claim 1 is it is characterised in that described anti adhering layer is also located on described backplane flaggy
And/or on the exposed surface of described mems device.
9. mems device according to claim 1 is it is characterised in that the material of described anti adhering layer is alchlor.
Priority Applications (1)
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CN201620687058.2U CN205917019U (en) | 2016-07-01 | 2016-07-01 | MEMS devices |
Applications Claiming Priority (1)
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CN201620687058.2U CN205917019U (en) | 2016-07-01 | 2016-07-01 | MEMS devices |
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CN201620687058.2U Withdrawn - After Issue CN205917019U (en) | 2016-07-01 | 2016-07-01 | MEMS devices |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106115602A (en) * | 2016-07-01 | 2016-11-16 | 杭州士兰集成电路有限公司 | MEMS and manufacture method thereof |
CN112897457A (en) * | 2021-04-08 | 2021-06-04 | 无锡韦尔半导体有限公司 | Semiconductor device and method for manufacturing the same |
US11161734B2 (en) | 2017-12-29 | 2021-11-02 | Hangzhou Silan Integrated Circuits Co., Ltd. | MEMS assembly and manufacturing method thereof |
-
2016
- 2016-07-01 CN CN201620687058.2U patent/CN205917019U/en not_active Withdrawn - After Issue
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106115602A (en) * | 2016-07-01 | 2016-11-16 | 杭州士兰集成电路有限公司 | MEMS and manufacture method thereof |
US11161734B2 (en) | 2017-12-29 | 2021-11-02 | Hangzhou Silan Integrated Circuits Co., Ltd. | MEMS assembly and manufacturing method thereof |
CN112897457A (en) * | 2021-04-08 | 2021-06-04 | 无锡韦尔半导体有限公司 | Semiconductor device and method for manufacturing the same |
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GR01 | Patent grant | ||
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Granted publication date: 20170201 Effective date of abandoning: 20171031 |