CN205405150U - Standard sinusoidal signal generating circuit - Google Patents
Standard sinusoidal signal generating circuit Download PDFInfo
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- CN205405150U CN205405150U CN201620142209.6U CN201620142209U CN205405150U CN 205405150 U CN205405150 U CN 205405150U CN 201620142209 U CN201620142209 U CN 201620142209U CN 205405150 U CN205405150 U CN 205405150U
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- amplifier
- circuit
- pass active
- resistance
- sinusoidal signal
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Abstract
The utility model provides a standard sinusoidal signal generating circuit, it includes: a singlechip, three shift register, three DA conversion chip, three current signal change voltage circuit and three second order low pass active power filter circuit, wherein, the singlechip is connected with three shift register respectively, and three shift register, three DA conversion chip, three current signal change voltage circuit and three second order low pass active power filter circuit share three routes, in every way: a shift register, a DA conversion chip, a current signal commentaries on classics voltage circuit and a second order low pass active power filter circuit connect gradually, three sinusoidal signal of group of output. The utility model discloses can export the benchmark sine wave signal of three smoothness, compare in prior art, the utility model discloses also the cost is reduced has improved reliability and signal waveform's output precision in circuit simplified.
Description
Technical field
This utility model relates to power technique fields, particularly relates to a kind of reference sinusoidal signal generating circuit.
Background technology
The sinusoidal reference signals of original power supply is usually and passes sequentially through frequency divider with oscillating circuit, enumerator, memorizer (EPROM), digital to analog converter, low pass filter produces, its circuit structure is complicated, three phase mains needs use three memorizeies, manufacturing cost is high, it is relatively independent owing to three phase mains often being organized sinusoidal signal generation circuit structure, therefore the phase contrast precision between sinusoidal signal is low and not easily adjust, if and to meet frequency modulation needs use tunable oscillator frequency stability poor, although using Crystal Oscillator Frequency Stability high but inconvenient frequency modulation.
Utility model content
This utility model provides a kind of reference sinusoidal signal generating circuit, it is possible to exporting three smooth baseline sinusoidal wave signals, compared to prior art, this utility model also reduces cost while circuit reduction and improves the output accuracy of reliability and signal waveform.
This utility model is to be achieved through the following technical solutions:
A kind of reference sinusoidal signal generating circuit, comprising: a single-chip microcomputer, three shift registers, three D/A conversion chips, three current signals turn potential circuit and three step low-pass active filter circuits;
Wherein, single-chip microcomputer is connected with three shift registers respectively, three shift registers, three D/A conversion chips, three current signals turn potential circuit and three step low-pass active filter circuits are divided into three tunnels, in every road: shift register, D/A conversion chip, current signal turn potential circuit and a step low-pass active filter circuit is sequentially connected with, and exports three groups of sinusoidal signals.
Effect is good, and current signal turns potential circuit and includes: the first amplifier, is connected to the first resistance between inverting input and the outfan of the first amplifier, and the normal phase input end of the first amplifier is connected to power supply ground by the second resistance;The inverting input of the first amplifier is connected to D/A conversion chip, and the outfan of the first amplifier is connected to step low-pass active filter circuit.
Effect is good, step low-pass active filter circuit includes the second amplifier, the inverting input of the second amplifier is connected with its outfan, the normal phase input end of the second amplifier turns potential circuit with current signal after the 4th resistance and the 3rd resistance and is connected, and junction first electric capacity of the 4th resistance and the 3rd resistance is connected to the inverting input of the second amplifier;The normal phase input end of the second amplifier is connected to power supply ground through the second electric capacity;The outfan output sinusoidal signal of the second amplifier.
Compared with prior art, the beneficial effects of the utility model are:
In this utility model, single-chip microcomputer controls three shift registers simultaneously, the digital quantity phase contrast of the three groups of reference sinusoidal signals therefore produced can be precisely controlled at 120 °, and it is adjustable, it is possible to eliminate the phase offset that subsequent conditioning circuit brings, effectively prevent three-phase imbalance phenomenon.The digital quantity of three groups of reference sinusoidal signals carries out digital-to-analogue conversion respectively through respective D/A conversion chip afterwards, signal after changing is current signal, turn potential circuit through overcurrent signal and be converted to stepped-up voltage signal, then be three smooth baseline sinusoidal wave signals respectively through three step low-pass active filter circuits by this signal condition.Instead of, by single-chip microcomputer and shift register, the baroque circuit that original agitator, frequency divider, enumerator, memorizer (EPROM) etc. are constituted, also reduce cost while circuit reduction and improve the output accuracy of reliability and signal waveform.
Accompanying drawing explanation
Fig. 1 is reference sinusoidal signal generating circuit schematic diagram of the present utility model;
Fig. 2 is that current signal of the present utility model turns potential circuit schematic diagram;
Fig. 3 is step low-pass active filter circuit schematic diagram of the present utility model.
Detailed description of the invention
In order to make the purpose of this utility model, technical scheme and advantage clearly understand, below in conjunction with drawings and Examples, this utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain this utility model, be not used to limit this utility model.
As it is shown in figure 1, a kind of reference sinusoidal signal generating circuit, comprising: 1, three shift registers of a single-chip microcomputer, 3, three current signals of 2, three D/A conversion chips turn potential circuit 4 and three step low-pass active filter circuits 5;
Wherein, single-chip microcomputer 1 is connected with three shift registers 2 respectively, three shift registers, 3, three current signals of 2, three D/A conversion chips turn potential circuit 4 and three step low-pass active filter circuits 5 are divided into three tunnels, in every road: a shift register 3, current signal of 2, D/A conversion chip turns potential circuit 4 and a step low-pass active filter circuit 5 is sequentially connected with, and exports three groups of sinusoidal signals.
Including as in figure 2 it is shown, current signal turns potential circuit 4: the first amplifier U1, be connected to the first resistance R1 between inverting input and the outfan of the first amplifier U1, the normal phase input end of the first amplifier U1 is connected to power supply ground by the second resistance R2;The inverting input of the first amplifier U1 is connected to D/A conversion chip 3, and the outfan of the first amplifier U1 is connected to step low-pass active filter circuit 5.
As shown in Figure 3, step low-pass active filter circuit 5 includes the second amplifier U2, the inverting input of the second amplifier U2 is connected with its outfan, the normal phase input end of the second amplifier U2 turns potential circuit 4 with current signal after the 4th resistance R4 and the three resistance R3 and is connected, and junction the first electric capacity C1 of the 4th resistance R4 and the three resistance R3 is connected to the inverting input of the second amplifier U2;The normal phase input end of the second amplifier U2 is connected to power supply ground through the second electric capacity C2;The outfan output sinusoidal signal of the second amplifier U2.
The foregoing is only preferred embodiment of the present utility model, not in order to limit this utility model, all any amendment, equivalent replacement and improvement etc. made within spirit of the present utility model and principle, should be included within protection domain of the present utility model.
Claims (3)
1. a reference sinusoidal signal generating circuit, it is characterized in that, including: a single-chip microcomputer (1), three shift registers (2), three D/A conversion chips (3), three current signals turn potential circuit (4) and three step low-pass active filter circuits (5);
Wherein, single-chip microcomputer (1) is connected with three shift registers (2) respectively, three shift registers (2), three D/A conversion chips (3), three current signals turn potential circuit (4) and three step low-pass active filter circuits (5) are divided into three tunnels, in every road: shift register (2), D/A conversion chip (3), current signal turns potential circuit (4) and a step low-pass active filter circuit (5) is sequentially connected with, and exports three groups of sinusoidal signals.
2. reference sinusoidal signal generating circuit as claimed in claim 1, it is characterized in that, current signal turns potential circuit (4) and including: the first amplifier (U1), being connected to the first resistance (R1) between inverting input and the outfan of the first amplifier (U1), the normal phase input end of the first amplifier (U1) is connected to power supply ground by the second resistance (R2);The inverting input of the first amplifier (U1) is connected to D/A conversion chip (3), and the outfan of the first amplifier (U1) is connected to step low-pass active filter circuit (5).
3. reference sinusoidal signal generating circuit as claimed in claim 1, it is characterized in that, step low-pass active filter circuit (5) includes the second amplifier (U2), the inverting input of the second amplifier (U2) is connected with its outfan, the normal phase input end of the second amplifier (U2) turns potential circuit (4) with current signal after the 4th resistance (R4) and the 3rd resistance (R3) and is connected, and the junction the first electric capacity (C1) of the 4th resistance (R4) and the 3rd resistance (R3) is connected to the inverting input of the second amplifier (U2);The normal phase input end of the second amplifier (U2) is connected to power supply ground through the second electric capacity (C2);The outfan output sinusoidal signal of the second amplifier (U2).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620142209.6U CN205405150U (en) | 2016-02-24 | 2016-02-24 | Standard sinusoidal signal generating circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201620142209.6U CN205405150U (en) | 2016-02-24 | 2016-02-24 | Standard sinusoidal signal generating circuit |
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CN205405150U true CN205405150U (en) | 2016-07-27 |
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CN201620142209.6U Expired - Fee Related CN205405150U (en) | 2016-02-24 | 2016-02-24 | Standard sinusoidal signal generating circuit |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112436748A (en) * | 2020-11-17 | 2021-03-02 | 天津津航计算技术研究所 | Digital sine wave circuit based on CPLD |
-
2016
- 2016-02-24 CN CN201620142209.6U patent/CN205405150U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112436748A (en) * | 2020-11-17 | 2021-03-02 | 天津津航计算技术研究所 | Digital sine wave circuit based on CPLD |
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GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160727 Termination date: 20200224 |