CN1819422A - Pit capacitance and charging pump circuit with self-polarizing switch - Google Patents
Pit capacitance and charging pump circuit with self-polarizing switch Download PDFInfo
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- CN1819422A CN1819422A CN 200610023647 CN200610023647A CN1819422A CN 1819422 A CN1819422 A CN 1819422A CN 200610023647 CN200610023647 CN 200610023647 CN 200610023647 A CN200610023647 A CN 200610023647A CN 1819422 A CN1819422 A CN 1819422A
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Abstract
The invention includes two high speed non dead-area well self-bias switches, two current limiting auxiliary switch circuits, two current-voltage converting circuits, and a multi-inputting dissymmetry comparator. The non dead area well self-bias switches and its relevant current limiting auxiliary switch circuits is used to turn on/off the charge pump and to provide charge and discharge path for the charge pump. The current-voltage converting circuit is used to limit the current and to convert the current of switch into voltage. The multi-inputting dissymmetry comparator is used to limit current and to compare the current of switch with threshold of current and to output control signal to control said high speed non dead area self-bias switches.
Description
Technical field
The present invention relates to the power supply charge pump circuit of a kind of booster type (malleation/negative pressure), especially refer to be applicable to the pit capacitance and charging pump circuit with self-polarizing switch of high speed, big current applications.
Background technology
In the switching capacity charge pump circuit of booster type shown in Figure 1 (malleation), the height relation of two polygonal voltages of PMOS pipe M1 and M2 changes in the variation that does not stop with clock, does not have an absolute ceiling voltage in the circuit.Be switched on and produce electric leakage for fear of the source drain of M1 and M2 and the PN junction between the N trap, need carry out meticulous control their trap potential, the N trap of guaranteeing PMOS be biased in it source electrode and drain electrode in the high end of voltage.
The way of handling this type of trap biasing in traditional circuit is the input that the source electrode of M1 and M2 and drain electrode is input to comparator, selects the offset side of N trap according to the comparative result of comparator.The advantage of this method is the high end of voltage that can select in source electrode and the drain electrode more accurately, but its shortcoming also is very tangible: because the delay of comparator may cause PN junction long period in trap biasing transfer process of source drain and N trap to be in conducting state.Therefore it not too is fit to be applied in the high speed charge pump.
Fig. 2 provides a kind of trap biasing circuit that is applicable in the high speed charge pump.M1, M3 share same N trap with M4 and link to each other with the source electrode of M3 and M4, and the drain electrode of M3 connects the source electrode of M1, and the drain electrode of M4 connects the source electrode of M3, and the grid of M3 connect the drain electrode of M4, and the grid of M4 connect the drain electrode of M3.Because the delay of device without comparison, its trap biasing conversion speed is very fast.Its shortcoming is that M3 and M4 end so if the source electrode of M1 and drain voltage are approaching, and the N trap is by floating empty, and the PN junction of source-drain electrode and trap may be switched on, and the dead band occurred, and in the dead band, trap voltage can't be determined.
If the source-drain electrode both end voltage difference of M1 and M2 is bigger in Fig. 2, will have big electric current so to capacitor C 1 and Cout charging, this big electric current needs to be avoided in some applications, therefore need the electric current that flow through M1 and M2 be limited.
And being sample streams, the way that in traditional charge pump electric current is limited crosses the electric current of M1 and M2, if electric current is excessive M1 and M2 are closed, the result has not had electric current among M1 and the M2, cause the output capacitance undercharge, if this situation may cause in soft start-up process and can't normally start, if may cause output capacitance too to be discharged in course of normal operation, output voltage drops on abnormal level.
If charge pump has a plurality of pump switch electric capacity, whether the electric current that each switch needs a current comparator to judge and flows through in the switch surpasses threshold value, so just needs a lot of comparators, and consequently the overhead increase is a lot, causes cost to increase.
Summary of the invention
The object of the present invention is to provide a kind of pit capacitance and charging pump circuit with self-polarizing switch, limit the problem that the charge pump output capacitance that causes is dashed the electricity deficiency with dead-time problem and the electric current of avoiding the trap biasing circuit in the high speed charge pump, and reduce the cost of system.
A kind of pit capacitance and charging pump circuit with self-polarizing switch provided by the present invention, it is characterized in that: comprise that two high speeds that link to each other mutually do not have dead band trap self-bias switches and electric current limits auxiliary switching circuit, two are not had dead band trap self-bias switches and the corresponding one by one current-voltage conversion circuit that links to each other of electric current restriction auxiliary switching circuit with described each high speed respectively, one is not had dead band trap self-bias switches with described each high speed respectively and limits the asymmetric comparator of many inputs that auxiliary switching circuit links to each other with each current-voltage conversion circuit with electric current, wherein: the electric current restriction auxiliary switching circuit that does not have dead band trap self-bias switches at a high speed and be attached thereto, be used for the switch-charge pump, for charge pump provides charge charging and discharge path; Current-voltage conversion circuit is used for the electric current restriction, and the current conversion on the switch is become voltage; The asymmetric comparator of many inputs is used for the electric current restriction, and electric current on the switch and electric current restriction threshold current are compared, and the output control signal is controlled above-mentioned high speed is not had dead band trap self-bias switches, reaches the purpose of electric current restriction.
Owing to having adopted above-mentioned technical solution, limit the problem that the charge pump output capacitance that causes is dashed the electricity deficiency with dead-time problem and the electric current of avoiding the trap biasing circuit in the high speed charge pump, and switching current-voltage transitions problem, and the cost of reduction system.
Description of drawings
Fig. 1 is existing a kind of booster type (malleation) charge pump schematic diagram.
Fig. 2 is existing high speed trap biascharge pump circuit schematic diagram.
Fig. 3 is a conventional switch capacitance switch current limit circuit schematic diagram.
Fig. 4 high speed of the present invention does not have dead band trap self-bias switches and electric current restriction auxiliary switching circuit schematic diagram.
The circuit diagram of asymmetric multi-input comparator among Fig. 5 the present invention.
Current-voltage conversion circuit schematic diagram among Fig. 6 the present invention.
The schematic diagram of Fig. 7 pit capacitance and charging pump circuit with self-polarizing switch of the present invention.
Embodiment
Before describing the present invention, examine prior art again closely, especially the reason that causes the trap biasing dead-time problem among Fig. 2 is done one and simply introduce: as the source-drain electrode voltage difference of M1 cut-in voltage V less than PMOS
ThpThe time, the gate source voltage of M3 and the gate source voltage of M4 are all less than the cut-in voltage V of PMOS
Thp, M3 and M4 all close, and the trap of M1 is by floating empty, so the dead band of trap biasing is exactly, and the source-drain electrode voltage difference of M1 is less than V
ThpThe interval.In like manner the dead band to M2 also is identical.
The way that circuit of the present invention addresses this problem is to increase a voltage drop Vthp between the drain electrode of the grid of M3 and M1, make the grid of M3 always hang down a Vthp than the drain electrode of M1, between the source electrode of the grid of M4 and M1, equally also increase a voltage drop Vthp, make the grid voltage of M4 always than low Vthp of source electrode of M1.The result who does like this be no matter the source-drain electrode voltage extent of M1 how, always can guarantee that having one among M3 and the M4 at least opens, dead-time problem has been avoided.If the drain voltage of M1 equals source voltage, M3 and M4 conducting simultaneously so, trap voltage is identical with source-drain electrode voltage; If the drain voltage of M1 is higher than source voltage, M4 conducting so, M3 closes, and the drain voltage of trap voltage and M1 is identical; If instead the source voltage of M1 is higher than drain voltage, M3 conducting so, M4 closes, and the source voltage of trap voltage and M1 is identical.
Circuit of the present invention is realized the function of a plurality of comparators in order to reduce the number of comparator with a kind of asymmetrical multi-input comparator.The difference input structure of this comparator is asymmetric, one side of differential configuration is single input, another side has a plurality of inputs, and the input of single input is a current limit threshold voltage, and the input of a plurality of inputs connects the switching current-voltage transitions point of switching capacity respectively.Because the gain of comparator is bigger, therefore as long as any electric current that flows through a switch in the switching capacity has surpassed current limit threshold, comparator will be exported the switch disconnection of a signal with all switching capacities.
The problem of charge pump output capacitance undercharge is that output capacitance does not fully obtain electric charge and replenishes because after reaching the electric current restriction, M1 and M2 are closed, and be considerably less to the electric charge of output capacitance from M1 and M2 in the single clock cycle, and output voltage descends.
Circuit of the present invention increases a P cock in parallel with M1 and M2 respectively, after reaching the electric current restriction, M1 and M2 are closed, but P cock keeps original normal operating conditions, the electric current that flows through P cock is not subjected to the restriction of current limit circuit, therefore has electric current to charge to output capacitance by P cock always, and the result has enough electric charges to replenish to output capacitance in soft start-up process, charge pump can normally start, and output voltage can be kept normal output in course of normal operation.
Circuit of the present invention reaches the resistance R 1 of connecting with switch with a switch ML1, is connected in parallel on source and the drain electrode of switch M1, realizes the current-voltage conversion.The grid-control system signal of ML1 is identical with the grid-control system signal of M1, and their drain electrode links together, and the source electrode of ML1 is connected by the source electrode of resistance R 1 and M1, and output point is at the common point of resistance R 1 and switch ML1.After switch M1 opens, there is electric current to flow through M1, the size of this electric current and M1 source-drain electrode voltage are directly proportional, the resistance of ML1 can be ignored with respect to the resistance of R1, so the voltage at resistance R 1 two ends just equals the voltage at M1 two ends, the electric current that flows through M1 is big more, and the voltage at resistance R 1 two ends is just big more; Have no progeny when switch M1 closes, ML1 also turn-offs, and does not have electric current to flow through M1 and R1, and the voltage at R1 two ends is 0.
Below an embodiment of pit capacitance and charging pump circuit with self-polarizing switch of the present invention is described in detail in conjunction with its accompanying drawing.
Referring to Fig. 7, the application example of circuit of the present invention does not have the asymmetric comparator of many inputs that current-voltage conversion circuit that dead band trap self-bias switches and electric current restriction auxiliary switching circuit, two represented by Fig. 6 and a Fig. 5 represent by two high speeds of being represented by Fig. 4 and forms." Vin " end that does not have dead band trap self-bias switches and electric current restriction auxiliary switching circuit 11 at a high speed is connected input signal Vin, out end connected node ct2, and the SM1g end connects ph1, M1g end connected node S1g; Do not have the Vin end connected node ct2 of dead band trap self-bias switches and electric current restriction auxiliary switching circuit 12 at a high speed, the out end connects the vout node, and the SM1g end connects ph2, M1g end connected node S2G; The anodal connected node ct2 of capacitor C 1, negative pole links to each other with the output of inverter xi1; The input A of current-voltage conversion circuit 21 connects input signal Vin, input B connected node ct2, output O connected node N5; The input A connected node ct2 of " current-voltage conversion circuit " 22, input B connects output node vout, output O connected node N6; The input inp of asymmetric multi-input comparator 3 connects reference voltage input vref, inn1 end connected node N5, inn2 end connected node N6, output Nout end connected node N7.N7 and ph1 are through " OR " computing output S1G, and N7 and ph2 are through " OR " computing output S2G; The anodal connected node vout of output capacitance Cout, negative pole connected node gnd.
" no dead band high speed trap self-bias switches " module among Fig. 4 is by electric current heavy I1, I2; Voltage shifts PMOS pipe M5, M6; Trap switch M3 and M4 form.The drain electrode that the positive pole of heavy I1 of electric current and I2 is connected M5 and M6 respectively is in N3, the N4 point; The grid that voltage shifts PMOS pipe M5 and M6 links to each other with drain electrode, and their trap links to each other with source electrode, and the source electrode of M5 connects the drain electrode of trap switch M3, and the source electrode of M6 connects the drain electrode of trap switch M4; The trap of trap switch M3 and M4 and their source link together, it is the source electrode of M1 that the drain electrode of M3 and the source electrode of M5 are connected to the N1 point, and the drain electrode of M4 and the source electrode of M6 are connected to N2 point, the i.e. drain electrode of M1, the grid of M3 are connected to the drain electrode of M6, and in like manner the grid of M4 are connected to the drain electrode of M5; The grid of M1 connect M1g.
When switch N2 point voltage was higher than the N1 point voltage, N3, N4 point voltage were respectively than N1, the low V of N2 point voltage
Thp, the source grid voltage of M4 is greater than a V
Thp, M4 opens, and the source grid voltage of M3 is less than a V
Thp, M3 turn-offs, and the trap voltage of M1 equals the N2 point voltage.If instead the N1 point voltage is higher than the N2 point voltage, then the trap voltage of M1 equals the N1 point voltage.If N1 voltage and N2 voltage equate that then the source grid voltage of M3 and M4 is equal to a V
Thp, trap voltage equals N1 and N2 point voltage.Fasten any pass at N1 point voltage and N2 point voltage, can both guarantee that M3 or M4 open, and therefore the dead band can not occur.
" electric current restriction auxiliary switch " among Fig. 4 formed by being connected in parallel on M1 P cock SM1.The source electrode of SM1 links to each other at the N1 point with the source electrode of M1, and drain electrode links to each other at the N2 point, and trap also links together and concerned by efficient no dead band trap auto bias circuit control connection; The grid of SM1 connect SM1g.
Fig. 5 provides asymmetric multi-input comparator.The asymmetric input of this comparator is made up of CM1, CM2, CM3; The input stage electric current is provided by current source CI1; LM1 and LM2 form current mirror load; CM5 forms second level input; The CI2 current source is as partial load.Asymmetric input pipe CM1, CM2, CM3 are made of the PMOS pipe, their trap and source electrode are connected in the CN1 point, the grid of CM1, CM2, CM3 connects input signal inp, inn1, inn2 respectively, the drain electrode of CM1 connects the drain electrode of LM1 in the LN1 point, CM2, the drain electrode of CM3 and the drain electrode of LM2 are connected in the LN2 point; The positive pole of CI1 connects power supply, and negative pole connects the CN1 point; The LM1 grid leak is extremely continuous, and source electrode and substrate are connected to ground; The grid of LM2 connects the LN1 point, and source electrode is connected ground with substrate; The grid of CM5 connects the LN2 point, and the negative pole of drain electrode and CI2 is connected in N
OutPoint, source electrode are connected ground with substrate; The positive pole of CI2 connects power supply.
Because the gain of comparator is very big, very little by the offset of asymmetric introducing, compared result can not produce big influence.
Fig. 6 has provided current-voltage conversion circuit, and a switch ML1 reaches the resistance R 1 of connecting with switch, is connected in parallel on source and the drain electrode of switch M1, realizes the current-voltage conversion.The grid-control system signal of ML1 is identical with the grid-control system signal of M1, is M1g; Their drain electrode links together as input B, and the source electrode of ML1 is connected by the source electrode of resistance R 1 and M1, as the input A of this circuit; Output point O is at the common point of resistance R 1 and switch ML1.After switch M1 opens, there is electric current to flow through M1, the size of this electric current and M1 source-drain electrode voltage are directly proportional, the resistance of ML1 can be ignored with respect to the resistance of R1, so the voltage at resistance R 1 two ends just equals the voltage at M1 two ends, the electric current that flows through M1 is big more, and the voltage at resistance R 1 two ends is just big more; Have no progeny when switch M1 closes, ML1 also turn-offs, and does not have electric current to flow through M1 and R1, and the voltage at R1 two ends is 0.
Operation principle of the present invention: the electric current that flows through " not having at a high speed dead band trap self-bias switches and electric current restriction auxiliary switch " circuit converts voltage signal to through " current-voltage conversion circuit " and is input in " asymmetric multi-input comparator " and reference voltage compares, if current signal surpasses maximum current limit, then " multi-input comparator " output " 1 " signal is changed to " 1 " with S1G and S2G, S1G and S2G close the big switch M1 of " not having dead band trap self-bias switches and electric current restriction auxiliary switch at a high speed " 1 and 2, the electric current that flows through M1 reduces to zero, but, still there is electric current to flow through auxiliary switch SM1 and charges to output capacitance Cout from vin because SM1 is not closed.Because SM1 is much smaller than M1, so this electric current is much smaller than the maximum constraints electric current.At any time all there is electric current to flow through SM1, so there are enough electric currents can guarantee that soft start and the voltage in the charge pump normal processes in the charge pump start-up course are stable to output capacitance Cout charging.
Though the present invention is described with reference to current instantiation, but those skilled in the art should be realized that, above example only is to be used for illustrating the present invention, also can make the variation and the modification of various equivalences under the situation that does not break away from spirit of the present invention.Therefore, if in connotation scope of the present invention to the variation of above-mentioned example, modification all will drop in the scope of claims of the present invention.
Claims (5)
1. pit capacitance and charging pump circuit with self-polarizing switch, it is characterized in that: comprise two high speeds that link to each other mutually do not have dead band trap self-bias switches and electric current restriction auxiliary switching circuit, two respectively with described each do not have at a high speed dead band trap self-bias switches and the corresponding one by one current-voltage conversion circuit that links to each other of electric current restriction auxiliary switching circuit, one do not have dead band trap self-bias switches with described each high speed respectively and limit the asymmetric comparator of many inputs that auxiliary switching circuit links to each other with each current-voltage conversion circuit with electric current, wherein:
The electric current restriction auxiliary switching circuit that does not have dead band trap self-bias switches at a high speed and be attached thereto is used for the switch-charge pump, for charge pump provides charge charging and discharge path;
Current-voltage conversion circuit is used for the electric current restriction, and the current conversion on the switch is become voltage;
The asymmetric comparator of many inputs is used for the electric current restriction, and electric current on the switch and electric current restriction threshold current are compared, and the output control signal is controlled above-mentioned high speed is not had dead band trap self-bias switches, reaches the purpose of electric current restriction.
2. pit capacitance and charging pump circuit with self-polarizing switch according to claim 1, it is characterized in that: described high speed does not have dead band trap self-bias switches circuit and is made up of electric current heavy (I1, I2), voltage transfering transistor (M5, M6), trap switch (M3, M4), and electric current sinks the positive pole of (I1, I2) and connects the drain electrode of transistor (M5, M6) respectively in point (N3, N4); The grid of voltage transfering transistor (M5 and M6) links to each other with drain electrode, and their trap links to each other with source electrode, and the source electrode of transistor (M5) connects the drain electrode of trap switch (M3), and the source electrode of M6 connects the drain electrode of trap switch (M4); The trap of trap switch (M3, M4) and their source electrode link together, the source electrode of the drain electrode of transistor (M3) and transistor (M5) is connected to the drain electrode of point (N1) transistor (M4) and the source electrode of transistor (M6) is connected to point (N2), the grid of transistor (M3) are connected to the drain electrode of transistor (M6), and in like manner the grid of transistor (M4) is connected to the drain electrode of transistor (M5).
3. pit capacitance and charging pump circuit with self-polarizing switch according to claim 1 and 2, it is characterized in that: described electric current restriction auxiliary switching circuit by and transistor (M1) transistor switch (SM1) in parallel form, the source electrode of the source electrode of transistor switch (SM1) and transistor (M1) links to each other at point (N1), and drain electrode links to each other at point (N2).
4. pit capacitance and charging pump circuit with self-polarizing switch according to claim 1, it is characterized in that: the asymmetric comparator of described many inputs comprises transistor (CM1, CM2, CM3), the current source (CI1) of input stage electric current is provided, transistor (the LM1 of current mirror load, LM2), the transistor (CM5) and the partial load current source (CI2) of second level input, transistor (CM1, CM2, CM3) trap and source electrode are connected in point (CN1), grid connects input signal (inp respectively, inn1, inn2), the drain electrode of transistor (CM1) connects the drain electrode of transistor (LM1) in point (LN1), transistor (CM2, the drain electrode of drain electrode CM3) and transistor (LM2) is connected in point (LN2); The positive pole of current source (CI1) connects power supply, negative pole tie point (CN1); Transistor (LM1) grid leak links to each other, and source electrode and substrate are connected to ground; The grid tie point (LN1) of transistor (LM2), source electrode is connected ground with substrate; The grid tie point (LN2) of transistor (CM5), the negative pole of drain electrode and current source (CI2) is connected in point (Nout), and source electrode is connected ground with substrate; The positive pole of current source (CI2) connects power supply.
5. pit capacitance and charging pump circuit with self-polarizing switch according to claim 1, it is characterized in that: described current-voltage conversion circuit reaches the resistance R 1 of connecting with switch by a switching transistor (ML1), and the source and the drain electrode that are connected in parallel on switching transistor (M1) form.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100236471A CN100536298C (en) | 2006-01-26 | 2006-01-26 | Pit capacitance and charging pump circuit with self-polarizing switch |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2006100236471A CN100536298C (en) | 2006-01-26 | 2006-01-26 | Pit capacitance and charging pump circuit with self-polarizing switch |
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| CN1819422A true CN1819422A (en) | 2006-08-16 |
| CN100536298C CN100536298C (en) | 2009-09-02 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8120413B2 (en) | 2008-08-18 | 2012-02-21 | Semiconductor Manufacturing International (Beijing) Corporation | Charge pump circuit |
| CN101771340B (en) * | 2008-12-31 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Charge pump |
| CN101753012B (en) * | 2008-12-12 | 2012-10-31 | 中芯国际集成电路制造(北京)有限公司 | Charge pump circuit |
| CN108809084A (en) * | 2018-06-14 | 2018-11-13 | 长江存储科技有限责任公司 | Charge pump circuit |
| CN109994141A (en) * | 2017-12-31 | 2019-07-09 | 北京同方微电子有限公司 | A kind of shared charge pump system applied to flash structure memory |
-
2006
- 2006-01-26 CN CNB2006100236471A patent/CN100536298C/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8120413B2 (en) | 2008-08-18 | 2012-02-21 | Semiconductor Manufacturing International (Beijing) Corporation | Charge pump circuit |
| CN101753012B (en) * | 2008-12-12 | 2012-10-31 | 中芯国际集成电路制造(北京)有限公司 | Charge pump circuit |
| CN101771340B (en) * | 2008-12-31 | 2012-10-31 | 中芯国际集成电路制造(上海)有限公司 | Charge pump |
| CN109994141A (en) * | 2017-12-31 | 2019-07-09 | 北京同方微电子有限公司 | A kind of shared charge pump system applied to flash structure memory |
| CN108809084A (en) * | 2018-06-14 | 2018-11-13 | 长江存储科技有限责任公司 | Charge pump circuit |
| CN108809084B (en) * | 2018-06-14 | 2020-03-06 | 长江存储科技有限责任公司 | Charge pump circuit |
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| Publication number | Publication date |
|---|---|
| CN100536298C (en) | 2009-09-02 |
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Effective date of registration: 20210107 Address after: 214135 -6, Linghu Avenue, Wuxi Taihu international science and Technology Park, Wuxi, Jiangsu, China, 180 Patentee after: China Resources micro integrated circuit (Wuxi) Co., Ltd Address before: 200233, room 67, building 421, No. 1103 Rainbow Road, Shanghai Patentee before: CHINA RESOURCES POWTECH (SHANGHAI) Co.,Ltd. |