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CN1731915B - multilayer circuit board device - Google Patents

multilayer circuit board device Download PDF

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Publication number
CN1731915B
CN1731915B CN2004100558508A CN200410055850A CN1731915B CN 1731915 B CN1731915 B CN 1731915B CN 2004100558508 A CN2004100558508 A CN 2004100558508A CN 200410055850 A CN200410055850 A CN 200410055850A CN 1731915 B CN1731915 B CN 1731915B
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CN
China
Prior art keywords
circuit board
resin
temperature
electronic component
dissipating resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2004100558508A
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Chinese (zh)
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CN1731915A (en
Inventor
野口高
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
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Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to CN2004100558508A priority Critical patent/CN1731915B/en
Publication of CN1731915A publication Critical patent/CN1731915A/en
Priority to HK06108474.2A priority patent/HK1088494A1/en
Application granted granted Critical
Publication of CN1731915B publication Critical patent/CN1731915B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A multilayer circuit board assembly comprising an electronic component mounted on or in the assembly; a conductive layer electrically connected to the electronic component; a high-temperature dissipating resin which is an insulating material and is configured to dissipate heat generated in an apparatus; and a molding resin surrounding the electronic component. Heat generated at electronic components of a circuit board assembly is conducted and dissipated by high temperature dissipating material throughout the assembly. In addition, since the high-temperature dissipating resin is an insulating material, it is not necessary to consider the problem of short circuit in the device.

Description

Multilayer circuit board device
Technical Field
The present invention relates to a multilayer circuit board arrangement. More particularly, the present invention relates to a SIP (system in package) having electronic components therein.
Background
Recently, electronic components are mounted on a circuit board in order to improve electronic characteristics including integration, a smaller package size, and a lower noise influence. After electronic components are mounted in a circuit board, wiring layers (conductive layers) are layered thereon by a build-in method to form a multilayer circuit board device. The electronic component and the wiring layer are molded with resin.
However, according to a conventional multilayer circuit board, heat generated from electronic components is difficult to radiate and dissipate from the device. Therefore, the thermal impedance increases and the power consumption also increases. In addition, the device may be damaged due to such unwanted heat, and thus, the reliability of the product is also reduced.
It is an object of the present invention to provide a multilayer circuit board device in which heat can be efficiently dissipated.
It is another object of the present invention to provide a method of making a multilayer circuit board device in which heat can be efficiently dissipated.
Additional objects, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art upon examination of the following or may be learned by practice of the invention. The objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
Disclosure of Invention
A circuit board device of the present invention includes:
a central substrate formed in the device;
an electronic component mounted on said central substrate;
a conductive layer formed on a side of the electronic component opposite to the central substrate to be connected to the electronic component;
a high-temperature-dissipating resin which is an insulating material and is formed so as to cover a side of the conductive layer opposite to the above-mentioned electronic component formed on the center substrate via the high-temperature-dissipating resin, and is formed on the center substrate so as to dissipate heat generated in the device; and
a molding resin surrounding the electronic component,
wherein,
a first heat conduction path is formed in a form extending from the electronic component via the conductive layer and the high-temperature-dissipating resin,
a second heat conduction path is formed to extend from the electronic component through the high-temperature dissipating resin and the center substrate.
The circuit board device of the invention, wherein
The high-temperature dissipating resin is formed in contact with the electronic component.
A circuit board device of the present invention further comprises:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
A circuit board device of the present invention, wherein
The high temperature dissipating resin covers the conductive layer and the electronic component.
The circuit board device of the invention further comprises
A through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
The circuit board device of the invention, wherein
The high-temperature dissipating resin is configured to form a heat conduction path through which heat generated in the device is well dissipated.
The circuit board device of the invention, wherein
The high temperature dissipating resin is made of a silicon aluminum system material having an emissivity of about 0.92.
The circuit board device of the invention, wherein
The high-temperature dissipating resin is coated on both surfaces of the center substrate.
The circuit board device of the present invention further comprises:
an electrically conductive frame formed in the device and extending out of the device for electrical connection to an external board.
The circuit board device of the invention, wherein
The conductive frame is made of copper.
The circuit board device of the invention, wherein
The high-temperature dissipating resin is configured to be in contact with the electronic component.
The circuit board device of the present invention further comprises:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
The circuit board device of the invention, wherein
The high temperature dissipating resin covers the conductive layer and the electronic component.
The circuit board device of the present invention further comprises:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
The circuit board device of the invention, wherein
The high-temperature dissipating resin is configured to form a heat conduction path through which heat generated in the device is well dissipated.
The circuit board device of the invention, wherein
The high temperature dissipating resin is made of a silicon aluminum system material having an emissivity of about 0.92.
Drawings
Fig. 1 is a cross-sectional view illustrating a multi-layered circuit board assembly according to a first preferred embodiment of the present invention.
Fig. 2A-2F are cross-sectional views depicting steps in the fabrication of a multi-layer circuit board assembly shown in fig. 1.
Fig. 3 is a cross-sectional view illustrating a multi-layered circuit board assembly according to a second preferred embodiment of the present invention.
Fig. 4A-4G are cross-sectional views depicting steps in the fabrication of a multi-layer circuit board assembly shown in fig. 3.
Detailed Description
In the following detailed description of the preferred embodiments, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific preferred embodiments in which the invention may be practiced. These preferred embodiments are described in sufficient detail to enable those skilled in the art to practice the invention, and it is to be understood that other preferred embodiments may be utilized and that mechanical and electrical changes may be made without departing from the spirit and scope of the present invention. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the present invention is defined only by the appended claims.
Fig. 1 is a cross-sectional view illustrating a multilayer circuit board assembly 10 according to a first preferred embodiment of the present invention. The multilayer circuit board device 10 includes electronic components (14 and 16) mounted on or within the device; a conductive layer (22) electrically connected to the electronic components (14 and 16); high-temperature dissipating resins (26a, 26b, and 26c) configured to dissipate heat generated in the apparatus 10; and a molding resin 30 surrounding the electronic components (14 and 16).
The multilayer circuit board assembly 10 further includes a central substrate 12; electrode 18: connection terminals 20, and through-holes (through-holes) 24 for electrical connection. The connection terminal 20 may be a solder ball.
The electronic components include a semiconductor chip 14 and a passive device 16. The central substrate 12 is made of a glass epoxy material. The molding resin 30 is an epoxy resin such as prepreg. The high-temperature-dissipating resin 26a is coated on both surfaces of the center substrate 12. High temperature dissipating resin 26b overlies one surface of intermediate conductive layers 22 formed within device 10. Another high-temperature-dissipating resin 26c is filled in the through-hole, not for electrical connection, but for thermal conduction.
The semiconductor chip 14 is directly mounted on the high-temperature-dissipating resin 26 a. The connection terminals of the semiconductor chip 14 are electrically connected to the conductive layer 22. The passive device 16 is directly mounted on the high-temperature dissipating resin 26 b.
The high temperature dissipating resins 26a, 26b and 26c are designed and configured to form a heat conducting path through which heat generated in the device 10 can be well conducted and dissipated. High temperature dissipating resins 26a, 26b, and 26c may be made of a silicon-aluminum system material having an emissivity of about 0.92. The high temperature dissipating resin is an insulating material and is not electrically conductive.
Generally, ceramics have a lower thermal conductivity than metals (e.g., copper); however, the emissivity of ceramic (0.92) is higher than that of copper (0.03). According to the present invention, a high temperature dissipating material conducts heat only without short-circuiting. A liquid ceramic, which may be "ceramic-alpha" manufactured by Ceramission ltd, tokyo, japan, may be used as the high-temperature dispersing material (resin).
The multilayer circuit board assembly 10 is formed by a build-up process after the electronic components 14 and 16 are mounted.
Fig. 2A-2F are cross-sectional views depicting steps in the fabrication of the multilayer circuit board device 10 shown in fig. 1. First, as shown in fig. 2A, a high-temperature dispersing resin is sprayed and coated on both surfaces of the center substrate 12. Next, as shown in fig. 2B, the bottom surface of the semiconductor chip 14 is directly mounted on the high-temperature-dissipating resin. Thereafter, the resin is thermally hardened to form the high temperature dissipation layer 26a having a thickness of about 30 μm to 200 μm.
Then, the semiconductor chip 14 is molded with an epoxy resin (e.g., prepreg) resin, and the resin is thermally hardened to form a molding resin 30, as shown in fig. 2C. The molding resin layer 30 has holes extending to the high-temperature dissipation layer 26 a. The holes are filled with a high temperature dissipating resin and heated to harden. The high-temperature dissipating resin 26c in the hole is a thermal path to conduct heat generated in the device, particularly at the electronic components 14 and 16, to the outside.
Next, a conductive pattern (conductive layer) 22 is formed in a sputtering process and an electroplating process, and then a high-temperature-dissipating resin is coated on the conductive layer 22. Thereafter, the resin is heated to be hardened to form the high temperature dissipation layer 26b, as shown in fig. 2D. The electrodes of the semiconductor chip 14 are electrically connected to the conductive layer 22.
Then, as shown in fig. 2E, the passive component 16 is mounted on the high temperature dissipation layer 26b and is resin-molded. The resin is thermally hardened (hardened by heating) to form a molding resin layer 30 having a hole (through hole) extending to the high-temperature dissipation layer 26 b. The holes are filled with a high temperature dissipating resin, and the resin is heated to harden. The high temperature dissipating resin 26c in the holes serves as a thermal path to conduct heat generated in the device, particularly at the electronic components 14 and 16, outward. In the molding resin 30, the through-holes 24 are formed for electrical connection.
As shown in fig. 2F, a conductive layer 22 is formed on the uppermost surface of the device, and electronic components (14 and 16) are mounted on the conductive layer 22. Thereafter, as shown in fig. 1, an electrode 18 for external connection is formed on the bottom surface of the device, and a connection terminal 20, such as a solder ball, is provided on the electrode 18. The multilayer circuit board device 10 thus manufactured can be mounted on a main board.
According to the first preferred embodiment described above, heat generated at the electronic components of the device is conducted and dissipated to the center substrate 12 and the connection terminals 20 through the high- temperature dissipation resins 26a, 26b, and 26c, so that the heat is dissipated over the entire device. Therefore, an increase in thermal impedance and power consumption can be prevented. Further, the device may not be damaged by heat, so that the reliability of the product becomes high.
Further, since the high-temperature dissipating resin is an insulating material, it is not necessary to consider the problem of short circuit in the device. In other words, the freedom of circuit design is not disturbed by the high temperature dissipating resin.
Fig. 3 is a cross-sectional view illustrating a multi-layered circuit board assembly 100 according to a second preferred embodiment of the present invention. In fig. 3, the same or corresponding elements as those of fig. 1 are denoted by the same reference numerals, and the same description will not be repeated. Multilayer circuit board device 100 includes electronic components (14 and 16) mounted on or within the device; a conductive layer (22) electrically connected to the electronic components (14 and 16); high-temperature dissipating resins (26a, 26b, and 26c) configured to dissipate heat generated in the apparatus 100; and a molding resin 30 surrounding the electronic components (14 and 16).
The multilayer circuit board device 100 further includes a copper frame 112; electrode 18: connection terminals 20 and vias 24 for electrical connection. The connection terminal 20 may be a solder ball.
The electronic components include a semiconductor chip 14 and a passive device 16. The molding resin 30 is an epoxy resin such as prepreg. High temperature dissipating resin 26b overlies the surfaces of intermediate conductive layers 22 formed within device 100. A high-temperature-dissipating resin 26c is filled in the through-hole for non-electrical connection.
The semiconductor chip 14 is mounted directly on the copper frame 112. The connection terminals of the semiconductor chip 14 are electrically connected to the conductive layer 22. Some passive devices 16 are directly mounted on the high-temperature dissipating resin 26 b.
The high-temperature-dissipating resins 26b and 26c are designed and configured to form a heat conducting path through which heat generated in the apparatus 100 can be well dissipated. The high temperature dissipating resins 26b and 26c may be made of a silicon-aluminum system material having an emissivity of about 0.92. The high temperature dissipating resin is an insulating material and is not electrically conductive. Generally, ceramics have a lower thermal conductivity than metals (e.g., copper); however, the emissivity of ceramic (0.92) is higher than that of copper (0.03). According to the present invention, a high temperature dissipating material conducts heat only without short-circuiting.
The multilayer circuit board assembly 100 is formed by a build-up process after the electronic components 14 and 16 are mounted.
The copper frame 112 has terminals that are used as leads for connection to a motherboard (not shown). According to a second preferred embodiment, a substrate voltage (potential) may be applied to the terminals of the copper frame 112.
Fig. 4A-4G are cross-sectional views depicting steps of fabricating the multilayer circuit board device 100 shown in fig. 3. First, as shown in fig. 4A, a copper (metal) frame 112 is provided. Next, as shown in fig. 4B, the bottom surface of the semiconductor chip 14 is directly mounted or bonded to both surfaces of the copper frame 112. Thereafter, as shown in fig. 4C, the semiconductor chip 14 is molded with an epoxy resin (e.g., prepreg) resin, and the resin is thermally hardened to form a molding resin 30. The molding resin layer 30 has a hole extending to the copper frame 112. The holes are filled with a high temperature dissipating resin and heated to harden. The high-temperature dissipating resin 26c in the hole functions as a thermal path to conduct heat generated in the device outward.
Next, a conductive pattern (conductive layer) 22 is formed in a sputtering process and an electroplating process, and then a high-temperature-dissipating resin is coated on the conductive layer 22. Thereafter, the resin is heated to be hardened to form the high temperature dissipation layer 26b, as shown in fig. 4D. The electrodes of the semiconductor chip 14 are electrically connected to the conductive layer 22.
Then, as shown in fig. 4E, the passive component 16 is mounted on the high temperature dissipation layer 26b and is resin-molded. The resin is thermally hardened (hardened by heating) to form a molding resin layer 30 having a hole (through hole) extending to the high-temperature dissipation layer 26 b. The holes are filled with a high temperature dissipating resin, and the resin is heated to harden. The high temperature dissipating resin 26c in the holes serves as a thermal path to conduct heat generated in the device, particularly at the electronic components 14 and 16, outward. In the molding resin 30, the through-holes 24 are formed for electrical connection.
Next, as shown in fig. 4F, a conductive layer 22 is formed on the uppermost surface of the device, and the electronic components (14 and 16) are mounted on the conductive layer 22. Thereafter, as shown in fig. 4G, an electrode 18 for external connection is formed on the bottom surface of the device, and a connection terminal 20, such as a solder ball, is provided on the electrode 18.
Thereafter, as shown in fig. 3, the terminal of the copper frame 112 extending outward is bent by a mold die or the like so that the bent terminal is used as a lead wire connected to a main board.
According to the second preferred embodiment described above, heat generated at the electronic components of the device is conducted and dissipated to the copper frame 112 and the connection terminals 20 through the high- temperature dissipation resins 26b and 26c, so that the heat is dissipated throughout the device. Therefore, an increase in thermal impedance and power consumption can be prevented. Further, the device may not be damaged by heat, so that the reliability of the product becomes high.
Further, since the high-temperature dissipating resin is an insulating material, it is not necessary to consider the problem of short circuit in the device. In other words, the freedom of circuit design is not disturbed by the high temperature dissipating resin.

Claims (16)

1. A circuit board arrangement comprising:
a central substrate formed in the device;
an electronic component mounted on said central substrate;
a conductive layer formed on a side of the electronic component opposite to the central substrate to be connected to the electronic component;
a high-temperature-dissipating resin which is an insulating material and is formed so as to cover a side of the conductive layer opposite to the above-mentioned electronic component formed on the center substrate via the high-temperature-dissipating resin, and is formed on the center substrate so as to dissipate heat generated in the device; and
a molding resin surrounding the electronic component,
wherein,
a first heat conduction path is formed in a form extending from the electronic component via the conductive layer and the high-temperature-dissipating resin,
a second heat conduction path is formed to extend from the electronic component through the high-temperature dissipating resin and the center substrate.
2. A circuit board arrangement according to claim 1, wherein
The high-temperature dissipating resin is formed in contact with the electronic component.
3. A circuit board assembly according to claim 1, further comprising:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
4. A circuit board arrangement according to claim 1, wherein
The high temperature dissipating resin covers the conductive layer and the electronic component.
5. A circuit board assembly according to claim 4, further comprising
A through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
6. A circuit board arrangement according to claim 5, wherein
The high-temperature dissipating resin is configured to form a heat conduction path through which heat generated in the device is well dissipated.
7. A circuit board arrangement according to claim 1, wherein
The high temperature dissipating resin is made of a silicon aluminum system material having an emissivity of about 0.92.
8. A circuit board arrangement according to claim 1, wherein
The high-temperature dissipating resin is coated on both surfaces of the center substrate.
9. A circuit board assembly according to claim 1, further comprising:
an electrically conductive frame formed in the device and extending out of the device for electrical connection to an external board.
10. A circuit board arrangement according to claim 9, wherein
The conductive frame is made of copper.
11. A circuit board arrangement according to claim 9, wherein
The high-temperature dissipating resin is configured to be in contact with the electronic component.
12. A circuit board assembly according to claim 9, further comprising:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
13. A circuit board arrangement according to claim 9, wherein
The high temperature dissipating resin covers the conductive layer and the electronic component.
14. A circuit board assembly according to claim 13, further comprising:
a through hole formed in the molding resin, wherein
The high-temperature dispersion resin is filled in the through hole.
15. A circuit board arrangement according to claim 14, wherein
The high-temperature dissipating resin is configured to form a heat conduction path through which heat generated in the device is well dissipated.
16. A circuit board arrangement according to claim 9, wherein
The high temperature dissipating resin is made of a silicon aluminum system material having an emissivity of about 0.92.
CN2004100558508A 2004-08-04 2004-08-04 multilayer circuit board device Expired - Fee Related CN1731915B (en)

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CN2004100558508A CN1731915B (en) 2004-08-04 2004-08-04 multilayer circuit board device
HK06108474.2A HK1088494A1 (en) 2004-08-04 2006-07-31 Multi-layered circuit board assembly

Applications Claiming Priority (1)

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CN2004100558508A CN1731915B (en) 2004-08-04 2004-08-04 multilayer circuit board device

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CN1731915B true CN1731915B (en) 2010-11-10

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Publication number Priority date Publication date Assignee Title
TWI355220B (en) 2008-07-14 2011-12-21 Unimicron Technology Corp Circuit board structure
CN101640972B (en) * 2008-07-28 2011-09-07 欣兴电子股份有限公司 Circuit board structure
JP5110049B2 (en) 2009-07-16 2012-12-26 株式会社デンソー Electronic control device
EP3022765A4 (en) 2014-09-26 2017-04-26 Intel Corporation Flexible packaging architecture
CN106163092B (en) * 2016-08-20 2020-01-14 惠州市纬德电路有限公司 Manufacturing method of circuit board structure with heat dissipation function
CN109413836B (en) * 2017-08-15 2021-04-20 鹏鼎控股(深圳)股份有限公司 Circuit board and preparation method thereof

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CN1289354A (en) * 1998-02-23 2001-03-28 旭化成工业株式会社 Thermosetting polyphenylene ether resin composition, cured resin composition obtained therefrom, and lamiated structure
US6353189B1 (en) * 1997-04-16 2002-03-05 Kabushiki Kaisha Toshiba Wiring board, wiring board fabrication method, and semiconductor package
US6538210B2 (en) * 1999-12-20 2003-03-25 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module, radio device having the same, and method for producing the same

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Publication number Priority date Publication date Assignee Title
US6353189B1 (en) * 1997-04-16 2002-03-05 Kabushiki Kaisha Toshiba Wiring board, wiring board fabrication method, and semiconductor package
CN1289354A (en) * 1998-02-23 2001-03-28 旭化成工业株式会社 Thermosetting polyphenylene ether resin composition, cured resin composition obtained therefrom, and lamiated structure
US6538210B2 (en) * 1999-12-20 2003-03-25 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module, radio device having the same, and method for producing the same

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CN1731915A (en) 2006-02-08

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