CN1499725A - Radio communicator - Google Patents
Radio communicator Download PDFInfo
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- CN1499725A CN1499725A CNA200310115656XA CN200310115656A CN1499725A CN 1499725 A CN1499725 A CN 1499725A CN A200310115656X A CNA200310115656X A CN A200310115656XA CN 200310115656 A CN200310115656 A CN 200310115656A CN 1499725 A CN1499725 A CN 1499725A
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Abstract
To prevent an oscillation frequency of a voltage controlled oscillation circuit from being varied even if it is switched from a blind time slot to a transmitting time slot.The device comprises a transmitting circuit 5 for transmitting at a predetermined transmitting slot, and a voltage controlled oscillation circuit 2 for conducting direct FM modulation for an oscillation signal with modulated data while its oscillation frequency is controlled by a PLL circuit 3. As for the transmitting circuit 5 during the transmitting slot, a power supply voltage is stopped it during a blind time slot period when the voltage controlled oscillation circuit 2 is locked by the PLL circuit 3, and the power supply voltage is supplied during a transmitting time slot period, following the blind time slot, when the voltage controlled oscillation circuit 2 is lock-released by the PLL circuit 3. In addition, a DC level of modulated data in the transmitting time slot period is set higher or lower than the one in the blind time slot.
Description
Technical field
The present invention relates to the radio communication devices such as portable phone of a kind of application time division multiple access (TDMA).
Background technology
As shown in Figure 5, in existing formation, the voltage-controlled oscillator 22 of modulation portion 21 is controlled frequency of oscillation by the control voltage of exporting from the PLL circuit that is made of phase-control circuit 23, low pass filter 24.From the modulation signal (digital signal) of derived digital signal 25 output, impose on the variable capacitance diode 22a of voltage-controlled oscillator 22 with control voltage by switch 26, bias voltage supply circuit 27.Therefore, the transmission signal after the voltage-controlled oscillator 22 output FSK modulation, and by power amplifier 28, send and receive commutation circuit 29 and export to antenna 30.
Send reception commutation circuit 29 and during the transmitting time section, antenna 30 is connected to power amplifier 28, during the time of reception section, be connected to receiving circuit (RX) 31.In addition, switch 26 disconnects during the blind time slot during the transmitting time section (blind time slot), with sending time slots that blind time slot links to each other during connect.In addition, phase-control circuit 23 becomes operating state during blind time slot, and voltage-controlled oscillator 22 is locked by PLL, becomes non operating state during sending time slots, and voltage-controlled oscillator 22 is unlocked, and carries out modulation work.Even voltage-controlled oscillator 22 is unlocked, added before this control voltage also is charged to low pass filter 24 etc., the frequency of oscillation when therefore roughly keeping release.Process in time and changing (for example with reference to patent documentation 1: Japanese kokai publication hei 11-225090 communique (with reference to Fig. 1)) a little just.
In the above-described configuration, 28 in common power amplifier is applied in supply voltage and becomes operating state during sending time slots, outside this during (time of reception section and blind time slot) stop the supply of supply voltage.Therefore reduced power loss.Therefore, moment of finishing during blind time slot of power amplifier 28 is applied in supply voltage.
Because power amplifier 28 upper reaches super-high-currents, therefore when applying supply voltage, change appears in supply voltage.This change makes by the frequency of oscillation of the voltage-controlled oscillator after the PLL release 22 and changes, therefore the problem that exists transmission frequency to change.The direction that frequency of oscillation changes exists with ... the circuit constant of voltage-controlled oscillator 22, is not certain therefore, changes to a high side sometimes, changes to a low side sometimes.
Summary of the invention
The objective of the invention is to, switch to sending time slots from blind time slot after, the frequency of oscillation of voltage control oscillating circuit does not change yet.
Radio communication device of the present invention, possesses the transtation mission circuit that sends in certain transmitting time section, and by PLL circuit control frequency of oscillation and by the voltage control oscillating circuit of modulating data to the direct FM modulation of oscillator signal, during the blind time slot that the above-mentioned voltage control oscillating circuit of above-mentioned transmitting time section is locked by the PLL circuit, stop to above-mentioned transtation mission circuit supply line voltage, what link to each other with above-mentioned blind time slot, above-mentioned voltage control oscillating circuit is not by during the sending time slots of above-mentioned PLL circuit locking, to above-mentioned transtation mission circuit supply line voltage, during above-mentioned sending time slots, make the DC level during the DC level of above-mentioned modulating data is higher or lower than above-mentioned blind time slot.
In addition, above-mentioned modulating data is input to above-mentioned voltage control oscillating circuit, makes, during the above-mentioned blind time slot and different during the above-mentioned sending time slots from the DC level of the transmission data of above-mentioned level shifting circuit output by level shifting circuit.
In addition, above-mentioned level shifting circuit possesses first and second resistance circuit, and three resistance circuit in parallel with any one party of stating first or second resistance circuit of series connection, insert first switch in above-mentioned the 3rd resistance circuit series connection, make the open and-shut mode of above-mentioned first switch different during above-mentioned blind time slot and above-mentioned sending time slots.
In addition, above-mentioned level shifting circuit possesses first and second resistance circuit of series connection, with above-mentioned first or any one party the 3rd resistance circuit in parallel of second resistance circuit, and four resistance circuit in parallel with above-mentioned the 3rd resistance circuit, make the resistance value of above-mentioned the 3rd resistance circuit different with the resistance value of above-mentioned the 4th resistance circuit, insert first switch in above-mentioned the 3rd resistance circuit series connection, and at above-mentioned the 4th resistance circuit series connection insertion second switch identical with above-mentioned first switch formation, during the above-mentioned blind time slot and during the above-mentioned sending time slots switching signal of mutually different level being input to any one switch, above-mentioned switching signal is input to another switch by reverser.
Description of drawings
Fig. 1 is the circuit diagram that expression radio communication device of the present invention constitutes.
Fig. 2 is illustrated in the circuit diagram that the level shifting circuit in the radio communication device of the present invention constitutes.
Fig. 3 is the sequential chart of explanation radio communication device work of the present invention.
Fig. 4 is the circuit diagram that is illustrated in other formation of level shifting circuit in the radio communication device of the present invention.
Fig. 5 is the circuit diagram that the existing radio communication device of expression constitutes.
Embodiment
The formation of radio communication device of the present invention is described by Fig. 1 and Fig. 2.At first, in Fig. 1, send data and be input to voltage control oscillating circuit 2 by level shifting circuit 1.Sending data is made of the binary plane that is superimposed upon on the direct voltage.
As shown in Figure 2, level shifting circuit 1 possess the first resistance circuit 1a, the second resistance circuit 1b that connects with it, with the 3rd resistance circuit 1c of the first resistance circuit 1a or the second resistance circuit 1b parallel connection and the switch 1d that connects and insert at the 3rd resistance circuit 1c.Transmission data after the level conversion are from the tie point output of the first resistance circuit 1a and the second resistance circuit 1b.The DC level of the transmission data of output is changed by the on off state of switch 1d, and imposes on the variable capacitance diode 2a of voltage control oscillating circuit 2.In addition, also can make the 3rd resistance circuit 1c in parallel with the first resistance circuit 1a.
Voltage control oscillating circuit 2 is by setting frequency of oscillation from the control voltage of PLL circuit 3 outputs.Control voltage imposes on variable capacitance diode 2a with the transmission data from level shifting circuit 1 output.Its result exports by the transmission signal after the FSK modulation from voltage control oscillating circuit 2.Therefore, voltage control oscillating circuit 2 constitutes direct FM modulation circuit.
Double by multiple circuit 4 from the transmission signal of voltage control oscillating circuit 2 outputs, and be input to transtation mission circuit 5.By mains switch 6 to transtation mission circuit 5 supply line voltages.Send signal and amplify, output to antenna 8 by antenna switching circuit 7 by power amplification circuit 5a.
The received signal that antenna 8 receives is input to receiving circuit 9 by antenna switching circuit 7.Receiving circuit 9 is provided with the frequency mixer 9a that frequency inverted is used, and the local oscillation signal of sending from multiple circuit 4 offers frequency mixer 9a.Therefore, from frequency mixer 9a output intermediate frequency signal.Intermediate frequency signal is converted to the reception data by the demodulator circuit (scheming not shown) in the receiving circuit 9.
Work to above formation describes below.In addition, in this embodiment, when supposing to be applied with supply voltage on the power amplification circuit 5a, the frequency of oscillation of voltage control oscillating circuit 2 changes to a high side, and describes with above-mentioned hypothesis prerequisite.The TDMA mode itself is well-known, therefore omit its detailed description, as shown in Figure 3A, in specific radio communication device, certain transmitting time section of being distributed and time of reception section are alternately switched, between transmitting time section and time of reception section, the transmitting time section of other radio communication device or time of reception section alternate allocation.Antenna switching circuit 7 is connected to transtation mission circuit 5 with antenna 8 during the transmitting time section, be connected to receiving circuit 9 during the time of reception section.
Shown in Fig. 3 B, the transmitting time section is made of blind time slot and the sending time slots that is attached thereto, and PLL circuit 3 is worked during blind time slot, so voltage control oscillating circuit 2 is by 3 lockings (Fig. 3 C) of PLL circuit, with certain hunting of frequency.In addition, mains switch 6 is disconnection (OFF) state (Fig. 3 D) during blind time slot, and stops transtation mission circuit 5 or power amplification circuit 5a supply line voltage.Have, the switch 1d of level shifting circuit 1 also becomes off-state again, sends data by the first resistance circuit 1a and the second resistance circuit 1b dividing potential drop.At this moment the transmission data as DC level E1 are added on the variable capacitance diode 2a.But,, therefore do not export the transmission signal from antenna 8 because power amplification circuit 5a quits work.
At sending time slots, for example stop such as PLL circuit 3 supply line voltages and release.Under released state, the control voltage that is so far applied is to 3 chargings of PLL circuit, and is roughly the same when therefore keeping frequency of oscillation and lock-out state.
After switching to sending time slots from blind time slot, mains switch 6 ground very close to each other closed (ON) provide supply voltage (Fig. 3 D) to power amplification circuit 5a.Because the power supply voltage variation of this moment, the frequency of oscillation of voltage control oscillating circuit 2 self is to high side variation.But, with begin to provide supply voltage to power amplification circuit 5a in, the switch 1d of level shifting circuit 1 is also closed.Like this, the DC level of transmission data drops to E2 (Fig. 3 E) by E1.These transmission data are added on the control voltage, and the control voltage ratio that imposes on variable capacitance diode 2a had reduced in the past.Therefore, frequency of oscillation changes to a low side, and turns back to original frequency of oscillation.
If, the frequency of oscillation of voltage control oscillating circuit 2 self because of the variation of supply voltage when a low side changes, switch 1d reverse operation, and when making mains switch 6 closed for disconnecting, mains switch 6 is that closure is also passable when disconnecting.
In addition, what Fig. 4 represented is other formation of level shifting circuit, the second resistance circuit 1b that connects with the first resistance circuit 1a is in parallel with the series circuit of the 3rd resistance circuit 1c and the first switch 1d, and is in parallel with the series circuit of the 4th resistance circuit 1e and second switch 1f with respect to this series circuit.The resistance value of the 3rd resistance circuit 1c is different with the resistance value of the 4th resistance circuit 1e.In addition, the first switch 1d is identical formation with second switch 1f.Therefore, inputing to the mutually different level switching signal of a switch (for example second switch 1f) during the blind time slot He during the sending time slots, input to another switch (for example first switch 1d) by reverser 1g.Therefore, the level of the switching signal of only overturning just can make modulating data to a high side or low side conversion.
The effect of invention
As described above, for transtation mission circuit, during the blind time slot of transmitting time section, stop electricity The supply of source voltage, and with sending time slots that blind time slot links to each other during supply line voltage, During sending time slots, increased or reduced modulating data with during blind time slot, comparing DC level, therefore these transmission data impose on the control voltage that is produced by the PLL circuit Voltage control oscillating circuit. Therefore, can make voltage control oscillating circuit with before oscillation frequency The rate vibration can make transmission frequency not change.
In addition, by level shifting circuit modulating data is inputed to direct FM modulation circuit, Because make DC level by the transmission data of level shifting circuit output during blind time slot and Different during the sending time slots, therefore only just can be simply by the control of level shifting circuit Change the DC level that sends data.
In addition, level shifting circuit possess first and second resistance circuit of series connection, with first Perhaps the 3rd resistance circuit of any one party parallel connection of second resistance circuit is at the 3rd resistance circuit First switch is inserted in series connection, and the open and-shut mode that makes first switch is during blind time slot and sending time slots During this time different, therefore can change the intrinsic standoff ratio of level shifting circuit by switch, replace Send the DC level of data.
In addition, possess the in parallel with above-mentioned first or any one party of second resistance circuit the 3rd Resistance circuit and four resistance circuit in parallel with the 3rd resistance circuit make the 3rd resistance electricity The resistance value on road is different from the resistance value of the 4th resistance circuit, inserts in the series connection of the 3rd resistance circuit First switch, and insert identical with above-mentioned first switch formation second at the 4th resistance circuit Switch during the blind time slot and during the sending time slots is imported mutually different level switching signal Arrive any one switch, and by reverser switching signal is input to the another one switch, because of This level by the upset switching signal just can make modulating data to a high side or low A side carry out level conversion.
Claims (4)
1. radio communication device, it is characterized in that: possess the transtation mission circuit that sends in certain transmitting time section, and by PLL circuit control frequency of oscillation and by the voltage control oscillating circuit of modulating data to the direct FM modulation of oscillator signal, during the blind time slot that the above-mentioned voltage control oscillating circuit of above-mentioned transmitting time section is locked by the PLL circuit, stop to above-mentioned transtation mission circuit supply line voltage, what link to each other with above-mentioned blind time slot, above-mentioned voltage control oscillating circuit is not by during the sending time slots of above-mentioned PLL circuit locking, to above-mentioned transtation mission circuit supply line voltage, during above-mentioned sending time slots, make the DC level of above-mentioned modulating data be higher or lower than the DC level of the above-mentioned modulating data during the above-mentioned blind time slot.
2. as the radio communication device of claim 1 record, it is characterized in that: above-mentioned modulating data is input to above-mentioned voltage control oscillating circuit by level shifting circuit, make from the DC level of the transmission data of above-mentioned level shifting circuit output, during the above-mentioned blind time slot and different during the above-mentioned sending time slots.
3. as the radio communication device of claim 2 record, it is characterized in that: above-mentioned level shifting circuit possesses first and second resistance circuit, and three resistance circuit in parallel with any one party of stating first or second resistance circuit of series connection, insert first switch in above-mentioned the 3rd resistance circuit series connection, make the open and-shut mode of above-mentioned first switch different during above-mentioned blind time slot and above-mentioned sending time slots.
4. as the radio communication device of claim 2 record, it is characterized in that: above-mentioned level shifting circuit possesses first and second resistance circuit of series connection, with above-mentioned first or any one party the 3rd resistance circuit in parallel of second resistance circuit, and four resistance circuit in parallel with above-mentioned the 3rd resistance circuit, make the resistance value of above-mentioned the 3rd resistance circuit different with the resistance value of above-mentioned the 4th resistance circuit, insert first switch in above-mentioned the 3rd resistance circuit series connection, and at above-mentioned the 4th resistance circuit series connection insertion second switch identical with above-mentioned first switch formation, during the above-mentioned blind time slot and during the above-mentioned sending time slots switching signal of mutually different level being input to any one switch, above-mentioned switching signal is input to another switch by reverser.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002324670A JP2004159207A (en) | 2002-11-08 | 2002-11-08 | Radio communication device |
| JP2002324670 | 2002-11-08 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1499725A true CN1499725A (en) | 2004-05-26 |
Family
ID=32804142
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA200310115656XA Pending CN1499725A (en) | 2002-11-08 | 2003-11-10 | Radio communicator |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2004159207A (en) |
| CN (1) | CN1499725A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7146092B2 (en) | 1992-03-26 | 2006-12-05 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7158577B1 (en) | 1992-03-26 | 2007-01-02 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7280806B2 (en) | 1992-03-26 | 2007-10-09 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39890E1 (en) | 1991-03-27 | 2007-10-23 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39902E1 (en) | 1991-03-27 | 2007-10-30 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39929E1 (en) | 1991-03-27 | 2007-11-27 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7352822B2 (en) | 1992-03-26 | 2008-04-01 | Matsushita Electric Industrial Co., Ltd. | Telephone for transmitting an uplink signal to a base station and for receiving first and second downlink signals from the base station, and a base station for receiving an uplink signal from a telephone and transmitting first and second downlink signals to the telephone |
| USRE41146E1 (en) | 1992-03-26 | 2010-02-23 | Panasonic Corporation | Communication system |
| US7894541B2 (en) | 1992-03-26 | 2011-02-22 | Panasonic Corporation | Communication system |
| USRE42643E1 (en) | 1991-03-27 | 2011-08-23 | Panasonic Corporation | Communication system |
| USRE43093E1 (en) | 1992-03-26 | 2012-01-10 | Panasonic Corporation | Communication system |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108811255B (en) * | 2018-07-24 | 2024-08-06 | 上海永亚智能科技有限公司 | Infrared induction night lamp and control mode |
-
2002
- 2002-11-08 JP JP2002324670A patent/JP2004159207A/en not_active Withdrawn
-
2003
- 2003-11-10 CN CNA200310115656XA patent/CN1499725A/en active Pending
Cited By (27)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| USRE39927E1 (en) | 1991-03-27 | 2007-11-27 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39902E1 (en) | 1991-03-27 | 2007-10-30 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40256E1 (en) | 1991-03-27 | 2008-04-22 | Matsushita Electrical Industrial Co., Ltd. | Communication system |
| USRE39890E1 (en) | 1991-03-27 | 2007-10-23 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39956E1 (en) | 1991-03-27 | 2007-12-25 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE39929E1 (en) | 1991-03-27 | 2007-11-27 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40779E1 (en) | 1991-03-27 | 2009-06-23 | Panasonic Corporation | Communication system |
| USRE40134E1 (en) | 1991-03-27 | 2008-03-04 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE41001E1 (en) | 1991-03-27 | 2009-11-24 | Panasonic Corporation | Communication system |
| USRE42643E1 (en) | 1991-03-27 | 2011-08-23 | Panasonic Corporation | Communication system |
| USRE39928E1 (en) | 1991-03-27 | 2007-11-27 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40174E1 (en) | 1991-03-27 | 2008-03-25 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40175E1 (en) | 1991-03-27 | 2008-03-25 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40206E1 (en) | 1991-03-27 | 2008-04-01 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40255E1 (en) | 1991-03-27 | 2008-04-22 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40241E1 (en) | 1991-03-27 | 2008-04-15 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE40242E1 (en) | 1991-03-27 | 2008-04-15 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7302007B1 (en) | 1992-03-26 | 2007-11-27 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7362813B2 (en) | 1992-03-26 | 2008-04-22 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7352822B2 (en) | 1992-03-26 | 2008-04-01 | Matsushita Electric Industrial Co., Ltd. | Telephone for transmitting an uplink signal to a base station and for receiving first and second downlink signals from the base station, and a base station for receiving an uplink signal from a telephone and transmitting first and second downlink signals to the telephone |
| US7146092B2 (en) | 1992-03-26 | 2006-12-05 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| US7280806B2 (en) | 1992-03-26 | 2007-10-09 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE41146E1 (en) | 1992-03-26 | 2010-02-23 | Panasonic Corporation | Communication system |
| US7894541B2 (en) | 1992-03-26 | 2011-02-22 | Panasonic Corporation | Communication system |
| US7158577B1 (en) | 1992-03-26 | 2007-01-02 | Matsushita Electric Industrial Co., Ltd. | Communication system |
| USRE43093E1 (en) | 1992-03-26 | 2012-01-10 | Panasonic Corporation | Communication system |
| US8160173B2 (en) | 1992-03-26 | 2012-04-17 | Panasonic Corporation | Communication system |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004159207A (en) | 2004-06-03 |
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| SE01 | Entry into force of request for substantive examination | ||
| C02 | Deemed withdrawal of patent application after publication (patent law 2001) | ||
| WD01 | Invention patent application deemed withdrawn after publication |