CN113740694A - Impact cycle test method and device for crimping type IGBT submodule - Google Patents
Impact cycle test method and device for crimping type IGBT submodule Download PDFInfo
- Publication number
- CN113740694A CN113740694A CN202111040364.9A CN202111040364A CN113740694A CN 113740694 A CN113740694 A CN 113740694A CN 202111040364 A CN202111040364 A CN 202111040364A CN 113740694 A CN113740694 A CN 113740694A
- Authority
- CN
- China
- Prior art keywords
- tested
- impact
- crimping type
- type igbt
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2608—Circuits therefor for testing bipolar transistors
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2608—Circuits therefor for testing bipolar transistors
- G01R31/2619—Circuits therefor for testing bipolar transistors for measuring thermal properties thereof
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
The application discloses a method and a device for impact cycle test of a crimping type IGBT submodule, which construct an experimental circuit comprising a transformer, a rectifier module and a tested power module, wherein the tested power module comprises a capacitor and two crimping type IGBT submodules connected in series; selecting one crimping type IGBT sub-module as a tested device, and short-circuiting the other crimping type IGBT sub-module by adopting a copper bar; the method comprises the steps of carrying out an impact cycle test on a device to be tested according to test voltage, impact current and duration time required when the device to be tested reaches a target chip temperature rise value, triggering the device to be tested to be conducted in the test process, enabling the device to be tested to have direct-connection short-circuit protection to form primary short-circuit impact, and improving the technical problem that the reliability problem possibly existing in the device can not be fully exposed because transient thermal impact damage influence on the device per se is neglected in the existing power cycle test method in the process of turning on and off a crimping type device.
Description
Technical Field
The application relates to the technical field of transistors, in particular to an impact cycle test method and device for a crimping type IGBT submodule.
Background
The sub-modules are standard basic components of a Modular Multilevel Converter (MMC), and are the smallest and inseparable power change units of the Modular Multilevel Converter. The submodules can be divided into welding type IGBT and crimping type IGBT submodules according to different types of Insulated Gate Bipolar Transistors (IGBT) adopted by the submodules. The crimping type IGBT submodule gradually becomes the first submodule type of the modular multilevel converter because the crimping type IGBT has the characteristics of better heat dissipation characteristic and device failure short circuit.
Compared with a welding type IGBT, the failure mechanism, the failure part and the failure process of the crimping type IGBT are not completely clear, the power cycle test working condition specified by the existing standard is different from the actual working condition of the device, and particularly the transient thermal shock damage influence on the crimping type device caused by the turn-on and turn-off processes of the crimping type device is ignored, so that the reliability problem possibly existing in the device can not be fully exposed.
Disclosure of Invention
The application provides an impact cycle test method and device for a crimping type IGBT submodule, which are used for improving the technical problem that the transient thermal impact damage influence on the crimping type IGBT submodule generated in the turn-on and turn-off processes of a crimping type device is neglected in the conventional power cycle test method, and the possible reliability problem of the device cannot be fully exposed.
In view of this, the first aspect of the present application provides a method for impact cycle testing of a crimping type IGBT sub-module, including:
constructing a test circuit, wherein the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel;
selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device, and adopting a copper bar to short-circuit the other crimping type IGBT sub-module;
and performing an impact cycle test on the device to be tested according to test voltage, impact current and duration time required by the device to be tested when the device to be tested reaches a target chip temperature rise value, wherein in the impact cycle test process, the device to be tested is triggered to be conducted, so that the device to be tested is subjected to direct short circuit protection to form primary short circuit impact.
Optionally, the calculation process of the test voltage, the impact current and the duration required by the device under test to reach the target chip temperature rise value is as follows:
obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual;
and calculating the test voltage, the impact current and the duration required when the device to be tested reaches the target chip temperature rise value according to the relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
Optionally, the relation is:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the chip specific heat capacity is C, the chip mass is m, the duration is T, the test voltage is U, and the impact current is I.
This application second aspect provides a crimping type IGBT submodule's impact cycle test device, includes:
the device comprises a construction unit and a test unit, wherein the construction unit is used for constructing a test circuit, the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel;
the selection unit is used for selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device and adopting a copper bar to short-circuit the other crimping type IGBT sub-module;
and the impact cycle test unit is used for performing impact cycle test on the tested device according to test voltage, impact current and duration time required by the tested device to reach a target chip temperature rise value, which are calculated according to a device manual, and in the impact cycle test process, the tested device is triggered to be conducted, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact.
Optionally, the calculation process of the test voltage, the impact current and the duration required by the device under test to reach the target chip temperature rise value is as follows:
obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual;
and calculating the test voltage, the impact current and the duration required when the device to be tested reaches the target chip temperature rise value according to the relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
Optionally, the relation is:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the chip specific heat capacity is C, the chip mass is m, the duration is T, the test voltage is U, and the impact current is I.
According to the technical scheme, the method has the following advantages:
the application provides an impact cycle test method of a crimping type IGBT submodule, which comprises the following steps: constructing a test circuit, wherein the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel; selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device, and short-circuiting the other crimping type IGBT sub-module by adopting a copper bar; and performing an impact cycle test on the device to be tested according to test voltage, impact current and duration time required by the device to be tested to reach a target chip temperature rise value, wherein the device to be tested is triggered to be conducted in the impact cycle test process, so that the device to be tested is subjected to direct short-circuit protection to form primary short-circuit impact.
In the application, a test circuit is firstly established, another IGBT submodule is in short circuit connection through a copper bar to apply short circuit impact load to the tested IGBT submodule in the test circuit, an impact cycle test is carried out on a tested device according to test voltage, impact current and duration time required by the calculated temperature rise value of a target chip, the tested device is triggered to be conducted in the impact cycle test process, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact, thermal impact stress and micro deformation generated on the device chip are examined to stimulate chip failure or gate pole spring pin fatigue thermal failure, transient thermal impact damage generated by device switching loss in actual working conditions is simulated, more accurate test results are obtained, and the influence of transient damage generated by the switching-on and switching-off processes of a crimping type device in the conventional power cycle test method is neglected, the reliability problem possibly existing in the device itself cannot be fully exposed.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic flow chart of an impact cycle test method of a crimping type IGBT sub-module according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of a test circuit according to an embodiment of the present disclosure;
FIG. 3 is a graph of exemplary current-voltage waveforms for a sub-module surge test provided by an embodiment of the present application;
FIG. 4 is a plot of junction temperature and case temperature waveforms for a single shock cycle test device as provided in an embodiment of the present application;
fig. 5 is a schematic structural diagram of an impact cycle test device of a crimping type IGBT sub-module according to an embodiment of the present application.
Detailed Description
The application provides an impact cycle test method and device of a crimping type IGBT submodule, which are used for improving the technical problem that the transient thermal impact damage influence on a crimping type device in the opening and closing processes of the crimping type IGBT submodule is neglected in the conventional crimping type IGBT power cycle test method, and the reliability problem possibly existing in the device can not be fully exposed.
In order to make the technical solutions of the present application better understood, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
For easy understanding, please refer to fig. 1, the present application provides an embodiment of a method for impact cycle testing of a crimping type IGBT sub-module, including:
Firstly, a test circuit is constructed according to an impact cycle test topological diagram shown in fig. 2, the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules T1 and T2 which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel.
102, selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device, and adopting a copper bar to short-circuit the other crimping type IGBT sub-module.
When the upper tube T1 is selected as a tested device, a copper bar is adopted to short the lower tube T2, and the T1 can be triggered to be conducted to enable the upper tube to generate direct short-circuit protection to form primary short-circuit impact. Similarly, when the lower tube T2 is selected as a device to be tested, the copper bar is adopted to short the upper tube T1, and the T2 is triggered to be conducted so that the direct short circuit protection can be carried out to form a short circuit impact.
And 103, performing an impact cycle test on the device to be tested according to test voltage, impact current and duration time required by the device to be tested to reach a target chip temperature rise value, which are calculated according to the device manual, and triggering the device to be tested to be conducted in the impact cycle test process so that the device to be tested generates a direct short circuit protection to form a short circuit impact.
Obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual; and calculating test voltage, impulse current and duration required by the tested device when the tested device reaches a target chip temperature rise value according to a relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
A typical current and voltage waveform of a sub-module impact test is shown in fig. 3, in the test, a loss E generated when an IGBT enters a protection-releasing state causes instantaneous increase of chip junction temperature in a joule heat mode in a short time, that is:
the above formula is changed to obtain the relation among voltage, current, time, chip specific heat capacity, chip quality and chip temperature rise, namely:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the specific heat capacity of the chip (aluminum-containing layer), m, T, U, and I, wherein M is the mass of the chip (aluminum-containing layer), T is the duration, and U is the test voltage and I is the impact current.
By inquiring a device manual, the specific heat capacity C and the mass m of the chip (including the aluminum layer) can be obtained, and the test voltage U, the impact current I and the duration T required under the temperature rise delta Tvj of the target chip can be set by the combination formula (2). And finally, setting the device driving configuration according to the test voltage U, the impact current I and the duration T which are obtained through calculation, and then carrying out the impact cycle test on the IGBT sub-module.
The embodiment of the application can apply the test load which is closer to the actual working condition to the crimping type IGBT, and the transient thermal shock damage influence of the turn-on and turn-off processes of the crimping type device on the crimping type device can be reproduced, so that the reliability problem possibly existing in the device can be fully exposed.
In the embodiment of the application, a certain 3kA/4.5kV crimping type IGBT is taken as an object, and the test parameters are set as shown in the following table:
TABLE 1 Experimental parameters
The submodule impact cycle test can be carried out by setting the device driving configuration according to the test voltage U, the impact current I and the duration time T which are obtained through calculation, and fig. 4 shows the device junction and shell temperature waveforms of the single impact cycle test.
In the embodiment of the application, a test circuit is firstly constructed, another IGBT submodule is in short circuit connection through a copper bar to apply short circuit impact load to the tested IGBT submodule in the test circuit, the tested device is subjected to impact cycle test according to test voltage, impact current and duration time required by the calculated temperature rise value of a target chip, the tested device is triggered to be conducted in the impact cycle test process, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact, thermal impact stress and micro deformation generated on the device chip are examined to stimulate chip failure or gate pole spring pin fatigue thermal failure, transient thermal impact damage generated by device switching loss in actual working conditions is simulated, more accurate test results are obtained, and the influence of transient damage generated by the switching-on and switching-off processes of a crimping type device in the conventional power cycle test method is neglected, the reliability problem possibly existing in the device itself cannot be fully exposed.
The above is an embodiment of an impact cycle test method of a crimping type IGBT sub-module provided by the present application, and the following is an embodiment of an impact cycle test apparatus of a crimping type IGBT sub-module provided by the present application.
Referring to fig. 5, an impact cycle testing apparatus for a crimping type IGBT sub-module according to an embodiment of the present application includes:
the device comprises a construction unit, a test circuit and a control unit, wherein the construction unit is used for constructing the test circuit, the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel;
the selection unit is used for selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device and adopting a copper bar to short-circuit the other crimping type IGBT sub-module;
and the impact cycle test unit is used for performing impact cycle test on the tested device according to test voltage, impact current and duration time required by the tested device to reach the target chip temperature rise value, which are calculated according to the device manual, and in the impact cycle test process, the tested device is triggered to be conducted, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact.
As a further improvement, the calculation process of the test voltage, the impact current and the duration time required by the tested device to reach the target chip temperature rise value is as follows:
obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual;
and calculating test voltage, impulse current and duration required by the tested device when the tested device reaches a target chip temperature rise value according to a relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
As a further improvement, the relation is:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the chip specific heat capacity is C, the chip mass is m, the duration is T, the test voltage is U, and the impact current is I.
In the embodiment of the application, a test circuit is firstly constructed, another IGBT submodule is in short circuit connection through a copper bar to apply short circuit impact load to the tested IGBT submodule in the test circuit, the tested device is subjected to impact cycle test according to test voltage, impact current and duration time required by the calculated temperature rise value of a target chip, the tested device is triggered to be conducted in the impact cycle test process, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact, thermal impact stress and micro deformation generated on the device chip are examined to stimulate chip failure or gate pole spring pin fatigue thermal failure, transient thermal impact damage generated by device switching loss in actual working conditions is simulated, more accurate test results are obtained, and the influence of transient damage generated by the switching-on and switching-off processes of a crimping type device in the conventional power cycle test method is neglected, the reliability problem possibly existing in the device itself cannot be fully exposed.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
The terms "first," "second," "third," "fourth," and the like in the description of the application and the above-described figures, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It should be understood that in the present application, "at least one" means one or more, "a plurality" means two or more. "and/or" for describing an association relationship of associated objects, indicating that there may be three relationships, e.g., "a and/or B" may indicate: only A, only B and both A and B are present, wherein A and B may be singular or plural. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one of the following" or similar expressions refer to any combination of these items, including any combination of single item(s) or plural items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (6)
1. The impact cycle test method of the crimping type IGBT submodule is characterized by comprising the following steps:
constructing a test circuit, wherein the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel;
selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device, and adopting a copper bar to short-circuit the other crimping type IGBT sub-module;
and performing an impact cycle test on the device to be tested according to test voltage, impact current and duration time required by the device to be tested when the device to be tested reaches a target chip temperature rise value, wherein in the impact cycle test process, the device to be tested is triggered to be conducted, so that the device to be tested is subjected to direct short circuit protection to form primary short circuit impact.
2. The impact cycle test method of the crimping type IGBT submodule according to claim 1, wherein the calculation process of the test voltage, the impact current and the duration time required by the tested device to reach the target chip temperature rise value is as follows:
obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual;
and calculating the test voltage, the impact current and the duration required when the device to be tested reaches the target chip temperature rise value according to the relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
3. The impact cycle test method of the crimped IGBT submodule according to claim 2, wherein the relation is as follows:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the chip specific heat capacity is C, the chip mass is m, the duration is T, the test voltage is U, and the impact current is I.
4. The utility model provides an impact cycle test device of crimping type IGBT submodule piece which characterized in that includes:
the device comprises a construction unit and a test unit, wherein the construction unit is used for constructing a test circuit, the test circuit comprises a transformer, a rectifier module and a tested power module which are sequentially connected, and the tested power module comprises two crimping type IGBT sub-modules which are connected in series and a capacitor which is connected with the two crimping type IGBT sub-modules in parallel;
the selection unit is used for selecting one crimping type IGBT sub-module from the two crimping type IGBT sub-modules as a tested device and adopting a copper bar to short-circuit the other crimping type IGBT sub-module;
and the impact cycle test unit is used for performing impact cycle test on the tested device according to test voltage, impact current and duration time required by the tested device to reach a target chip temperature rise value, which are calculated according to a device manual, and in the impact cycle test process, the tested device is triggered to be conducted, so that the tested device is subjected to direct short circuit protection to form primary short circuit impact.
5. The impact cycle test device of the crimping type IGBT submodule according to claim 4, wherein the calculation process of the test voltage, the impact current and the duration time required by the tested device to reach the target chip temperature rise value is as follows:
obtaining the chip specific heat capacity and the chip quality of the tested device by inquiring a device manual;
and calculating the test voltage, the impact current and the duration required when the device to be tested reaches the target chip temperature rise value according to the relational expression among the voltage, the current, the time, the chip specific heat capacity, the chip quality and the chip temperature rise.
6. The impact cycle test device of the crimping type IGBT submodule according to claim 5, wherein the relation is as follows:
in the formula,. DELTA.TvjThe target chip temperature rise value is C, the chip specific heat capacity is C, the chip mass is m, the duration is T, the test voltage is U, and the impact current is I.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111040364.9A CN113740694A (en) | 2021-09-06 | 2021-09-06 | Impact cycle test method and device for crimping type IGBT submodule |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111040364.9A CN113740694A (en) | 2021-09-06 | 2021-09-06 | Impact cycle test method and device for crimping type IGBT submodule |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113740694A true CN113740694A (en) | 2021-12-03 |
Family
ID=78736303
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111040364.9A Pending CN113740694A (en) | 2021-09-06 | 2021-09-06 | Impact cycle test method and device for crimping type IGBT submodule |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113740694A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116953464A (en) * | 2023-07-31 | 2023-10-27 | 荣信汇科电气股份有限公司 | All-condition short circuit test method and device for IGBT power module |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103063945A (en) * | 2012-12-11 | 2013-04-24 | 国网智能电网研究院 | Flexible direct current transmission sub-module test device and test method thereof |
| CN109521348A (en) * | 2018-11-12 | 2019-03-26 | 重庆大学 | A kind of reliability test of dc circuit breaker IGBT module and lifetime estimation method |
| WO2020087928A1 (en) * | 2018-10-28 | 2020-05-07 | 北京工业大学 | Power cycle experiment device for automotive-grade igbt multi-junction temperature difference control |
| CN113092897A (en) * | 2021-03-16 | 2021-07-09 | 荣信汇科电气股份有限公司 | Temperature fatigue aging comprehensive test device for MMC flexible direct converter valve power module |
-
2021
- 2021-09-06 CN CN202111040364.9A patent/CN113740694A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103063945A (en) * | 2012-12-11 | 2013-04-24 | 国网智能电网研究院 | Flexible direct current transmission sub-module test device and test method thereof |
| WO2020087928A1 (en) * | 2018-10-28 | 2020-05-07 | 北京工业大学 | Power cycle experiment device for automotive-grade igbt multi-junction temperature difference control |
| CN109521348A (en) * | 2018-11-12 | 2019-03-26 | 重庆大学 | A kind of reliability test of dc circuit breaker IGBT module and lifetime estimation method |
| CN113092897A (en) * | 2021-03-16 | 2021-07-09 | 荣信汇科电气股份有限公司 | Temperature fatigue aging comprehensive test device for MMC flexible direct converter valve power module |
Non-Patent Citations (1)
| Title |
|---|
| 姬煜轲 等: "一种柔直换流阀用压接型IGBT功率子模块加速老化试验方法", 《南方电网技术》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116953464A (en) * | 2023-07-31 | 2023-10-27 | 荣信汇科电气股份有限公司 | All-condition short circuit test method and device for IGBT power module |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN107807319B (en) | Insulated gate bipolar transistor IGBT test circuit and method | |
| CN111707919A (en) | IGBT device test circuit and test method | |
| Tong et al. | Output capacitance loss characterization of silicon carbide Schottky diodes | |
| CN104597370A (en) | State observer-based detection method of open-circuit fault of IGBT (insulated gate bipolar transistor) of MMC (modular multilevel converter) | |
| CN113740694A (en) | Impact cycle test method and device for crimping type IGBT submodule | |
| CN109473422B (en) | Packaging structure of crimping device and current testing method | |
| CN108387831B (en) | Power cycle test system of 3000A semiconductor device | |
| Lou et al. | Investigations on acceptable breakdown voltage variation of parallel-connected SiC MOSFETs applied to olid-state circuit breakers | |
| CN205910242U (en) | Take transformation ratio conversion current transformer's broad width measurement conversion terminal | |
| CN111025143A (en) | Bus conversion current switching test circuit device and parameter determination method thereof | |
| US9229048B2 (en) | Devices and methods for providing an impulse circuit | |
| Wang et al. | A 400V/300A ultra-fast intelligent DC solid state circuit breaker using parallel connected SiC JFETs | |
| Brubaker et al. | Integrated DC link capacitor/bus enables a 20% increase in inverter efficiency | |
| Malagon-Carvajal et al. | Analytical and experimental discussion of a circuit-based model for compact fluorescent lamps in a 60 Hz power grid | |
| US20150171770A1 (en) | Differential gate resistor design for switching modules in power converter | |
| CN112731093B (en) | High-power IGBT adaptation method | |
| CN205898868U (en) | Broad width measurement conversion terminal | |
| Cepek | Novel techniques and procedures for the assessment of fault current withstand capability of power thyristors | |
| CN106205988A (en) | Wide cut metering combination transformer | |
| Profumo et al. | Implementation and validation of a new thermal model for analysis, design, and characterization of multichip power electronics devices | |
| CN205863000U (en) | Unified no-load voltage ratio molded breadth width metering combination transformer | |
| CN111104741A (en) | Metal film capacitor electric-thermal coupling simulation method in MMC sub-module | |
| Pramudya et al. | Modelling of high voltage AC circuit breaker based on circuit breaker's technical data: Using Schwarz Black Box arc model | |
| CN205862995U (en) | Wide cut metering combination transformer | |
| Liu et al. | Location optimize of press-pack IGBT chip |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20211203 |
|
| RJ01 | Rejection of invention patent application after publication |