CN113365427B

CN113365427B - Method for manufacturing asymmetric plate

Info

Publication number: CN113365427B
Application number: CN202110584132.3A
Authority: CN
Inventors: 王俊; 陈晓青; 陈前
Original assignee: Shenzhen Kinwong Electronic Co Ltd
Current assignee: Shenzhen Kinwong Electronic Co Ltd
Priority date: 2021-05-27
Filing date: 2021-05-27
Publication date: 2022-11-15
Anticipated expiration: 2041-05-27
Also published as: CN113365427A

Abstract

The manufacturing method of the asymmetric board comprises the steps of manufacturing a first mother board, manufacturing a second mother board, carrying out hot pressing and routing on the first mother board and the second mother board to obtain a plurality of jointed boards, carrying out depth control routing on one side of the second mother board in a connecting position between units in each jointed board and obtaining a depth control groove, wherein the depth control groove can give up a space for expansion of the second mother board, reduce stress of the units and reduce warping of the second mother board; when the number of the depth control grooves in the first direction/the second direction of the jointed board is less than 3, the depth of the depth control grooves in each connecting position is equal; when the number of the depth control grooves in the first direction/the second direction of the jointed board is more than or equal to 3, the depth of the depth control grooves in each connecting position is sequentially increased from the center to the edge of the jointed board, and the depth of the depth control grooves in the edge of the jointed board is larger, so that the improvement effect on the warping is more obvious, and the warping of the edge of the jointed board can be obviously inhibited.

Description

Method for manufacturing asymmetric plate

Technical Field

The application relates to the technical field of circuit board manufacturing, in particular to a manufacturing method of an asymmetric board.

Background

With the development of PCB (Printed Circuit Board) technology, asymmetric boards formed by co-pressing and/or asymmetric lamination of different materials have appeared. For example, an asymmetric board formed by laminating a high-frequency core board and an FR4 core board is generally used in the design of a radar board, and the outer high-frequency core board can ensure high signal transmission efficiency and low loss.

The problem with this type of asymmetry is that the high frequency core plate typically comprises PTFE (polytetrafluoroethylene) material, which has a large coefficient of thermal expansion, and the product is delivered in panels with connection locations between units; the PCB needs to be welded in a reflow soldering mode during assembly, and the temperature can reach 260 ℃ in the welding process. In the mixed-compression asymmetric laminated structure, the high-frequency core board is easy to warp after being subjected to hot pressing, and further suffers from thermal stress during assembly, so that the warping is more serious. Finally, due to the warping of the whole asymmetric board, the phenomena of insufficient solder and desoldering appear after the PCB is assembled, especially, the units positioned at the edge seriously affect the product assembling effect and the product performance.

Disclosure of Invention

The embodiment of the application aims to provide a manufacturing method of an asymmetric plate, and aims to solve the technical problem that the edge of the existing asymmetric plate is seriously warped in the manufacturing process.

The embodiment of the application is realized in such a way that a manufacturing method of an asymmetric plate comprises the following steps:

manufacturing a first mother board: the first mother board comprises at least two first copper layers and a first insulating layer sandwiched between two adjacent first copper layers;

manufacturing a second mother board: the second mother board comprises at least two second copper layers and a second insulating layer clamped between two adjacent second copper layers;

wherein a coefficient of thermal expansion of a material of the second insulating layer is greater than a coefficient of thermal expansion of a material of the first insulating layer;

hot pressing: placing a prepreg between the first mother board and the second mother board and carrying out hot-pressing to obtain an asymmetric large board, wherein at least one jointed board is formed on the asymmetric large board, and each jointed board comprises a plurality of units; connecting areas are formed among the jointed boards, the units and the units, and among the units and the board edges of the large asymmetric boards; and

routing: routing the connection region between the jointed boards, the connection region between the jointed boards and the board edge, and the connection region between the units and the units to obtain one or more separated jointed boards, wherein the units in each jointed board are connected with each other through at least one connection position in the connection region; and

depth control gong: in each jointed board, carrying out depth control routing on the connection positions between the units from one side of the second mother board to obtain depth control grooves;

the units in each jigsaw are arranged in at least one row and at least one column according to a first direction and a second direction which are perpendicular to each other, the number of the depth control grooves in the connecting area in the same row is n, the number of the depth control grooves in the connecting area in the same column is m, and both n and m are integers which are larger than or equal to 0;

when n is less than 3, the depth of the depth control grooves is equal; when n is more than or equal to 3, the depth of the depth control groove is sequentially increased from the center to the edge of the jointed board; when m is less than 3, the depths of the depth control grooves are equal; when m is larger than or equal to 3, the depth of the depth control groove is increased from the center to the edge of the jointed board in sequence.

In one embodiment, the depth control groove is controlled to be routed through the second mother board without routing the first copper layer of the first mother board closest to the second mother board, and the depth control groove has a minimum depth Hmin and a maximum depth Hmax.

In one embodiment, the method for manufacturing the asymmetric plate further comprises the steps of manufacturing a solder mask layer;

the depth control gong adopts a mechanical depth control gong mode; the depth control gong step is implemented before the step of manufacturing the solder mask layer, hmin = H1-H4+ delta X, and Hmax = H1-H4+ H3-delta X; or, the depth control gong step is implemented after the step of manufacturing the solder mask layer, hmin = H1-H4+ L '+ Δ X, hmax = H1-H4+ H3+ L' - Δ X; wherein H1 is the thickness of the second mother board, H3 is the thickness of the prepreg, H4 is the thickness of the second copper layer, and Δ X is the precision tolerance of a depth control gong machine used in the mechanical depth control gong; and L' is the thickness of the solder mask layer on the surface of the second motherboard.

In one embodiment, a cutter of the depth control gong machine rotates around an axis perpendicular to the surface of the asymmetric large plate to partially mill off the unit-to-unit connection sites; or the cutter of the depth control gong machine is V-shaped and rotates around an axis parallel to the surface of the asymmetric large plate so as to partially cut the connecting position between the units.

the depth control gong adopts a laser depth control gong mode, and the second mother board is a double-layer board; the depth control gong is implemented before the step of manufacturing the solder mask layer, hmin = H1-H4+ delta X, and Hmax = H1-H4+ H3; or, hmin = H1-H4+ L '+ Δ X, hmax = H1-H4+ H3+ L', after the step of manufacturing the solder mask; wherein H1 is a thickness of the second mother board, H3 is a thickness of the prepreg, H4 is a thickness of the second copper layer, and Δ X is a precision tolerance of a depth control router used in the laser depth control router; and L' is the thickness of the solder mask layer on the surface of the second motherboard.

In one embodiment, when n is less than 3, the depth of the depth control groove is greater than or equal to Hmin and less than or equal to Hmax; and/or when m is less than 3, the depth of the depth control groove is greater than or equal to Hmin and less than or equal to Hmax.

In one embodiment, when n is larger than or equal to 3, the depth of the depth control groove positioned at the outermost edge is Hmax, and the depth of the depth control groove positioned at the center is Hmin; and/or when m is larger than or equal to 3, the depth of the depth control groove positioned at the outermost edge is Hmax, and the depth of the depth control groove positioned at the center is Hmin.

In one embodiment, when n is more than or equal to 3, the depth of the depth control groove is an arithmetic progression from the center of the jointed board to any one side edge; and/or when m is more than or equal to 3, the depth of the depth control groove is an arithmetic progression from the center of the jointed board to any one side edge.

In one embodiment, when n is larger than or equal to 3, the depth of the p-th depth control groove is equal to the depth of the n + 1-p-th depth control groove, wherein p is a positive integer smaller than or equal to n; and/or the depth of the qth depth control groove is equal to the depth of the (n + 1-q) th depth control groove, wherein q is a positive integer less than or equal to m.

In one embodiment, in the routing step, one or more connection positions are formed in the connection area between the units in the jointed boards; in the depth control gong step, one or more depth control grooves are formed in each connecting position.

The manufacturing method of the asymmetric plate provided by the embodiment of the application has the beneficial effects that:

the method for manufacturing the asymmetric plate comprises the steps of manufacturing a first mother plate, manufacturing a second mother plate, carrying out hot pressing and routing on the first mother plate and the second mother plate to obtain a plurality of jointed plates, carrying out depth control routing from one side of the second mother plate in a connecting position between units in each jointed plate to obtain a depth control groove, wherein the depth control groove can give up a space for expansion of the second mother plate, reduce stress of the units and reduce warping of the second mother plate, and when the number of depth control groove groups in a first direction/a second direction of the jointed plates is less than 3, the depth of the depth control grooves in each connecting position is equal; when the number of the depth control groove groups in the first direction/the second direction of the jointed board is more than or equal to 3, the depth of the depth control groove in each connecting position is sequentially increased from the center to the edge of the jointed board, and the depth of the depth control groove at the edge of the jointed board is larger, so that the improvement effect on the warping is more obvious, the warping at the edge of the jointed board can be obviously inhibited, and finally the flatness of the whole asymmetric board is in a qualified range.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.

FIG. 1 is a schematic illustration of a stack of asymmetric plates;

fig. 2 is a schematic plan view of a second mother board after copper is removed in the method for manufacturing an asymmetric board according to the embodiment of the present application;

FIG. 3 is a schematic plan view of a second mother board after copper stripping;

FIG. 4 is a schematic partial plan view of a second motherboard after a second thermocompression bonding and outer layer circuit fabrication;

FIG. 5 is a schematic partial plan view of the second mother board after routing;

fig. 6 is a schematic view of the second mother board before the second thermocompression bonding;

fig. 7 is a schematic plan view of a first mother board after copper plating in the method for manufacturing an asymmetric board according to the embodiment of the present application;

FIG. 8 is an enlarged view at T of FIG. 7;

FIG. 9 is a schematic illustration of a stack of asymmetric plates before a depth control groove;

FIGS. 10 to 12 are schematic views of three structures of depth control grooves, respectively;

FIG. 13 is a schematic illustration of the warpage of an asymmetric plate;

fig. 14 and 15 are schematic diagrams of two distributions of depth-controlling grooves, respectively.

The meaning of the labels in the figures is:

1-first mother board, 11-first copper layer, 111-connecting part, 112-copper edge, 12-first insulating layer, 13-first semi-cured sheet, 15-solder mask; 14-a second prepreg;

2-a second mother board, 21-a second copper layer, 22-a second insulating layer, 211-a copper laying area;

30-junction region, 31-junction site;

4-jointed board, 41-unit, 410-unit forming edge and 42-board edge;

50-depth control groove.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly or indirectly secured to the other element. When an element is referred to as being "connected to" another element, it can be directly or indirectly connected to the other element. The terms "upper", "lower", "left", "right", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are for convenience of description only, and do not indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and therefore, should not be construed as limiting the patent. The terms "first", "second" and "first" are used merely for descriptive purposes and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features. The meaning of "plurality" is two or more unless explicitly defined otherwise.

In order to explain the technical solutions of the present application, the following detailed descriptions are made with reference to specific drawings and examples.

The embodiment of the application firstly provides a manufacturing method of an asymmetric plate, which comprises the following steps:

manufacturing a first mother board 1: as shown in fig. 1, the first mother board 1 includes at least two first copper layers 11 and a first insulating layer 12 interposed between adjacent two first copper layers 11.

Manufacturing a second mother board 2: as shown in fig. 1, the second mother board 2 includes at least two second copper layers 21 and a second insulating layer 22 interposed between adjacent two second copper layers 21.

The first insulating layer 12 and the second insulating layer 22 are made of different materials, and thus have different thermal expansion coefficients. In the present embodiment, the thermal expansion coefficient of the material of the second insulating layer 22 is larger than that of the material of the first insulating layer 12.

Hot pressing: placing at least one prepreg between the first mother board 1 and the second mother board 2 and carrying out hot-pressing to obtain an asymmetric large board; at least one jointed board 4 is formed on the asymmetrical large board, and each jointed board 4 comprises a plurality of units 41 (PCS 1-PCS 4 form a jointed board 4 in the figure 2 and figure 7); connection regions 30 are formed between the

corresponding panels

4 and 4, between

units

41 and 41, and between panels 4 and the edges 42 of the asymmetrically large panel, as shown in fig. 2 and 7.

Routing: routing is carried out on a connecting area 30 between the jointed boards 4 and the jointed boards 4, a connecting area 30 between the jointed boards 4 and a board edge 42 of the asymmetric large board and a connecting area 30 between the unit 41 and the unit 41, removing the connecting area 30 between the jointed boards 4 and the connecting area 30 between the jointed boards 4 and the board edge 42 to obtain one or more separated jointed boards 4, and removing part of the connecting area 30 between the unit 41 and the unit 41 in the jointed boards 4 to obtain a plurality of units 41 which are connected with each other in each jointed board 4. At this time, the adjacent cells 41 are connected to each other by at least one connection site 31 located in the connection region 30 between the adjacent cells 41 and the cells 41.

Depth control gong: referring to fig. 9 to 12, in each panel 4, a depth control groove 50 is formed by routing a depth control from one side of the second mother board 2 to the connection position 31 between the unit 41 and the unit 41.

Referring to fig. 14 and 15, the units 41 in each panel 4 are arranged in at least one row and/or at least one column in the first direction (e.g., row direction) and the second direction (e.g., column direction) perpendicular to each other, and then the number of depth-controlling grooves 50 in the connecting region 30 in the same row is n, and the number of depth-controlling grooves 50 in the connecting region 30 in the same column is m; when n is less than 3, the depth of the depth control groove 50 is equal, and when n is more than or equal to 3, the depth of the depth control groove 50 is increased from the center to the edge of the jointed board 4; when m is less than 3, the depth of the depth control groove 50 is equal, and when m is more than or equal to 3, the depth of the depth control groove 50 is increased from the center to the edge of the jointed board 4.

Specifically, referring to fig. 1 and fig. 13 in combination, in the asymmetric board, on one hand, since the first insulating layer 12 in the first motherboard 1 and the second insulating layer 22 in the second motherboard 2 are made of different materials, and have different thermal expansion coefficients, the asymmetric board is easy to warp toward the side with the larger thermal expansion coefficient after being heated; on the other hand, the thickness of the first mother substrate 1 and the thickness of the second mother substrate 2 may be different depending on the number of layers (the number of copper layers) and the like, which may further aggravate the warpage.

Generally, the asymmetric plate 4 warps toward the second mother plate 2 side after the first mother plate 1 and the second mother plate 2 are thermocompressed, and the warping degree of the edge is larger than that of the center. Therefore, in the present application, the depth of the depth control groove 50 decreases from the edge to the center based on the degree of warpage, and the depth of the depth control groove 50 at a position where the warpage is large. It is understood that if the asymmetric plate 4 has edge warpage smaller than center warpage in a special case, the depth of the depth control groove 50 varies according to the warpage variation tendency.

The method for manufacturing the asymmetric plate comprises the steps of manufacturing a first mother plate 1, manufacturing a second mother plate 2, carrying out hot pressing and routing on the first mother plate 1 and the second mother plate 2 to obtain a plurality of jointed plates 4, carrying out depth control routing from one side of the second mother plate 2 in a connecting position 31 between a unit 41 and a unit 41 in each jointed plate 4 to obtain a depth control groove 50, wherein the depth control groove 50 can provide a space for expansion of the second mother plate 2, reduce stress of the unit 41 on one side of the second mother plate 2, reduce warping of the second mother plate 2, and when the number of the depth control grooves 50 in any row or any column of the jointed plates 4 is less than 3, the depth of the depth control grooves 50 in the row or the column of the connecting area 30 is equal; when the number of the depth control grooves 50 in any row or any column of the jointed board 4 is greater than or equal to 3, the depth of the depth control grooves 50 in the connection region 30 in the row or the column is sequentially increased from the center to the edge of the jointed board 4, and the depth of the depth control grooves 50 in the edge of the jointed board 4 is larger, so that the improvement effect on the warping is more obvious, the warping of the edge of the jointed board 4 can be obviously inhibited, the flatness of the jointed board 4 is in a qualified range, and the rigidity of the connection position 31 in the jointed board 4 can be ensured, so that each unit 41 is not easy to break before mounting.

A connection site 31 may be formed in each connection area 30 after routing. Of course, it is also possible to form a plurality of connection sites 31 in each connection area 30 according to specific requirements, such as the larger side length of the unit 41. One depth control groove 50 may be optionally provided in each connecting position 31, and similarly, a plurality of depth control grooves 50 may be provided in each connecting position 31. Referring to fig. 14 and 15, 3 depth control trenches 50 are formed in each connection region 30, wherein the 3 connection bits 31 in each connection region 30 are omitted from fig. 14 and 15 for clarity.

In one embodiment, the first mother substrate 1 may be a double-layer plate, a 4-layer plate, a 6-layer plate, or the like. The second mother substrate 2 may be a double-layer substrate, a 4-layer substrate, or the like. As shown in fig. 1, in the present embodiment, the second mother substrate 2 is a double-layer plate.

In an alternative embodiment, the second motherboard 2 is a high frequency core board, and the second insulating layer 22 is a PTFE material. The first motherboard 1 may be an FR4 core board, and the material of the first insulating layer 12 is epoxy resin. Of course, without limitation, the second motherboard 2 may be other types of boards and the second insulating layer 22 may be other materials, according to specific needs, which are merely examples.

Hereinafter, the second mother substrate 2 is described as a double-layer substrate, and the first mother substrate 1 is described as a 4-layer substrate, as shown in fig. 1. Then, each unit 41 manufactured by the method for manufacturing an asymmetric board is a 6-layer asymmetric circuit board.

As shown in fig. 1, the copper layers are marked L1 layer, L2 layer … … L6 layer from the second mother board 2 side. In this embodiment, the L1 layer is the second copper layer 21 of the second motherboard 2 on the side away from the first motherboard 1, the L2 layer is the second copper layer 21 of the second motherboard 2 close to the first motherboard 1, the L3 to L6 layers are the first copper layer 11 of the first motherboard 1, and the L6 layer is the outer first copper layer 11 of the first motherboard 1 on the side away from the second motherboard 2. The L1 layer and the L6 layer are respectively protective layers.

Firstly, the steps of manufacturing the first motherboard 1 are specifically:

cutting: cutting the whole large copper-clad plate into a required working plate according to design requirements, and passing the cut working plate through a tunnel furnace to reduce the plate internal stress; the working plate comprises an insulating layer and copper layers on two sides;

transferring the inner layer pattern of the working plate: coating a layer of photosensitive polymer on the copper layer on at least one side of the working plate, irradiating the copper layer by using an exposure machine (such as a 4CCD contraposition lens semi-automatically), and transferring the inner layer pattern required by the first mother plate 1 onto the photosensitive polymer;

and (3) developing: placing the working plate coated with the photosensitive polymer into a developing solution, developing the photosensitive polymer without polymerization reaction, and not developing the photosensitive polymer with polymerization reaction (taking negative photosensitive polymer as an example), wherein the copper material which does not need to be reserved on the copper layer of the working plate is exposed;

etching: etching the exposed copper material by using an etching solution, and reserving the copper material protected by the photosensitive polymer to obtain a required inner layer pattern;

removing the film: removing the photosensitive polymer on the copper layer through a film removing liquid to obtain a first sub-plate; copper layers on two sides of the first sub-board are respectively first copper layers 11, and a first insulating layer 12 is arranged between the first copper layers 11;

optical inspection: carrying out optical inspection on the prepared first sub-board to confirm the quality;

punching, namely punching a plurality of positioning holes (such as 8 positioning holes including 4 fusion positioning holes and 4 riveting and positioning holes) on the first sub-plate by using a punching machine;

browning: the first copper layers 11 on the two opposite sides of the first sub-plate are browned through a browning liquid so as to coarsen the surface of the copper conductor;

the first thermal compression (correspondingly, the aforementioned thermal compression between the first mother board 1 and the second mother board 2 is named as a second thermal compression on the basis of time sequence): and (3) overlapping prepregs (defined as first prepregs 13 in the present embodiment, as shown in fig. 1, 9 to 12) on two sides of the browned first daughter board according to the customer stacking requirement, placing a copper foil on each of the upper and lower sides of the first prepregs 13, and performing thermal compression bonding in a high-temperature environment. Optionally, the first mother board 1 may also be formed by directly stacking at least one first semi-cured 13 sheets by using a plurality of first sub-boards 11 and performing thermocompression bonding to form the first mother board 1 with a specified number of layers according to the customer stacking requirement.

A first thermal compression post-treatment process: the method comprises the steps of target hitting, edge milling, drilling, copper deposition, board electricity, circuit manufacturing, full-automatic optical inspection and the like.

In the step of fabricating the first mother board 1, copper is further laid on the connection region 30 of the inner copper layer (L3 layer to L5 layer) of the first mother board 1. That is, except for the first copper layer 11 (L6 layer) farthest from the second mother board 2, copper is partially remained in the connection region 30 on the other first copper layers 11 (L3 layer to L5 layer) to form a plurality of spaced copper-spreading regions 211, as shown in fig. 7.

Correspondingly, in the step of transferring the inner layer pattern of the working board, the inner layer pattern is obtained by forming a copper laying region 211 in the connecting region 30 between the corresponding unit 41 and the unit 41, and forming the copper laying region 211 in the connecting region 30 between the corresponding jointed boards 4 and the jointed boards 4 and in the connecting region 30 between the corresponding unit 41 and the board edge 42 on the first copper layer 11 of the first sub-board. In the above-described step of circuit fabrication, a copper-laid region 211 is formed in a region corresponding to the connection region 30 between the cell 41 and the cell 41 on one of the copper foils as an L3 layer, and a board edge pattern corresponding to a tool hole or the like is formed on the first copper layer 11 on the other outer layer as an L6 layer.

Alternatively, as shown in fig. 7 and 8, the copper spreading areas 211 between the corresponding units 41 and the units 41 are arranged at intervals, and the arrangement of the copper spreading areas 211 can improve the strength of the first mother board 1, thereby reducing the warpage of the first daughter board and the first mother board 1; while the copper-laid zones 211 between the corresponding tiles 4 and between the corresponding cells 41 and the board edges 42 may be continuous. This is because the copper-plated areas 211 need to be removed in the subsequent routing step, and therefore, the copper-plated areas 211 do not need to be arranged at intervals, which can reduce the complexity of manufacturing and the production cost.

Because alignment errors exist in the subsequent second hot pressing step and precision tolerance exists in the milling machine in the milling step, in order to avoid the phenomenon that the edge of the spliced board 4 exposes the copper of the inner layer after the board is milled due to the precision tolerance, as shown in fig. 7 and 8, in the connecting area 30 on the inner layer copper layer of the second mother board 2, the distance between the copper laying area 211 and the unit forming edge 410 is B, and the B is more than or equal to 0.2mm. In the routing step, the connection area 30 between the units 41 in the panels 4 is partially removed, the routing position may correspond to a part of the copper laying area 211, and the remaining part forms the connection position 31. Therefore, in order to avoid the exposure of the inner copper layer between the

units

41 and 41 in the jointed boards 4 after the boards are milled, the distance between two adjacent copper-laying areas 211 is C, and C is larger than or equal to 0.2mm.

Specifically, the step of manufacturing the second mother substrate 2 includes:

cutting: cutting the whole large copper-clad plate into a required working plate according to design requirements, and passing the cut working plate through a tunnel furnace to reduce the plate internal stress;

transferring the inner layer pattern of the working plate: coating a layer of photosensitive polymer on the copper layers on the two sides of the working plate respectively, irradiating the copper layers by using an exposure machine (such as a 4CCD contraposition lens semi-automatically), and transferring an inner layer graph required by the second mother plate 2 onto the photosensitive polymer;

and (3) developing: placing the working plate coated with the photosensitive polymer into a developing solution, developing the photosensitive polymer without polymerization reaction, and not developing the photosensitive polymer with polymerization reaction (taking negative photosensitive polymer as an example), wherein copper materials which are not required to be reserved on copper layers on two sides of the working plate are exposed;

etching: etching the exposed copper material by using an etching solution, and reserving the copper material protected by the photosensitive polymer to obtain a required pattern on at least one side of the copper layer;

removing the film: removing the photosensitive polymer on the copper layer through a film removing liquid to obtain a second sub-plate; the copper layers on the two sides of the second sub-board are second copper layers 21, and a second insulating layer 22 is arranged between the second copper layers 21;

in the step of forming the inner layer pattern, only the board edge pattern corresponding to the tool hole and the like required subsequently is formed on one of the second copper layers 21 (L1 layer), and the other second copper layer 21 (L2 layer) is used as the inner layer copper layer and the inner layer circuit pattern is formed normally according to the above steps. The inner layer wiring pattern thus obtained is a board edge pattern such as an inner layer wiring pattern of the cell 41 on the second copper layer 21 (L2 layer) as the inner layer copper layer and a tool hole on the second copper layer 21 (L1 layer) as the outer layer copper layer, as shown in fig. 6.

Optical inspection: carrying out optical inspection on the second sub-board to confirm the quality;

and punching, namely punching a plurality of positioning holes on the second sub-board by using a punching machine.

Browning: and the surface of the second sub-plate is browned by the brownification liquid so as to coarsen the surface of the copper conductor.

In one embodiment, the method for manufacturing an asymmetric plate further includes: copper is drawn on the connection area 30 of the protection layer (L1 layer) of the second motherboard 2, as shown in fig. 2 and 6. More specifically, copper is partially drawn in the connection region 30 on the second copper layer 21 (L1 layer) of the second daughter board on the side away from the first mother board 1, so as to form a plurality of spaced copper-drawing regions, and copper material is remained in the remaining portion of the connection region 30, so as to form the connection portion 111, as shown in fig. 2 and fig. 3. This is because the number of layers of the second motherboard 2 is small, the material PTFE of the second insulating layer 22 is soft, and the entire copper cut in the connection region 30 of the protective layer (L1 layer) may cause insufficient rigidity of the second motherboard 2 and damage, and therefore, the connection portion 111 can provide a certain rigidity to the second motherboard 2. Furthermore, by partially drawing copper in the connection region 30 of the protection layer (L1 layer) of the second motherboard 2, partial stress of the second insulation layer 22 of the second daughter board can be released, thereby reducing the warpage of the second motherboard 2 after being heated, and further reducing the warpage of the asymmetric circuit board finished product.

In step S3, the second thermocompression bonding specifically includes: at least one prepreg (herein defined as a second prepreg 14, see fig. 1, 9 to 12) is stacked between the first mother board 1 and the second mother board 2 obtained as described above according to the customer stacking requirement, and is positioned by the positioning holes, and is thermally pressed in a high temperature environment by using the full-view interlayer alignment ring of the inspection machine.

In an alternative embodiment, the cooling rate in the second thermal compression is 2 ℃/min to 3 ℃/min, for example, 2 ℃/min. Because the cooling rate is lower, the internal stress of the asymmetric plate can be further reduced, and the warping degree of the asymmetric plate after being heated is further reduced.

In one embodiment, the second thermal compression further comprises: the method comprises the steps of drilling, copper deposition, electric thickening of a plate, manufacturing of an outer layer circuit, full-automatic optical inspection and the like.

As shown in fig. 3 and 4, in the outer layer circuit manufacturing step, the connection portion 111 on the protective layer (L1 layer) of the second motherboard 2 is etched, and only the circuit pattern (diagonal-line filled portion in fig. 4) in the cell 41 on the protective layer remains. This is because, after the second thermocompression bonding, the first mother board 1 and the second mother board 2 are already integrated and have sufficient rigidity, and the unit 41 do not need to be connected by the connection portion 111, and partial stress of the second daughter board can be released by etching away the connection portion 111.

In the step of fabricating the outer layer circuit, as shown in fig. 3 and 4, since there is an alignment tolerance during exposure and the second daughter board may be misaligned, in order to ensure that the size of the copper sheet remained in the corresponding area of the unit 41 meets the requirement of fabricating the outer layer circuit, it is required to ensure that the copper drawing edge 112 is larger than the unit forming edge 410 by a certain distance, where the distance is a, and as shown in fig. 3 and 4, the range of a is 0.2mm to 0.3mm.

The unit forming edge 410 is located at the periphery of the edge of the circuit pattern of the unit 41, and in the subsequent routing step, the routing knife moves along the unit forming edge 410 to ensure that the circuit pattern in the unit 41 is not damaged, please refer to fig. 4 and 5; also, since the copper at the cell forming edge 410 has been etched, burrs are not generated when routing.

In one embodiment, the second thermal compression further comprises: and (3) solder mask manufacturing, namely printing solder mask layers 15 on two sides of the asymmetrical large board, performing solder mask windowing on positions needing to be welded with electronic components through solder mask exposure, and protecting other areas by using solder mask ink, as shown in figures 9 to 12.

The depth control gong can be implemented before the solder mask manufacturing step or after the solder mask manufacturing step.

In one embodiment, the depth-control routing step is controlled to route through the second mother board 2 without routing the copper layer (L3 layer) on the side of the first mother board 1 closest to the second mother board 2. That is, the depth control groove 50 is obtained by completely removing the second mother board 2 in thickness and completely retaining the first mother board 1, so that the warpage deformation of the second mother board 2 caused by thermal expansion can be improved to the maximum extent, and the warpage deformation of the first mother board 1 can be improved to the minimum extent (only by the depth control groove 50), and finally the warpage deformations of the two can be approximately close to each other, and the obtained asymmetric board is not obviously warped or even warped. Correspondingly, the depth of the depth control groove 50 has a maximum value Hmax, and a minimum value Hmin.

On the basis, the warping deformation of the second prepreg 14 between the first mother board 1 and the second mother board 2 when the depth-controlled groove 50 penetrates completely in the thickness direction is improved to the greatest extent, so that the unbalance causing the warping deformation between the second mother boards 2 of the first mother board 1 can be further avoided. Therefore, the greater the depth of the depth control groove 50, the greater the balancing effect on the buckling deformation between the first mother board 1 and the second mother board 2, and thus, the greater the depth of the depth control groove 50 located at the edge in the row direction and the column direction can significantly improve the problem of severe edge buckling of the jointed board 4.

According to different implementation modes of the depth control gong, hmax and Hmin are different.

In one embodiment, as shown in fig. 9 and 10, the depth control gong can be implemented by a mechanical depth control manner, specifically, a tool rotation milling manner, specifically, after a cylindrical multi-blade tool rotates at a high speed around a straight line perpendicular to the surface of the asymmetric large board, the tool travels along the depth direction of the depth control groove 50 to mill out the unnecessary material, and further travels along the surface of the asymmetric large board to obtain the required pattern of the depth control groove 50. The depth control groove 50 obtained in this way has a rectangular longitudinal section, and the inner side wall of the depth control groove 50 is perpendicular to the bottom wall.

In this embodiment, if the depth control groove is routed before the solder resist process, the thickness of the solder resist layer 15 does not need to be considered, and the minimum depth Hmin of the depth control groove 50 = H1-H4+ Δ X, and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3- Δ X; or after the solder mask process, the minimum depth Hmin of the depth control groove 50 = H1-H4+ L '+ delta X, and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3+ L' -delta X; wherein H1 is the thickness of the second mother board 2, and is understood to mean the sum of the thicknesses of the second copper layers 21 and the second insulating layer 22, H3 is the thickness of the second prepreg 14 (after the second thermal compression bonding), H4 is the thickness of the second copper layer 21 (L1 layer) on the outer layer of the second mother board 2, and Δ X is the precision tolerance of the milling depth control gong machine; l' is the thickness of the solder resist layer 15 on the surface of the second motherboard 2.

For the six-layer plate described above, H1 was 0.186mm, L1 had a thickness H4 of 0.018mm, L' was 0.03mm, H3 was 0.08mm, Δ X was 0.05mm, hmin was 0.223mm, and Hmax was 0.278mm.

In one embodiment, as shown in fig. 9 and 11, the depth-control gong can be implemented by another mechanical depth-control manner, namely, V-cut depth-control gong machine, which works in a V-shaped knife cutting manner, specifically, a plurality of V-shaped knives travel along the surface of the jigsaw 4 and cut off the unwanted materials. The V-shaped knife can move along a straight line parallel to the surface of the asymmetric big plate, and can also rotate around the straight line parallel to the surface of the asymmetric big plate and then slide across the surface of the asymmetric big plate. The depth control groove 50 obtained in this manner has an inverted cone (V-shaped) longitudinal section, and the bottom of the depth control groove 50 has a smaller size than the top.

In this mode, if the depth control groove 50 is routed before the solder resist process, the minimum depth Hmin of the depth control groove 50 = H1-H4+ Δ X ', and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3- Δ X'; or after the solder resist process, the minimum depth Hmin of the depth control groove 50 = H1-H4+ L '+ Δ X', and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3+ L '- Δ X'; wherein H1 is the thickness of the second mother board 2, H3 is the thickness of the second prepreg 14 (after the second thermocompression bonding), H4 is the thickness of the second copper layer 21 (L1 layer) on the outer layer of the second mother board 2, and Δ X' is the precision tolerance of the mechanical depth control gong machine; l' is the thickness of the solder resist layer 15 on the surface of the second motherboard 2.

For the six-layer plate described above, H1 was 0.186mm, L1 had a thickness H4 of 0.018mm, L 'was 0.03mm, H3 was 0.08mm, and Δ X' was 0.025mm, then Hmin was 0.223mm, and Hmax was 0.253mm.

In one embodiment, as shown in fig. 9 and 12, the depth control gong may be implemented by a laser method. The difference between the two mechanical depth control gong modes is that the laser machine can only remove the non-metal dielectric layer by ablation without damaging the copper layer under certain parameter conditions. Therefore Hmax does not need to take into account the precision tolerances of the laser machine and only when the second mother plate 2 is a double plate, the laser can be used to completely remove the portion of the second mother plate 2 in the connection sites 31, as shown in fig. 9, because there is no copper in the connection sites 31 on both the L1 layer and the L2 layer before depth control gong. The depth control groove 50 formed in this manner has a substantially inverted trapezoidal shape with its upper end dimension larger than its lower end dimension.

In this embodiment, if the depth control groove is routed before the solder resist process, the minimum depth Hmin of the depth control groove 50 = H1-H4+ Δ X ", and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3; or after the solder resist process, the minimum depth Hmin of the depth control groove 50 = H1-H4+ L '+ Δ X ", and the maximum depth Hmax of the depth control groove 50 = H1-H4+ H3+ L'; wherein, H1 is the thickness of the second mother board 2, H3 is the thickness of the second prepreg 14 (after lamination), H4 is the thickness of the second copper layer 21, and Δ X "is the precision tolerance of the laser machine; l' is the thickness of the solder resist layer 15 on the surface of the second daughter board.

Taking the six-layer plate as an example, H1 is 0.186mm, H4 is 0.018mm, L' is 0.03mm, H3 is 0.08mm, and Δ X "is 0.025mm, then Hmin is 0.223mm, and Hmax is 0.278mm.

In one embodiment, as shown in fig. 10 to 12, in order to avoid exposing the inner copper layer on the second mother board 2 when the plurality of units 41 on the jigsaw 4 are subsequently subjected to board dividing routing, the distance that the single edge of the groove edge of the depth control groove 50 exceeds the copper spreading region 211 in the connecting position 31 of the inner copper layer on the first mother board 1 is D, and 0.075mm is less than or equal to D.

In one embodiment, in order to avoid the influence of the inner wall of the depth control groove 50 on the unit 41, especially for the rectangular depth control groove 50, the distance between the edge of the depth control groove 50 and the unit forming edge 410 of the unit 41 is E, and 0.075mm is not more than E, considering the alignment deviation of the depth control machine and the jointed board 4 during depth control routing.

When n is less than 3 and m is less than 3, the depth of the depth control groove 50 may be selected to be any value of the closed interval between Hmin and Hmax in the row direction and/or the column direction, such as a maximum value, a minimum value, or other values. In order to secure the stress releasing effect of the depth control groove 50, the depth of the depth control groove 50 should be increased as much as possible. Therefore, although the number of the depth control grooves 50 in the row direction and/or the column direction is only 1 or 2, the maximum depth of the depth control grooves 50 may be set.

In one embodiment, when n is greater than or equal to 3, the depth difference between two adjacent depth control grooves 50 from the center of the panel 4 to any one side edge can be equal or unequal. When m is larger than or equal to 3, the difference between the depths of two adjacent depth control grooves 50 from the center of the jointed board 4 to any one side edge can be equal or unequal.

In one embodiment, when n ≧ 3 and n is an even number, the depths of the 1 st depth-control slot 50 through the n/2 nd depth-control slot 50 in each row are in a decreasing arithmetic progression; the depths of the nth/2+1 depth control groove 50 to the nth depth control groove 50 are in an increasing arithmetic progression. When m is more than or equal to 3 and is an even number, in each row, the depth of the 1 st depth control groove 50 to the m/2 th depth control groove 50 is in a descending arithmetic progression; the depths of the m/2+1 depth control grooves 50 to the m depth control groove 50 are in an increasing arithmetic progression.

In one embodiment, when n ≧ 3 and n is an odd number, the depths of the 1 st depth-controlling slot 50 through the (n + 1)/2 nd depth-controlling slot 50 in each row are in a decreasing arithmetic progression; the depths of the (n + 1)/2 th depth-control groove 50 to the nth depth-control groove 50 are in an increasing arithmetic progression. When m is more than or equal to 3 and m is an odd number, in each row, the depth of the 1 st depth control groove 50 to the (m + 1)/2 nd depth control groove 50 is in a decreasing arithmetic progression; the depths of the (m + 1)/2 th depth-control groove 50 to the m-th depth-control groove 50 are in an increasing arithmetic progression.

In one embodiment, the depth of the p-th depth-controlling groove 50 is equal to the depth of the n + 1-p-th depth-controlling groove 50, wherein p ≦ n. The depth of the qth depth control groove 50 is equal to the depth of the (n + 1) -q depth control grooves 50, wherein q is less than or equal to n. The purpose of this arrangement is to provide symmetrical depth control grooves 50 in both the row and column directions from the center of panel 4 to the opposite side edges, which is beneficial to ensure uniform warpage throughout panel 4 about the center symmetry.

In one embodiment of the application, there are 2 × 1 units 41 in the imposition 4, there are no connection areas 30 in the row direction, and the connection areas 30 are in one column. If there are 5 depth control grooves 50 in the row of connection regions 30, the depth of the (3 rd) depth control groove 50 located at the center is the smallest, which may be Hmin, and the depths of the (1 st and 5 th) depth control grooves 50 located at both side edges are the largest, which may be Hmax, and the depths of the 2 nd and 4 th depth control grooves 50 are between Hmin and Hmax.

In the following, it is exemplified that one connection bit 31 is disposed in each connection region 30, and one depth control slot 50 is disposed in each connection bit 31.

In one embodiment of the present application, 2 × 2 units 41 are provided in panel 4, connecting regions 30 are arranged in a row and a column, and the number of depth control slots 50 in the row of connecting regions 30 is 2 and the number of depth control slots 50 in the column of connecting regions 30 is 2. Then, in the row direction, the depths of the two depth control slots 50 are equal, and any value of the closed interval between Hmin and Hmax can be selected, such as a maximum value, a minimum value, or other values; in the column direction, the depths of the two depth control grooves 50 are equal, and any value of the closed interval between Hmin and Hmax can be selected, such as the maximum value, the minimum value, or other values.

In one embodiment of the present application, 3 × 3 units 41 are provided in panel 4, connecting regions 30 are arranged in two rows and two columns, and the number of depth control grooves 50 in each row of connecting regions 30 is 3, and the number of depth control grooves 50 in each column of connecting regions 30 is 3. Then, in any row, the depth of the middle depth control groove 50 is less than the depths of the two depth control grooves 50 on both sides, where the depth of the middle depth control groove 50 may be Hmin, and the depths of the two depth control grooves 50 on both sides may be Hmax. The same applies to any column.

In one embodiment of the present application, 6 × 2 units 41 are provided in panel 4, connecting regions 30 are arranged in one row and five columns, and the number of depth control grooves 50 in the connecting region 30 in the row is 6, and the number of depth control grooves 50 in each connecting region 30 in each column is 2.

Then, in the row direction, the depths of the two (3 rd and 4 th) depth-control grooves 50 located in the middle to the depth-control grooves 50 located at both sides sequentially increase, wherein the depth of the two (3 rd and 4 th) depth-control grooves 50 located in the middle is Hmin, the depth of the two (1 st and 6 th) depth-control grooves 50 located at the outermost sides may be Hmax, and the depths of the 2 nd and 5 th depth-control grooves 50 are between Hmin and Hmax.

The depth of the two depth control grooves 50 in each row is the same, and may be Hmin, hmax, or any value between Hmin and Hmax. Further, the depth of the depth control slots 50 in different columns may be the same or different, for example, the depth control slots 50 in different columns are also arranged in a manner of increasing from the center to the edge, the depth of two depth control slots 50 in the 3 rd column is the smallest and is Hmin, the depth of two depth control slots 50 in the 1 st and 5 th columns is the largest and is Hmax, and the depth of two depth control slots 50 in the 2 nd and 4 th columns is between Hmin and Hmax.

In one embodiment of the present application, 9 × 3 units 41 are provided in panel 4, connecting regions 30 are arranged in two rows and eight columns, and the number of depth control grooves 50 in each row of connecting regions 30 is 9, and the number of depth control grooves 50 in each column of connecting regions 30 is 3.

Then, in each row, the depths of the 1 st depth-controlling groove 50 to the 5 th depth-controlling groove 50 decrease in sequence, and the depths of the 5 th depth-controlling groove 50 to the 9 th depth-controlling groove 50 increase in sequence. The depth of the 5 th depth control groove 50 may be Hmin, the depths of the 1 st and 9 th depth control grooves 50 may be Hmax, and the depths of the other depth control grooves 50 are between Hmin and Hmax.

Further, the depth of two depth-controlling grooves 50 in the same column in different rows may be equal. For example, the depth of the 1 st depth-control trench 50 in each of the two rows may be equal, the depth of the 2 nd depth-control trench 50 in each of the two rows may be equal, and the depths of the … … and the 9 th depth-control trench 50 may be equal.

Within each column, the depth of the central (2 nd) depth control groove 50 is the smallest, such as Hmin, and the depth of the two (1 st and 3 rd) depth control grooves 50 on both sides is the largest, such as Hmax.

In the following, an example is given in which 3 connecting bits 31 are provided in each connecting region 30, and one depth control groove 50 is provided in each connecting bit 31.

As shown in FIG. 14, in one embodiment of the present application, panel 4 has 6 × 2 units 41 therein, connecting regions 30 are arranged in one row and five columns, and the number of depth control grooves 50 in the connecting region 30 in the row is 18, and the number of depth control grooves 50 in each connecting region 30 in the column is 6.

Then, in the row direction, the depths of the two (9 th and 10 th) depth-control grooves 50 located in the middle to the depth-control grooves 50 on both sides sequentially increase, wherein the depth of the two (9 th and 10 th) depth-control grooves 50 located in the middle is Hmin, the depth of the two (1 st and 18 th) depth-control grooves 50 located at the outermost sides may be Hmax, and the depths of the other depth-control grooves 50 are between Hmin and Hmax.

Within each column, the depth of the two (3 rd and 4 th) depth control slots 50 located in the middle to the depth control slots 50 on both sides increases in sequence, wherein the depth of the two (3 rd and 4 th) depth control slots 50 located in the middle is Hmin, the depth of the two (1 st and 6 th) depth control slots 50 located at the outermost side may be Hmax, and the depth of the other depth control slots 50 is between Hmin and Hmax.

As shown in FIG. 14, in one embodiment of the present application, 9 × 3 units 41 are provided in panel 4, connecting regions 30 are arranged in two rows and eight columns, and the number of depth-controlling grooves 50 in each row of connecting regions 30 is 27, and the number of depth-controlling grooves 50 in each column of connecting regions 30 is 9.

Then, in each row, the depth of the 1 st depth control groove 50 to the 14 th depth control groove 50 decreases, and the depth of the 14 th depth control groove 50 to the depth of the 27 th depth control groove 50 increases. The depth of the 14 th depth control groove 50 may be Hmin, the depths of the 1 st and 27 th depth control grooves 50 may be Hmax, and the depths of the other depth control grooves 50 are between Hmin and Hmax.

Further, the depth of two depth control slots 50 in the same column in different rows may be equal. For example, the depth of the 1 st depth-control trench 50 in each of the two rows may be equal, the depth of the 2 nd depth-control trench 50 in each of the two rows may be equal, and the depths of the … … and the 27 th depth-control trench 50 may be equal.

In each row, the depths of the 1 st depth control groove 50 to the 5 th depth control groove 50 are sequentially reduced, and the depths of the 5 th depth control groove 50 to the 9 th depth control groove 50 are sequentially increased. The depth of the 5 th depth control groove 50 may be Hmin, the depths of the 1 st and 9 th depth control grooves 50 may be Hmax, and the depths of the other depth control grooves 50 are between Hmin and Hmax.

The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. The manufacturing method of the asymmetric plate is characterized by comprising the following steps:

hot pressing: placing a prepreg between the first mother board and the second mother board and performing hot-pressing to obtain an asymmetric large board, wherein at least one jointed board is formed on the asymmetric large board, and each jointed board comprises a plurality of units; connecting areas are arranged between the jointed boards, between the units and the jointed boards and between the units and the board edges of the asymmetric large boards; and

routing: routing the connection region between the jointed boards, the connection region between the unit and the board edge, and the connection region between the unit and the unit to obtain one or more separated jointed boards, wherein the units in each jointed board are connected with each other through a connection part; and

when n is less than 3, the depth of the depth control grooves is equal; when n is more than or equal to 3, the depth of the depth control groove is sequentially increased from the center to the edge of the jointed board; when m is less than 3, the depth of the depth control grooves is equal; and when m is more than or equal to 3, the depth of the depth control groove is increased from the center to the edge of the jointed board in sequence.

2. The method of claim 1, wherein the step of controlling the depth control groove is controlled to gong through the second motherboard without gong damaging the first copper layer of the first motherboard that is closest to the second motherboard, the depth control groove having a minimum depth Hmin and a maximum depth Hmax.

3. The method of manufacturing an asymmetric plate as claimed in claim 2, further comprising a step of manufacturing a solder resist layer;

the depth control gong adopts a mechanical depth control gong mode; the depth control gong step is implemented before the solder mask manufacturing step, hmin = H1-H4+ delta X, and Hmax = H1-H4+ H3-delta X; or, the depth control gong step is implemented after the step of manufacturing the solder mask layer, hmin = H1-H4+ L '+ Δ X, hmax = H1-H4+ H3+ L' - Δ X; wherein, the H1 is a thickness of the second mother board, the H3 is a thickness of the prepreg, the H4 is a thickness of the second copper layer, and the Δ X is a precision tolerance of a depth control gong machine used in the mechanical depth control gong; and L' is the thickness of the solder mask layer on the surface of the second motherboard.

4. The method of claim 3, wherein a tool of the depth control router is rotated about an axis perpendicular to the surface of the asymmetric panel to partially mill the connections between the units; or the cutter of the depth control gong machine rotates around an axis parallel to the surface of the asymmetric large plate to partially cut the connection position between the units.

5. The method of manufacturing an asymmetric plate as claimed in claim 2, further comprising a step of manufacturing a solder resist layer;

6. The method for manufacturing an asymmetric plate as claimed in any one of claims 2 to 5, wherein when n < 3, the depth of the depth control groove is greater than or equal to Hmin and less than or equal to Hmax; and/or when m is less than 3, the depth of the depth control groove is greater than or equal to Hmin and less than or equal to Hmax.

7. The method for manufacturing an asymmetric plate as claimed in any one of claims 2 to 5, wherein when n ≧ 3, the depth of the depth-controlling groove located at the outermost edge is Hmax, and the depth of the depth-controlling groove located at the center is Hmin; and/or when m is larger than or equal to 3, the depth of the depth control groove positioned at the outermost edge is Hmax, and the depth of the depth control groove positioned at the center is Hmin.

8. The method for manufacturing the asymmetric plate as in any one of claims 1 to 5, wherein when n is larger than or equal to 3, the depth of the depth control groove is in an arithmetic progression from the center of the jointed plate to any one side edge; and/or when m is more than or equal to 3, the depth of the depth control groove is an arithmetic progression from the center of the jointed board to any one side edge.

9. The method for manufacturing an asymmetric plate according to any one of claims 1 to 5, wherein when n is greater than or equal to 3, the depth of the p-th depth control groove is equal to the depth of the n + 1-p-th depth control groove, wherein p is a positive integer less than or equal to n; and/or the depth of the qth depth control groove is equal to the depth of the (n + 1) -q depth control grooves, wherein q is a positive integer less than or equal to m.

10. A method for manufacturing an asymmetric plate as claimed in any one of claims 1 to 5, wherein in the routing step, one or more connection sites are formed in the connection areas between the units in the panel; in the depth control gong step, one or more depth control grooves are formed in each connecting position.