CN113178170A

CN113178170A - Pixel driving circuit, method and device and display panel

Info

Publication number: CN113178170A
Application number: CN202110727287.8A
Authority: CN
Inventors: 暴营
Original assignee: Shenzhen Xiaomi Communication Technology Co ltd; Beijing Xiaomi Mobile Software Co Ltd
Current assignee: Shenzhen Xiaomi Communication Technology Co ltd; Beijing Xiaomi Mobile Software Co Ltd
Priority date: 2021-06-29
Filing date: 2021-06-29
Publication date: 2021-07-27

Abstract

The disclosure discloses a pixel driving circuit, a pixel driving method, a pixel driving device and a display panel, and relates to the technical field of display. The driving module is reset by the reset module under the control of the first scanning signal line, the data signal voltage is written into the driving module by the data writing module, and the light-emitting element is driven to emit light by the driving module. In the driving process, the storage capacitor module is used for adjusting the output capacitance value to stabilize the potential of the control end of the driving module, and a first capacitance value with a smaller capacitance value is output when the pixel driving circuit is in a high refresh rate working state; and when the pixel driving circuit is in a low refresh rate working state, the second capacitance value with larger output capacitance value is output. The pixel driving circuit can make the pixel brightness uniform under the working state with higher refresh rate. Thereby enabling the pixel driving circuit to be simultaneously suitable for the requirements of different refresh rate displays.

Description

Pixel driving circuit, method and device and display panel

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to a pixel driving circuit, a method, an apparatus, and a display panel.

Background

An Organic Light Emitting Diode (OLED) Display panel has the advantages of self-luminescence, low driving voltage, high luminous efficiency, bright color, high contrast, wide viewing angle, fast response speed, low power consumption, and the like, and has been developed as a Display panel with the greatest development potential. Low Temperature Poly-Silicon (LTPS) is currently used as a driving transistor of a pixel driving circuit in the OLED.

The pixel driving circuit has the problem of uneven pixel brightness in the working state with higher refresh rate, and the pixel driving circuit for solving the problem is not available at present.

Disclosure of Invention

The disclosure provides a pixel driving circuit, a method and a device and a display panel. The technical scheme of the disclosure is as follows:

according to a first aspect of the embodiments of the present disclosure, a pixel driving circuit is provided, which includes a driving module, a reset module, a data writing module, a first light emitting control module, a second light emitting control module, a storage capacitor module, and a light emitting element;

the control end of the driving module is connected with a first node, the input end of the driving module is connected with a constant-voltage high potential through a second node, and the output end of the driving module is connected with a third node;

the control end of the reset module is connected with a first scanning signal line, the input end of the reset module is connected with a reset signal line, and the output end of the reset module is connected with the first node and the fourth node;

the control end of the data writing module is connected with a second scanning signal line, the input end of the data writing module is connected with a data signal line, and the output end of the data writing module is connected with the second node;

the control end of the first light-emitting control module is connected with a light-emitting control signal line, the input end of the first light-emitting control module is connected with the constant-voltage high potential, and the output end of the first light-emitting control module is connected with the second node;

the control end of the second light-emitting control module is connected with the light-emitting control signal line, the input end of the second light-emitting control module is connected to the third node, and the output end of the first light-emitting control module is connected to the fourth node;

the control end of the storage capacitor module is connected with a refresh rate control signal line, the input end of the storage capacitor module is connected with the constant-voltage high potential, and the output end of the storage capacitor module is connected with the first node;

the positive electrode of the light-emitting element is connected with the fourth node, and the negative electrode of the light-emitting element is connected with a constant voltage and a low potential;

the storage capacitor module is used for outputting a first capacitance value when the pixel driving circuit is in a first refresh rate working state and outputting a second capacitance value when the pixel driving circuit is in a second refresh rate working state under the control of the refresh rate control signal line, wherein the second capacitance value is larger than the first capacitance value, and the refresh rate of the first refresh rate working state is smaller than that of the second refresh rate working state.

Optionally, the storage capacitor module includes a first storage capacitor, a second storage capacitor, and a refresh rate switching submodule;

the first end of the first storage capacitor is connected to the constant-voltage high potential, and the second end of the first storage capacitor is connected to a fifth node;

a first end of the second storage capacitor is connected with the fifth node, and a second end of the second storage capacitor is connected with the first node;

the control end of the refresh rate switching submodule is connected with the refresh rate control signal line, the input end of the refresh rate switching submodule is connected with the fifth node, and the output end of the refresh rate switching submodule is connected with the constant-voltage high potential;

when the pixel driving circuit is in the first refresh rate working state, the refresh rate switching submodule is closed, so that the storage capacitor module outputs the second capacitance value through the second storage capacitor; when the pixel driving circuit is in the second refresh rate working state, the refresh rate switching sub-module is turned off, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series.

Optionally, the pixel driving circuit further includes a threshold compensation module, a control end of the threshold compensation module is connected to the second scanning signal line, an input end of the threshold compensation module is connected to the third node, and an output end of the threshold compensation module is connected to the first node.

Optionally, the driving module includes a third transistor, a gate of the third transistor is connected to the first node, a source of the third transistor is connected to the second node, and a drain of the third transistor passes through the third node.

Optionally, the data writing module includes a second transistor, a gate of the second transistor is connected to the second scan signal line, a source of the second transistor is connected to the data signal line, and a drain of the second transistor is connected to the second node.

Optionally, the reset module comprises a fifth transistor and a seventh transistor;

a gate of the fifth transistor is connected to the first scanning signal line, a source of the fifth transistor is connected to the reset signal line, and a drain of the fifth transistor is connected to the first node;

a gate of the seventh transistor is connected to the first scanning signal line, a source of the seventh transistor is connected to the reset signal line, and a drain of the seventh transistor is connected to a positive electrode of the light-emitting element through the fourth node.

Optionally, the storage capacitor module includes an eighth transistor, the first storage capacitor and the second storage capacitor, a gate of the eighth transistor is connected to the refresh rate control signal line, a source of the eighth transistor is connected to the constant voltage high potential, a drain of the eighth transistor is connected to the first end of the second storage capacitor through the fifth node, the first end of the second storage capacitor is connected to the fifth node, the second end of the second storage capacitor is connected to the first node, the first end of the first storage capacitor is connected to the constant voltage high potential, and the second end of the second storage capacitor is connected to the fifth node.

Optionally, the threshold compensation module includes a fourth transistor, a gate of the fourth transistor is connected to the second scan signal line, a source of the fourth transistor is connected to the third node, and a drain of the fourth transistor is connected to the first node.

Optionally, the first light emission control module includes a first transistor, a gate of the first transistor is connected to the light emission control signal line, a source of the first transistor is connected to the constant voltage high potential, and a drain of the first transistor is connected to the second node.

Optionally, the second light-emitting control module includes a sixth transistor, a gate of the sixth transistor is connected to the light-emitting control signal line, a source of the sixth transistor is connected to the third node, and a drain of the sixth transistor is connected to the positive electrode of the light-emitting element through the fourth node.

According to a second aspect of the embodiments of the present disclosure, there is provided a pixel driving method for driving the pixel driving circuit as in the first aspect, the method comprising:

controlling the output capacitance of the storage capacitance module according to the refresh rate control signal;

controlling the pixel driving circuit to be in a reset phase, wherein the first light emitting control module, the data writing module, the driving module, the threshold compensation module and the second light emitting control module are temporarily stopped to operate, and the reset module operates to reset the potentials of the first node and the fourth node to an initialization voltage under the control of the reset module, and the initialization voltage is input to the reset module through the reset signal line;

controlling the pixel driving circuit to be in a threshold voltage compensation stage, wherein the first light emitting control module, the second light emitting control module and the reset module are suspended from operating, the data writing module, the driving module and the threshold compensation module operate to enable the potential of the first node to reach a compensation voltage, and the data voltage is input into the data writing module through the data signal line;

the pixel driving circuit is controlled to be in a light-emitting stage, the data writing module, the threshold compensation module and the reset module are suspended to operate, the first light-emitting control module, the driving module and the second light-emitting control module operate to enable driving current to drive the light-emitting element to emit light, the driving current is input into the first light-emitting control module and the second light-emitting control module through the light-emitting control signal line, and the driving current is generated by the storage capacitor module.

Optionally, the controlling the output capacitance of the storage capacitance module according to the refresh rate control signal includes:

if the refresh rate control signal is a first refresh rate control signal, the eighth transistor is turned on, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series;

and if the refresh rate control signal is a second refresh rate control signal, the eighth transistor is turned off to enable the storage capacitor module to output the second capacitance value through the second storage capacitor, wherein the refresh rate of the first refresh rate control signal is greater than the refresh rate of the second refresh rate control signal.

Optionally, the controlling the pixel driving circuit in a reset phase includes:

inputting a reset signal through the first scanning signal line;

inputting a compensation inhibiting signal through the second scanning signal line;

a light emission prohibition signal is input through the light emission control signal line.

Optionally, the controlling the pixel driving circuit to be in the threshold voltage compensation phase includes:

inputting a reset prohibition signal through the first scanning signal line;

inputting a compensation signal through the second scanning signal line;

Optionally, the controlling the pixel driving circuit to be in a light emitting phase includes:

inputting a reset prohibition signal through the first scanning signal line;

and inputting a light emitting signal through the light emitting control signal line.

Optionally, the reset prohibition signal has a higher potential than the reset signal, the compensation prohibition signal has a higher potential than the compensation signal, and the emission prohibition signal has a higher potential than the emission signal.

According to a third aspect of the embodiments of the present disclosure, there is provided a display panel including the pixel driving circuit as described in the first aspect.

According to a fourth aspect of the embodiments of the present disclosure, there is provided a pixel driving device including:

the refresh rate control module is used for controlling the output capacitance of the storage capacitance module according to the refresh rate control signal;

the reset control module is used for controlling the pixel driving circuit to be in a reset stage, wherein the first light-emitting control module, the data writing module, the driving module, the threshold compensation module and the second light-emitting control module are suspended to operate, the reset module operates to reset the potentials of the first node and the fourth node to an initialization voltage under the control of the reset module, and the initialization voltage is input into the reset module through a reset signal line;

the compensation control module is used for controlling the pixel driving circuit to be in a threshold voltage compensation stage, wherein the first light emitting control module, the second light emitting control module and the reset module are suspended to operate, the data writing module, the driving module and the threshold compensation module operate to enable the potential of the first node to reach a compensation voltage, and the data voltage is input into the data writing module through a data signal line;

the light-emitting control module is used for controlling the pixel driving circuit to be in a light-emitting stage, the data writing module, the threshold compensation module and the reset module to pause operation, the first light-emitting control module, the driving module and the second light-emitting control module operate to enable a driving current to drive a light-emitting element to emit light, the driving current is input into the first light-emitting control module and the second light-emitting control module through a light-emitting control signal line, and the driving current is generated by the storage capacitor module.

Optionally, the refresh rate control module includes:

the first refresh rate control sub-module is used for enabling the eighth transistor to be turned on if the refresh rate control signal is a first refresh rate control signal, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series;

and a second refresh rate control sub-module, configured to turn off the eighth transistor if the refresh rate control signal is a second refresh rate control signal, so that the storage capacitor module outputs the second capacitance value through the second storage capacitor, where a refresh rate of the first refresh rate control signal is greater than a refresh rate of the second refresh rate control signal.

Optionally, the reset control module includes:

the first reset control submodule is used for inputting a reset signal through the first scanning signal line;

a second compensation control sub-module for inputting a compensation prohibition signal through the second scanning signal line;

and the second light-emitting control submodule is used for inputting a light-emitting forbidding signal through the light-emitting control signal line.

Optionally, the compensation control module includes:

the second reset control submodule is used for inputting a reset forbidding signal through the first scanning signal line;

the first compensation control submodule is used for inputting a compensation signal through the second scanning signal line;

Optionally, the lighting control module includes:

and the first light-emitting control submodule is used for inputting a light-emitting signal through the light-emitting control signal line.

The technical scheme provided by the embodiment of the disclosure at least brings the following beneficial effects:

when the pixel driving circuit works at a high refresh rate, the first storage capacitor and the second storage capacitor are connected in series to output a first capacitance value with a smaller capacitance value, and the charging time of the storage capacitor in the threshold voltage compensation stage is reduced. The current of the pixel driving circuit passing through the light-emitting element is stable, so that the requirement of rapid voltage change of the control end of the driving module during high-refresh-rate display is met, and the pixel driving circuit can be suitable for a high-refresh-rate working state.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the disclosure and are not to be construed as limiting the disclosure.

Fig. 1 is a schematic circuit diagram illustrating a pixel driving circuit according to an exemplary embodiment.

Fig. 2 is a schematic circuit diagram of a pixel driving circuit according to an exemplary embodiment.

Fig. 3 is a schematic circuit diagram of a pixel driving circuit according to an exemplary embodiment.

Fig. 4 is a schematic diagram illustrating an equivalent circuit structure of a pixel driving circuit in a low refresh rate operating state according to an exemplary embodiment.

Fig. 5 is a timing diagram illustrating a pixel driving circuit in a low refresh rate operating state according to an exemplary embodiment.

Fig. 6 is a schematic diagram illustrating an equivalent circuit structure of a pixel driving circuit in a high refresh rate operating state according to an exemplary embodiment.

Fig. 7 is a timing diagram illustrating a pixel driving circuit in a high refresh rate operating state according to an exemplary embodiment.

Fig. 8 is a flow chart illustrating a pixel driving method according to an exemplary embodiment.

Fig. 9 is a flow chart illustrating a pixel driving method according to an exemplary embodiment.

Fig. 10 is a flow chart illustrating a pixel driving method according to an exemplary embodiment.

Fig. 11 is a flow chart illustrating a pixel driving method according to an exemplary embodiment.

Fig. 12 is a flow chart illustrating a pixel driving method according to an exemplary embodiment.

Fig. 13 is a schematic diagram illustrating a structure of a pixel driving device according to an exemplary embodiment.

Fig. 14 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment.

Fig. 15 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment.

Fig. 16 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment.

Fig. 17 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment.

Detailed Description

In order to make the technical solutions of the present disclosure better understood by those of ordinary skill in the art, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings.

It should be noted that the terms "first," "second," and the like in the description and claims of the present disclosure and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the disclosure described herein are capable of operation in sequences other than those illustrated or otherwise described herein. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

A panel having an Active-matrix Organic Light-Emitting diode (AMOLED) has the advantages of high refresh rate, high contrast, high color gamut, and flexibility, and currently, the AMOLED driving technology has been widely applied to terminal products such as mobile phones and TVs, and the AMOLED belongs to an Organic Light-Emitting diode (OLED). The OLED display panel has the advantages of self-luminescence, low driving voltage, high luminous efficiency, bright color, high contrast, wide viewing angle, fast response speed, low power consumption, and the like, and has been developed as a display panel with the most potential for development. Low Temperature Poly-Silicon (LTPS) is currently used as a driving transistor of a pixel driving circuit in the OLED.

However, the output capacitance of the storage capacitor module in the currently used pixel driving circuit is not variable, and if the output capacitance is small, the gate voltage of the driving transistor may not be maintained stable for a long time due to the long duration of the light emitting phase of the light emitting element in the low refresh rate operating state, so that the light emitting element may flicker. If the output capacitance is large, the low refresh rate operating state may be satisfied, but the high refresh rate operating state may not be satisfied. There is currently a lack of pixel drive circuits that can simultaneously satisfy both low and high refresh rate operating states.

In order to optimize the uniformity problem of the AMOLED, a screen factory adopts a 7T1C pixel circuit, threshold compensation is carried out on a driving tube in one line of time, and the difference of the luminous currents of the pixel circuits in the plane is reduced as much as possible, so that the difference of the luminous brightness of the pixels in the plane is reduced, and the uniformity is improved. However, as the refresh rate increases, for example, from 60Hz to 120Hz, the time for such a line is halved, i.e. the charging time is halved, resulting in a difference in threshold capture between 120Hz and 60Hz, and thus in a difference in uniformity between 120Hz and 60Hz at the same low gray scale, so that when the refresh rate is switched between 120Hz and 60Hz at a low gray scale, the uniformity variation is clearly seen, resulting in poor cross-cut effect.

The light emitting current of the 7T1C pixel circuit is as follows: i = K (PVDD-Vdata-Vth) ^ 2. The voltage regulator is characterized in that I is current, PVDD is constant voltage high potential, Vdata is data voltage, and when the gray scale is fixed, the values of VDD and Vdata are fixed values.

The Vth is threshold voltage, when threshold compensation of each pixel driving tube in the plane is sufficient, the Vth in the above formula is 0, the luminous current is consistent, and the uniformity is good; when the threshold compensation of each pixel driving tube in the plane is insufficient, the Vth in the above formula is different, and the difference is influenced by the process, so that the luminous current is inconsistent and the uniformity is poor.

Fig. 1 is a schematic diagram illustrating a circuit structure of a pixel driving circuit according to an exemplary embodiment, and as shown in fig. 1, the pixel driving circuit 100 includes the following structure: the driving module 110, the reset module 120, the data write module 130, the first light emission control module 140, the second light emission control module 150, the storage capacitor module 160, the light emitting element 170, the first node N1, the second node N2, the third node N3, and the fourth node N4. The control is the refresh rate control signal line, the reset signal line is used for inputting the refresh rate control signals Fcontrol and ref, the emission control signal line is used for inputting the reset signals Vref and mit, the emission control signals Emit and VDD are the constant-voltage high potentials, the potentials are PVDD and VEE are ground lines, the potentials are 0 and S1, the first scanning signal line is used for inputting the first scanning signals Scan1 and S2, and the second scanning signal Scan2 is used for inputting the second scanning signal Scan 2.

The control end of the driving module is connected with the first node, the input end of the driving module is connected with the constant-voltage high potential through the second node, and the output end of the driving module is connected with the third node. The driving module can adjust the brightness of the light emitting element.

The working process of the pixel driving circuit comprises a light-emitting stage, wherein in the light-emitting stage, the storage capacitor module, the first light-emitting control module, the second light-emitting control module and the driving module start to operate, and other modules stop operating. So that the light emitting element emits light. The light emitting brightness of the light emitting element can be controlled according to the driving current generated by the storage capacitor module.

The control end of the reset module is connected with a first scanning signal line, the input end of the reset module is connected with a reset signal line, and the output end of the reset module is connected with the first node and the fourth node. The reset module may enable resetting of the storage capacitor module and the light emitting element.

The work flow of the pixel driving circuit comprises a reset phase, in the reset phase, the reset module and the storage capacitor module start to operate, and other modules stop operating. The initialization voltage Vref is input to the reset module through the reset signal line so that the potentials of the first node and the fourth node reach the Vref. The reset phase is used for resetting the storage capacitor module and the light-emitting element, and signal residue possibly existing in the previous phase is eliminated.

The control end of the data writing module is connected with the second scanning signal line, the input end of the data writing module is connected with the data signal line, and the output end of the data writing module is connected with the second node. The data writing module may write the data voltage into the storage capacitor module.

The working process of the pixel driving circuit comprises a threshold voltage compensation stage, wherein in the threshold voltage compensation stage, the data writing module, the driving module and the storage capacitor module enter an operating state, and other modules stop operating. And inputting the data voltage Vdata into the data writing module through the data signal line so as to enable the potential of the first node to reach a compensation potential. The calculation formula of the compensation potential is as follows: vc = Vdata- | Vth |. In the formula, Vc is the compensation potential, Vth is the threshold voltage, and Vdata is the data voltage.

The control end of the first light-emitting control module is connected with a light-emitting control signal line, the input end of the first light-emitting control module is connected with the constant-voltage high potential, and the output end of the first light-emitting control module is connected with the second node. The first light emission control module may pass a current through the light emitting element to cause the light emitting element to emit light.

The control end of the second light-emitting control module is connected with the light-emitting control signal line, the input end of the second light-emitting control module is connected to the third node, and the output end of the first light-emitting control module is connected to the fourth node. The second light emission control module may pass a current through the light emitting element to cause the light emitting element to emit light.

The control end of the storage capacitor module is connected with a refresh rate control signal line, the input end of the storage capacitor module is connected with the constant-voltage high potential, and the output end of the storage capacitor module is connected with the first node. The storage capacitor module may store the data voltage.

And the positive electrode of the light-emitting element is connected with the fourth node, and the negative electrode of the light-emitting element is connected with a constant voltage and a low potential. The light-emitting element is used for emitting light so as to show the information written by the data writing module.

Fig. 2 is a schematic diagram illustrating a circuit structure of a pixel driving circuit according to an exemplary embodiment, and as shown in fig. 1, the pixel driving circuit 200 includes the following structure: the driving module 210, the reset module 220, the data write module 230, the first light emission control module 240, the second light emission control module 250, the storage capacitor module 260, the light emitting element 270, the threshold compensation module 280, the first node N1, the second node N2, the third node N3, and the fourth node N4. The control is the refresh rate control signal line, the reset signal line is used for inputting the refresh rate control signals Fcontrol and ref, the emission control signal line is used for inputting the reset signals Vref and mit, the emission control signals Emit and VDD are the constant-voltage high potentials, the potentials are PVDD and VEE are ground lines, the potentials are 0 and S1, the first scanning signal line is used for inputting the first scanning signals Scan1 and S2, and the second scanning signal Scan2 is used for inputting the second scanning signal Scan 2.

The control end of the threshold compensation module is connected with the second scanning signal line, the input end of the threshold compensation module is connected with the third node, and the output end of the threshold compensation module is connected with the first node. The threshold compensation module may cause the potentials of the first node and the third node to reach a compensation potential.

The working process of the pixel driving circuit comprises a threshold voltage compensation stage, wherein in the compensation stage, the data writing module, the driving module, the threshold compensation module and the storage capacitor module enter an operating state, and other modules stop operating. And the data voltage Vdata is input into the data writing module through the data signal line, and then the storage capacitor module is charged through the driving module and the threshold compensation module, so that the potentials of the first node and the third node reach a compensation potential Vc. The calculation formula of the compensation voltage is as follows: vc = Vdata- | Vth |. In the formula, Vc is the compensation potential, Vth is the threshold voltage, and Vdata is the data voltage. And after the threshold voltage compensation stage is completed, the potential of the second node is Vdata.

Fig. 3 is a schematic diagram illustrating a circuit structure of a pixel driving circuit according to an exemplary embodiment, and as shown in fig. 3, the pixel driving circuit 300 includes the following structure: the light emitting device includes a first transistor M1, a second transistor M2, a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a seventh transistor M7, an eighth transistor M8, a light emitting element L, a first storage capacitor C1, and a second storage capacitor C2. The control is the refresh rate control signal line, the reset signal line is used for inputting the refresh rate control signals Fcontrol and ref, the emission control signal line is used for inputting the reset signals Vref and mit, the emission control signals Emit and VDD are the constant-voltage high potentials, the potentials are PVDD and VEE are ground lines, the potentials are 0 and S1, the first scanning signal line is used for inputting the first scanning signals Scan1 and S2, and the second scanning signal Scan2 is used for inputting the second scanning signal Scan 2.

Since a Low Temperature Polysilicon (LTPS) thin film transistor has higher mobility and stronger driving capability than an Indium Gallium Zinc Oxide (IGZO) thin film transistor, LTPS thin film transistors are more widely used in display panels than IGZO thin film transistors, however, the LTPS thin film transistor has a larger leakage current than the IGZO thin film transistor, and particularly when displaying at a low refresh rate, the LTPS thin film transistor exhibits a significant flicker due to the large leakage current, the IGZO TFT can just make up the deficiency of LTPS TFT, and fully combine the two to fully utilize their advantages, so that the display panel has both strong driving capability and low power consumption, the method is suitable for high-refresh-rate display and low-refresh-rate display, which is a low-temperature poly oxide (LTPO) display technology which is popular in the field of display panels at present.

The embodiment of the disclosure uses an LTPO display technology, combines two thin film transistors, namely, a Low Temperature Polysilicon (LTPS) thin film transistor and an Indium Gallium Zinc Oxide (IGZO) thin film transistor, and uses the IGZO thin film transistor as a thin film transistor at a position where leakage is easy to occur in a pixel driving circuit, for example, a thin film transistor connected to a gate of a driving transistor, so as to prevent charges on the gate of the driving transistor from leaking away when driving at a low refresh rate, so that the pixel driving circuit is suitable for realizing low refresh rate driving, and reduces power consumption of a display panel while reducing a flicker phenomenon.

In one possible implementation, the first transistor M1, the second transistor M2, the third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, and the eighth transistor M8 are all P-type transistors.

Optionally, the driving module includes a third transistor, a gate of the third transistor is connected to the first node, a source of the third transistor is connected to the second node, and a drain of the third transistor passes through the third node. The third transistor may adjust light emission luminance of the light emitting element.

In the threshold voltage compensation phase and the light emitting phase, the third transistor is in a closed state according to control of a gate voltage thereof, and may be equivalent to one conductive line. In the reset phase, the third transistor is in an on state according to the control of the gate voltage, and current cannot pass therethrough.

Optionally, the data writing module includes a second transistor, a gate of the second transistor is connected to the second scan signal line, a source of the second transistor is connected to the data signal line, and a drain of the second transistor is connected to the second node. The second transistor may write the data voltage into the storage capacitor module.

In the threshold voltage compensation phase, the second transistor is controlled to be in a closed state according to the compensation signal input by the second scan signal line, and may be equivalently a conductive line. In the reset phase and the light-emitting phase, the fourth transistor is in an on state according to control of the compensation prohibition signal inputted from the second scan signal line, and a current cannot pass therethrough.

Optionally, the reset module comprises a fifth transistor and a seventh transistor.

The grid electrode of the fifth transistor is connected with the first scanning signal line, the source electrode of the fifth transistor is connected with the reset signal line, and the drain electrode of the fifth transistor is connected with the first node. The fifth transistor may implement the storage capacitor module.

A gate of the seventh transistor is connected to the first scanning signal line, a source of the seventh transistor is connected to the reset signal line, and a drain of the seventh transistor is connected to a positive electrode of the light-emitting element through the fourth node. The seventh transistor can realize resetting of the light emitting element.

In the reset phase, the fifth transistor and the seventh transistor are in a closed state under the control of the reset signal input by the first scan signal line, and may be equivalent to one conductive line. In the threshold voltage compensation phase and the light emission phase, the fifth transistor and the seventh transistor are in an on state in accordance with control of the reset prohibition signal input from the first scan signal line, and a current cannot pass therethrough.

Optionally, the storage capacitor module includes an eighth transistor, the first storage capacitor and the second storage capacitor, a gate of the eighth transistor is connected to the refresh rate control signal line, a source of the eighth transistor is connected to the constant voltage high potential, a drain of the eighth transistor is connected to the first end of the second storage capacitor through the fifth node, the first end of the second storage capacitor is connected to the fifth node, the second end of the second storage capacitor is connected to the first node, the first end of the first storage capacitor is connected to the constant voltage high potential, and the second end of the second storage capacitor is connected to the fifth node. The first storage capacitor and the second storage capacitor may store the data voltage, and the eighth transistor may control an output capacitance of the refresh rate switching sub-module.

In the high-refresh-rate working state, the eighth transistor is in a closed state under the control of the first refresh-rate control signal input by the refresh-rate control signal line, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series;

in the low-refresh-rate working state, the eighth transistor is controlled to be in an open state according to the first refresh-rate control signal input by the refresh-rate control signal line, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series;

In the threshold voltage compensation phase, the fourth transistor is controlled to be in a closed state according to the compensation signal input by the second scanning signal line, and may be equivalent to a conductive line. In the reset phase and the light-emitting phase, the fourth transistor is in an on state according to control of the compensation prohibition signal inputted from the second scan signal line, and a current cannot pass therethrough.

Optionally, the first light emission control module includes a first transistor, a gate of the first transistor is connected to the light emission control signal line, a source of the first transistor is connected to the constant voltage high potential, and a drain of the first transistor is connected to the second node. The first transistor may pass a current through the light emitting element to cause the light emitting element to emit light. The light-emitting element is used for emitting light so as to show the information written by the data writing module.

In the light emitting phase, the first transistor and the sixth transistor are controlled to be in a closed state according to the light emitting signal input by the light emitting control signal line, and may be equivalent to one conductive line. In the threshold voltage compensation phase and the reset phase, the first transistor and the sixth transistor are in an on state according to control of the light emission prohibition signal input from the light emission control signal line, and a current cannot pass therethrough.

Optionally, the second light-emitting control module includes a sixth transistor, a gate of the sixth transistor is connected to the light-emitting control signal line, a source of the sixth transistor is connected to the third node, and a drain of the sixth transistor is connected to the positive electrode of the light-emitting element through the fourth node. The second transistor may pass a current through the light emitting element to cause the light emitting element to emit light.

Fig. 4 is a schematic diagram illustrating an equivalent circuit structure of a pixel driving circuit in a low refresh rate operating state according to an exemplary embodiment. As shown in fig. 4, the eighth transistor is in a closed state, which may be equivalent to a conductive line, the first storage capacitor C1 is short-circuited, and the storage capacitor module output capacitance is equal to the capacitance of the second storage capacitor C2.

Fig. 5 is a timing diagram illustrating a pixel driving circuit in a low refresh rate operating state according to an exemplary embodiment. The first SCAN signal line input signal is SCAN1, the second SCAN signal line input signal is SCAN2, and the emission control signal line input signal is EMIT. In the reset period T1, the first scanning signal line receives a signal reset signal, the second scanning signal line receives a compensation prohibition signal, and the emission control signal line receives an emission prohibition signal. And a threshold voltage compensation period T2 in which the first scanning signal line receives a reset prohibition signal, the second scanning signal line receives a compensation signal, and the emission control signal line receives an emission prohibition signal. A light emission period T3 in which the first scan signal line inputs a reset prohibition signal; the second scanning signal line inputs a compensation inhibiting signal; the light emission control signal line inputs a light emission signal. The reset prohibition signal has a higher potential than the reset signal, the compensation prohibition signal has a higher potential than the compensation signal, and the emission prohibition signal has a higher potential than the emission signal.

Fig. 6 is a schematic diagram illustrating an equivalent circuit structure of a pixel driving circuit in a high refresh rate operating state according to an exemplary embodiment. As shown in fig. 6, the eighth transistor is in an on state, which can be equivalent to an off state, that is, the first storage capacitor C1 is connected in parallel with the second storage capacitor C2. The storage capacitor module outputs a capacitance value equal to a parallel capacitance value of the first storage capacitor and the second storage capacitor, namely a second capacitance value.

In one possible embodiment, the capacitance value of C1 is 6 FaradWhen the capacitance value of the C2 is 4 Farad, the second capacitance value is

。

Fig. 7 is a timing diagram illustrating a pixel driving circuit in a high refresh rate operating state according to an exemplary embodiment. The first SCAN signal line input signal is SCAN1, the second SCAN signal line input signal is SCAN2, and the emission control signal line input signal is EMIT. In the reset period T1, the first scanning signal line inputs a reset signal, the second scanning signal line inputs a compensation prohibition signal, and the light emission control signal line inputs a light emission prohibition signal. And a threshold voltage compensation period T2 in which the first scanning signal line receives a reset prohibition signal, the second scanning signal line receives a compensation signal, and the emission control signal line receives an emission prohibition signal. A light emission period T3 in which the first scan signal line inputs a reset prohibition signal; the second scanning signal line inputs a compensation inhibiting signal; the light emission control signal line inputs a light emission signal. The reset prohibition signal has a higher potential than the reset signal, the compensation prohibition signal has a higher potential than the compensation signal, and the emission prohibition signal has a higher potential than the emission signal.

Fig. 8 is a flow chart illustrating a pixel driving method according to an exemplary embodiment. As shown in fig. 8, the method includes:

step 801, controlling the output capacitance of the storage capacitance module according to the refresh rate control signal.

The display device and the display method have the advantages that the output capacitance of the storage capacitance module is changed, so that the brightness difference of the screen pixels of the pixel driving circuit in a high-refresh-rate working state and a low-refresh-rate working state is reduced, and the uniformity of the screen brightness is improved. This step may control an output capacitance of the storage capacitance module according to the refresh rate.

Step 802, controlling the pixel driving circuit to be in a reset phase, wherein the first light emitting control module, the data writing module, the driving module, the threshold compensation module, and the second light emitting control module temporarily stop operating, and the reset module operates to reset the potentials of the first node and the fourth node to an initialization voltage under the control of the reset module, and the initialization voltage is input to the reset module through the reset signal line.

The driving module comprises a third transistor, the data writing module comprises a second transistor, the resetting module comprises a fifth transistor and a seventh transistor, the storage capacitor module comprises an eighth transistor, the first storage capacitor and the second storage capacitor, and the threshold compensation module comprises a fourth transistor.

In the reset phase, the third transistor is turned on according to control of a gate voltage, the fourth transistor is turned on according to control of the compensation prohibition signal inputted from the second scan signal line, and the first transistor and the sixth transistor are turned on according to control of the emission prohibition signal inputted from the emission control signal line. Current cannot pass through the transistor in the on state. The fifth transistor and the seventh transistor are in a closed state under control of the reset signal inputted from the first scanning signal line, and the initialization voltage Vref is inputted to the fifth transistor and the seventh transistor through the reset signal line, so that the potentials of the first node and the fourth node reach the Vref. The reset phase is used for resetting the storage capacitor module and the light-emitting element, and signal residue possibly existing in the previous phase is eliminated.

Step 803, controlling the pixel driving circuit to be in a threshold voltage compensation stage, where the first light emitting control module, the second light emitting control module, and the reset module suspend operation, the data writing module, the driving module, and the threshold compensation module operate to make the potential of the first node reach a compensation voltage, and the data voltage is input to the data writing module through the data signal line.

In the threshold voltage compensation phase, the fifth transistor and the seventh transistor are turned on under the control of the reset prohibition signal input from the first scanning signal line, the first transistor and the sixth transistor are turned on under the control of the light emission prohibition signal input from the light emission control signal line, and current cannot pass through the transistors in the on state. The second transistor is in a closed state under control of the compensation signal input by the second scanning signal line, the fourth transistor is in a closed state under control of the compensation signal input by the second scanning signal line, and the third transistor is in a closed state under control of a gate voltage thereof, so that the data voltage Vdata is input to the second transistor through the data signal line, and the potential of the first node reaches a compensation potential. The calculation formula of the compensation potential is as follows: vc = Vdata- | Vth |. In the formula, Vc is the compensation potential, Vth is the threshold voltage, and Vdata is the data voltage.

Step 804, controlling the pixel driving circuit to be in a light emitting stage, the data writing module, the threshold compensation module, and the reset module to suspend operation, and the first light emitting control module, the driving module, and the second light emitting control module to operate, so that a driving current drives the light emitting element to emit light, the driving current is input to the first light emitting control module and the second light emitting control module through the light emitting control signal line, and the driving current is generated by the storage capacitor module.

In the light emission phase, the fourth transistor is turned on by the control of the compensation prohibition signal inputted from the second scanning signal line, the fifth transistor and the seventh transistor are turned on by the control of the reset prohibition signal inputted from the first scanning signal line, the fourth transistor is turned on by the control of the compensation prohibition signal inputted from the second scanning signal line, and current cannot pass through the transistors in the turned-on state. The first transistor and the sixth transistor are turned on in response to control of the light emission signal input from the light emission control signal line, and the third transistor is turned on in response to control of a gate voltage thereof, so that a current flows through the light emitting element to emit light from the light emitting element. And controlling the brightness according to the driving current input by the light-emitting control signal line.

Fig. 9 is a flow chart illustrating a pixel driving method according to an exemplary embodiment. As shown in fig. 9, the method includes:

in step 901, if the refresh rate control signal is the first refresh rate control signal, the eighth transistor is turned on, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series.

In the high refresh rate operating state, the first refresh rate control signal is input to the gate of the eighth crystal through the refresh rate control signal line, turning on the eighth transistor. In this case, the eighth crystal can be equivalent to an open circuit, and the first storage capacitor and the second storage capacitor are connected in series.

Step 902, if the refresh rate control signal is a second refresh rate control signal, turning off an eighth transistor to enable the storage capacitor module to output the second capacitance value through the second storage capacitor, where the refresh rate of the first refresh rate control signal is greater than the refresh rate of the second refresh rate control signal.

And in a low refresh rate working state, the second refresh rate control signal is input to the grid electrode of the eighth crystal through the refresh rate control signal line, so that the eighth transistor is closed. In this case, the eighth crystal may be equivalent to a short circuit, and only the first storage capacitor has a current flowing therethrough.

The formula of the charging voltage and the capacitance in unit time is as follows:

. In the formula (I), the compound is shown in the specification,

is the instantaneous voltage of the capacitor, in volts (V),

is the initial voltage of the capacitor and is,

is the voltage of the power supply, t is time in seconds (t), R is resistance in ohms (Ω), C is capacitance in farads (F), which is a natural constant, e ≈ 207182812484. In unit time, the larger C is, the smaller t/RC is, the larger e-t/RC is, the smaller 1-e-t/RC is, the smaller Vt is, namely the charged voltage in unit time is reduced, and the charging speed is reduced; otherwise, the following can be obtained: the smaller C, the faster the charging speed.

Since the first capacitance value is greater than the second capacitance value, the charging speed of the storage capacitor module is faster in the high refresh rate operating state and slower in the low refresh rate operating state. The present disclosure can adapt to different refresh rate switching scenarios by controlling the magnitude of the capacitance values of the first storage capacitor and the second storage capacitor.

Fig. 10 is a flow chart illustrating a pixel driving method according to an exemplary embodiment. As shown in fig. 10, the method includes:

step 1001, inputting a reset signal through the first scanning signal line.

Bringing the fifth transistor and the seventh transistor into a closed state with the reset signal to write the potentials of the first node and the fourth node to the Vref.

Step 1002, inputting a compensation inhibiting signal through the second scanning signal line.

Bringing the second transistor and the fourth transistor into an on state using the compensation prohibition signal.

Step 1003, inputting a light-emitting prohibition signal through the light-emitting control signal line.

The first transistor and the sixth transistor are brought into an on state by the light emission disabling signal.

Fig. 11 is a flow chart illustrating a pixel driving method according to an exemplary embodiment. As shown in fig. 11, the method includes:

in step 1101, a reset prohibition signal is input through the first scanning signal line.

Bringing the fifth transistor and the seventh transistor into an on state with the reset disable signal.

Step 1102, inputting a compensation signal through the second scanning signal line.

Bringing the second transistor and the fourth transistor into a closed state using the compensation signal.

Step 1103, inputting a light emission prohibition signal through the light emission control signal line.

Fig. 12 is a flow chart illustrating a pixel driving method according to an exemplary embodiment. As shown in fig. 12, the method includes:

step 1201, a reset disable signal is input through the first scanning signal line.

Step 1202, inputting a compensation inhibiting signal through the second scanning signal line.

Step 1203, inputting a light-emitting signal through the light-emitting control signal line.

And enabling the first transistor and the sixth transistor to enter a closed state by using the light-emitting signal so as to enable the light-emitting element to emit light, and controlling the light-emitting brightness of the light-emitting element through the storage capacitor module.

The embodiment of the disclosure also provides a display panel, which includes the pixel driving circuit.

The embodiment of the present disclosure provides a pixel driving device, and fig. 13 is a schematic structural diagram of a pixel driving device according to an exemplary embodiment. As shown in fig. 13, the pixel driving apparatus 1300 includes:

a refresh rate control module 1310 for controlling the output capacitance of the storage capacitor module according to the refresh rate control signal.

The display device and the display method have the advantages that the output capacitance of the storage capacitance module is changed, so that the brightness difference of the screen pixels of the pixel driving circuit in a high-refresh-rate working state and a low-refresh-rate working state is reduced, and the uniformity of the screen brightness is improved. The module may control an output capacitance of the storage capacitance module according to the refresh rate.

The reset control module 1320 is configured to control the pixel driving circuit to be in a reset phase, where the first light emitting control module, the data writing module, the driving module, the threshold compensation module, and the second light emitting control module are suspended from operating, and the reset module operates to reset potentials of the first node and the fourth node to an initialization voltage under the control of the reset module, and the initialization voltage is input to the reset module through a reset signal line.

A compensation control module 1330, configured to control the pixel driving circuit to be in a threshold voltage compensation phase, where the first lighting control module, the second lighting control module, and the reset module are suspended from operating, the data writing module, the driving module, and the threshold compensation module operate to enable a potential of the first node to reach a compensation voltage, and a data voltage is input to the data writing module through a data signal line;

Fig. 14 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment. As shown in fig. 14, the pixel driving device 1400 includes:

the first refresh rate control sub-module 1410, if the refresh rate control signal is the first refresh rate control signal, configured to turn on the eighth transistor, so that the storage capacitor module outputs the first capacitance value through the first storage capacitor and the second storage capacitor in series;

in the high refresh rate operating state, the first refresh rate control signal is input to the gate of the eighth crystal through the refresh rate control signal line, turning on the eighth transistor. In this case, the eighth crystal can be equivalent to an open circuit, and the first storage capacitor and the second storage capacitor are connected in series. And reducing the charging time of the storage capacitor module to stabilize the current of the pixel driving circuit passing through the light-emitting element.

The second refresh rate control sub-module 1420, if the refresh rate control signal is the second refresh rate control signal, is configured to turn off the eighth transistor, so that the storage capacitor module outputs the second capacitance value through the second storage capacitor, where a refresh rate of the first refresh rate control signal is greater than a refresh rate of the second refresh rate control signal.

. In the formula (I), the compound is shown in the specification,

is the instantaneous voltage of the capacitor, in volts (V),

is the initial voltage of the capacitor and is,

is the voltage of the power supply, t is time, in seconds (t), R is resistance, in ohms (Ω), C is capacitance, in farads (F), as a natural constant, e ≈ 207182812484. In unit time, the larger C is, the smaller t/RC is, the larger e-t/RC is, the smaller 1-e-t/RC is, the smaller Vt is, namely the charged voltage in unit time is reduced, and the charging speed is reduced; otherwise, the following can be obtained: the smaller C, the faster the charging speed.

Fig. 15 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment. As shown in fig. 15, the pixel driving device 1500 includes:

a first reset control sub-module 1510 for inputting a reset signal through the first scan signal line;

A second compensation control sub-module 1520 for inputting a compensation prohibition signal through the second scan signal line;

And a second light emission control sub-module 1530 for inputting a light emission prohibition signal through the light emission control signal line.

Fig. 16 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment. As shown in fig. 16, the pixel driving device 1600 includes:

a second reset control sub-module 1610 configured to input a reset disable signal through the first scan signal line;

A first compensation control submodule 1620 configured to input a compensation signal through the second scanning signal line;

And a second light emission control sub-module 1630 for inputting a light emission prohibition signal through the light emission control signal line.

Fig. 17 is a schematic structural diagram illustrating a pixel driving device according to an exemplary embodiment. As shown in fig. 17, the pixel driving apparatus 1700 includes:

a second reset control submodule 1710 for inputting a reset disable signal through the first scan signal line;

A second compensation control sub-module 1720 for inputting a compensation prohibition signal through the second scanning signal line;

The first light emission control sub-module 1730 is configured to input a light emission signal through the light emission control signal line.

Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.

It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A pixel driving circuit is characterized by comprising a driving module, a reset module, a data writing module, a first light emitting control module, a second light emitting control module, a storage capacitor module and a light emitting element;

2. The pixel driving circuit according to claim 1, wherein the storage capacitor module comprises a first storage capacitor, a second storage capacitor, and a refresh rate switching sub-module;

3. The pixel driving circuit according to claim 2, further comprising a threshold compensation module, wherein a control terminal of the threshold compensation module is connected to the second scan signal line, an input terminal of the threshold compensation module is connected to the third node, and an output terminal of the threshold compensation module is connected to the first node.

4. The pixel driving circuit according to claim 1, wherein the driving module comprises a third transistor, a gate of the third transistor is connected to the first node, a source of the third transistor is connected to the second node, and a drain of the third transistor passes through the third node.

5. The pixel driving circuit according to claim 1, wherein the data writing module includes a second transistor, a gate of the second transistor is connected to the second scan signal line, a source of the second transistor is connected to the data signal line, and a drain of the second transistor is connected to the second node.

6. The pixel driving circuit according to claim 1, wherein the reset module includes a fifth transistor and a seventh transistor;

7. The pixel driving circuit according to claim 2, wherein the storage capacitor module comprises an eighth transistor, the first storage capacitor and the second storage capacitor, a gate of the eighth transistor is connected to the refresh rate control signal line, a source of the eighth transistor is connected to the constant voltage high potential, a drain of the eighth transistor is connected to a first terminal of the second storage capacitor through the fifth node, a first terminal of the second storage capacitor is connected to the fifth node, a second terminal of the second storage capacitor is connected to the first node, a first terminal of the first storage capacitor is connected to the constant voltage high potential, and a second terminal of the second storage capacitor is connected to the fifth node.

8. The pixel driving circuit according to claim 3, wherein the threshold compensation module comprises a fourth transistor, a gate of the fourth transistor is connected to the second scan signal line, a source of the fourth transistor is connected to the third node, and a drain of the fourth transistor is connected to the first node.

9. The pixel driving circuit according to claim 1, wherein the first light emission control module comprises a first transistor, a gate of the first transistor is connected to the light emission control signal line, a source of the first transistor is connected to the constant voltage high potential, and a drain of the first transistor is connected to the second node.

10. The pixel driving circuit according to claim 9, wherein the second light emission control module includes a sixth transistor, a gate of the sixth transistor is connected to the light emission control signal line, a source of the sixth transistor is connected to the third node, and a drain of the sixth transistor is connected to a positive electrode of the light emitting element via the fourth node.

11. A pixel driving method for driving the pixel driving circuit according to any one of claims 1 to 10, the method comprising:

12. The pixel driving method according to claim 11, wherein the controlling the output capacitance of the storage capacitor module according to the refresh rate control signal comprises:

13. The pixel driving method according to claim 11, wherein the controlling the pixel driving circuit in a reset phase comprises:

inputting a reset signal through the first scanning signal line;

14. The pixel driving method according to claim 13, wherein the controlling the pixel driving circuit in the threshold voltage compensation phase comprises:

inputting a reset prohibition signal through the first scanning signal line;

inputting a compensation signal through the second scanning signal line;

15. The pixel driving method according to claim 14, wherein the controlling the pixel driving circuit in a light emitting phase comprises:

inputting a reset prohibition signal through the first scanning signal line;

16. The pixel driving method according to claim 15, wherein a potential of the reset prohibition signal is higher than the reset signal, a potential of the compensation prohibition signal is higher than the compensation signal, and a potential of the light emission prohibition signal is higher than the light emission signal.

17. A display panel comprising the pixel drive circuit according to any one of claims 1 to 10.

18. A pixel driving device, comprising: