CN113065300A - Method, system and device for backtracking simulation waveform in chip EDA (electronic design automation) simulation - Google Patents
Method, system and device for backtracking simulation waveform in chip EDA (electronic design automation) simulation Download PDFInfo
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Abstract
The invention discloses a method, a system and a device for backtracking simulation waveforms in chip EDA (electronic design automation) simulation, and relates to the technical field of chip development. The method comprises the following steps: acquiring information of the completion of the operation of the simulation case, recording basic simulation waveform information of the simulation case through a backtracking system, and mapping and storing the basic simulation waveform information corresponding to the name and/or the number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user aiming at a backtracking system; acquiring waveform storage path information of a corresponding simulation case in a backtracking system according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of a specified path for a user to view. The invention improves the efficiency of verifying personnel to review and search the simulation waveform file of the simulation case on the basis of not influencing the simulation speed, and has simple and convenient operation.
Description
Technical Field
The invention relates to the technical field of chip development, in particular to a method, a system and a device for backtracking simulation waveforms in chip EDA simulation.
Background
In the field of chip Design, Verification (Verification) work is performed throughout the whole Design flow, and a large amount of EDA (electronic Design Automation) Verification is required from behavioral level HDL Design to chip flow sheet. As the scale of design chips increases, the verification work of chips becomes more and more important. The test case (case test) is a series of codes written for verifying the function or performance of the test item. When the EDA simulation is performed through the test case, the simulation result is usually stored in the form of fsdb (fast Signal Data base) waveform, and at the later stage, bug (error) is located and corrected by a bug (error detection) tool such as Verdi.
During the debug process of the chip, a verifier is often required to provide some FSDB waveform under a simulation test scenario for a reference when a debugger configures the chip parameters. If the simulation test scenario is the same or similar scenario that the verifier has simulated before, the verifier can directly provide to the debugger by looking up the FSDB waveform file obtained by the previous simulation. However, because the number of the simulated FSDB waveforms is often large, it may be difficult for the verifier to find the required target FSDB waveform in a short time, so that the verifier can only re-simulate the previously simulated test case, which causes a serious waste of the hard disk resources and the time cost of the server.
Disclosure of Invention
The invention aims to: the method, the system and the device for backtracking the simulation waveform in the simulation of the chip EDA are provided to overcome the defects of the prior art. According to the method and the device, the tracing system is arranged to record the basic information of the simulation waveform after the simulation case is finished, the waveform storage path information of the corresponding simulation case can be searched from the tracing system according to the simulation waveform searching instruction triggered by the user, and then the waveform storage path information is output through the display screen or stored into the result file of the specified path for the user to check.
In order to achieve the above object, the present invention provides the following technical solutions:
a method for backtracking simulation waveforms in chip EDA simulation comprises the following steps:
acquiring information of the operation completion of the simulation case, recording basic simulation waveform information of the simulation case through a backtracking system, wherein the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case, and mapping and storing the basic simulation waveform information corresponding to the name and/or number of the simulation case;
acquiring a simulation waveform searching instruction triggered by a user aiming at the backtracking system;
acquiring waveform storage path information of a corresponding simulation case in a backtracking system according to the simulation waveform searching instruction;
and outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path.
Further, the waveform is an FSDB waveform; and acquiring the triggering operation of the user on one or more waveform storage paths in the waveform storage path information, and outputting one or more corresponding FSDB waveforms through a display screen.
Further, the step of obtaining the waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform searching instruction comprises,
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging whether the simulation case name is contained or not, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of the simulation case corresponding to the simulation case name;
judging whether the simulation case number is contained or not, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of the simulation case corresponding to the simulation case number;
judging whether simulation running time information is contained, searching in a backtracking system based on the simulation running time, and acquiring waveform storage path information of a simulation case corresponding to the simulation running time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not contained, acquiring the waveform storage path information of all the simulation cases in the backtracking system.
Further, according to the field information of the data structure set by the user, a data structure corresponding to the basic file of the simulation waveform is constructed in the backtracking system; the data structure at least comprises 3 fields which are respectively used for storing the name and/or number information of the simulation case, the waveform storage path information of the simulation case and the simulation running time information;
and for any simulation case, acquiring the name and/or number of the simulation case and the basic information of the simulation waveform, and storing the simulation case and the basic information of the simulation waveform in a corresponding field in the data structure to realize the mapping storage.
Further, the data structure also comprises a 4 th field for storing the test scene information to which the simulation case belongs; at this time, the step of obtaining the waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching command includes,
judging whether the simulation waveform searching instruction contains test scene information or not;
and judging whether the simulation case contains test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Further, the simulation running time information is simulation ending time, current timestamp information is obtained when the simulation case runs, and the timestamp information is used as the simulation ending time information.
Further, the step of obtaining information that the simulation case is run completely includes,
monitoring all simulation cases for performing EDA simulation, and identifying the simulation cases based on preset completion keywords when the simulation cases are completely run;
and the backtracking system detects the identification information of the simulation case, judges that the simulation case is operated completely when the identification information has the completion keyword, and judges that the simulation case is not operated completely if the identification information does not have the completion keyword.
Further, the simulation waveform searching instruction is that a user inputs a wave _ fsdb-check operation command through a user operation interface or selects a wave _ fsdb-check operation option output in the user operation interface.
The invention also provides a system for backtracking the simulation waveform in the simulation of the chip EDA, which comprises the following structures:
the case operation recording module is used for recording the basic simulation waveform information of the simulation case when the simulation case is operated, and the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case; mapping and storing the simulation waveform basic information corresponding to the name and/or the number of the simulation case;
the backtracking triggering module is used for acquiring a simulation waveform searching instruction triggered by a user;
the backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path.
The invention also provides a chip EDA simulation device, which comprises:
the test system is used for running the simulation case through the circuit to be tested to perform simulation test, generating simulation waveform data and storing the simulation waveform data to a specified storage path;
the backtracking system is used for recording the basic simulation waveform information of the simulation case when the simulation case finishes running, wherein the basic simulation waveform information at least comprises the waveform storage path information and the simulation running time information of the simulation case, and mapping and storing the basic simulation waveform information corresponding to the name and/or the number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path.
Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects as examples: through the backtracking system, relevant simulation waveform basic information can be automatically recorded after the verification personnel completes the simulation of the simulation case, and when the chip debugging personnel needs to backtrack the EDA simulation waveform, the verification personnel can quickly position the position of the needed simulation waveform through the backtracking system, so that the reference waveform is obtained. Because the backtracking system only records basic information such as the waveform storage path, the simulation running time, the simulation case name and the like of the simulation case, the overhead on a simulation IO (Input/Output) port is basically not increased, so that the efficiency of verifying personnel for reviewing and searching the simulation waveform file of the simulation case is improved on the basis of not influencing the simulation speed, and the operation is simple and convenient. By using the method and the device, the tedious operation that a verifier manually checks the simulation logs one by one to search the simulation waveforms is avoided, and the waste of hard disk resources and time cost caused by re-simulating the test cases is also avoided.
Further, the data structure corresponding to the simulation waveform basic file may further include a test scenario field for storing test scenario information to which the simulation case belongs, so that a user may search waveform storage path information of all corresponding simulation cases in the backtracking system according to the test scenario information, and the user may conveniently search the simulated FSDB waveform according to the test scenario provided by a debugger.
Drawings
Fig. 1 is a flowchart of a method for tracing back a simulation waveform in chip EDA simulation according to an embodiment of the present invention.
Fig. 2 is a diagram illustrating a data format of a simulation waveform basic file according to an embodiment of the present invention.
Fig. 3 is a schematic diagram of information transmission for performing waveform searching by the trace-back system according to an embodiment of the present invention.
Fig. 4 is a schematic block diagram of a backtracking system according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of an EDA simulation apparatus according to an embodiment of the present invention.
Description of reference numerals:
a backtracking system 100; case running recording module 110, backtracking triggering module 120, backtracking processing module 130;
the EDA simulation apparatus 200, the test system 210, and the trace-back system 220.
Detailed Description
The method, system and apparatus for tracing back simulation waveforms in chip EDA simulation disclosed in the present invention are further described in detail with reference to the accompanying drawings and specific embodiments. It should be noted that technical features or combinations of technical features described in the following embodiments should not be considered as being isolated, and they may be combined with each other to achieve better technical effects. In the drawings of the embodiments described below, the same reference numerals appearing in the respective drawings denote the same features or components, and may be applied to different embodiments. Thus, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.
It should be noted that the structures, proportions, sizes, and other dimensions shown in the drawings and described in the specification are only for the purpose of understanding and reading the present disclosure, and are not intended to limit the scope of the invention, which is defined by the claims, and any modifications of the structures, changes in the proportions and adjustments of the sizes and other dimensions, should be construed as falling within the scope of the invention unless the function and objectives of the invention are affected. The scope of the preferred embodiments of the present invention includes additional implementations in which functions may be executed out of order from that described or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the embodiments of the present invention.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail but are intended to be part of the specification where appropriate. In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
Examples
Referring to fig. 1, a method for backtracking a simulation waveform in an EDA simulation of a chip provided by the present invention is shown. The method comprises the following steps:
s100, acquiring information of the operation completion of the simulation case, recording basic simulation waveform information of the simulation case through a backtracking system, wherein the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case, and mapping and storing the basic simulation waveform information corresponding to the name and/or number of the simulation case.
Firstly, according to a Design Under Test (DUT), such as a chip to be verified, a verifier configures a simulation environment (or referred to as verification environment), and copies or links files required in the execution process of a simulation case (case) to a simulation directory of the simulation case. Then, the simulation case can be run by calling the EDA simulation tool and configuring the appropriate parameters to perform the simulation operation. And when the operation of the simulation case is finished, ending the simulation verification and obtaining a simulation result. The simulation results are typically saved in the form of FSDB waveforms.
When the information that the operation of the simulation case is completed is acquired, a backtracking system can be triggered to record the basic information of the simulation waveform of the simulation case, wherein the basic information of the simulation waveform at least comprises the waveform storage path information and the simulation operation time information of the simulation case. Specifically, for example, when the simulation case is completely run, a simulation waveform recording instruction is sent to the trace-back system, and after the trace-back system receives the simulation waveform recording instruction, the recording operation of the simulation waveform basic information of the simulation case is triggered.
The backtracking system can also map and store the simulation waveform basic information corresponding to the name and/or the number of the simulation case. The mapping storage means that the names and/or numbers of the simulation cases and the basic information of the simulation waveforms are stored in a one-to-one correspondence manner, so that the basic information of the simulation waveforms of the simulation cases can be obtained according to the names and/or numbers of the simulation cases, and the names and/or numbers of the simulation cases can also be obtained according to the basic information of the simulation waveforms of the simulation cases.
In this embodiment, before the step S100, the following steps may be further included: collecting a data structure which is set by a user and corresponds to a simulation waveform basic file; according to the field information of the data structure set by a user, a data structure corresponding to the basic file of the simulation waveform is built in the backtracking system; the data structure defines at least 3 fields-waveform name, waveform path (address) and time, for storing simulation case name and/or number information for simulation case, waveform storage path information for simulation case, and simulation runtime information, respectively.
Preferably, the 1 st field is a waveform name, has uniqueness (different simulation waveforms have different waveform names), and can be composed of letters and/or numbers; the 2 nd field is a waveform path (address) used for describing a storage path address of a simulation waveform and is represented by a symbol/+ letter; the 3 rd field is time, which is used to display the simulation runtime of the simulation case, typically expressed in years/months/days. Of course, more specific times such as to hours, minutes, seconds, etc. may also be displayed as needed, and are not limited herein.
Preferably, the simulation running time information is simulation ending time, current timestamp information is acquired when the simulation case runs, and the timestamp information is used as the simulation ending time information.
As an example of a typical manner, the data structure set by the user may be as follows:
Struct Waveform_str
{
Char *fsdb_name
Char *fsdb_dir
Char *time
}
after a simulation case (case) is run, the backtracking system records the basic information of the simulation Waveform of the simulation case through the data structure Waveform _ str, and the basic information of the simulation Waveform of the simulation case includes: the name of the simulation case, the waveform storage path of the simulation case, and the simulation end time. The data format of the simulation waveform elementary file formed based on the aforementioned data structure is shown in fig. 2. In fig. 2, a simulation case name such as "DDR _ BIST" is recorded in column 1, corresponding waveform storage path information is recorded in column 2 of the same row as "/proj/a/word _ view/sim _ work/DDR _ best _ test/DDR _ best.fsdb", and a corresponding simulation end time is recorded in column 3 of the same row as "2021/3/12".
Thus, in step S100, for any simulation case, after acquiring the name and/or number of the simulation case and the basic information of the simulation waveform (including the waveform storage path and the simulation end time of the simulation case), the simulation case can be stored in the corresponding field in the data structure to implement mapping storage.
In this embodiment, preferably, the specific steps of obtaining the information about the completion of the operation of the simulation case may be as follows: monitoring all simulation cases for performing EDA simulation, and identifying the simulation cases based on preset completion keywords when the simulation cases are completely run; and the backtracking system detects the identification information of the simulation case, judges that the simulation case is operated completely when the identification information has the completion keyword, and judges that the simulation case is not operated completely if the identification information does not have the completion keyword.
The completion keyword may be set by a user or a system. By way of example and not limitation, such as to the character "PASS".
By using the technical scheme, when a simulation case (case) is completely operated, a PASS mark is marked on the simulation case to be used as a simulation completion mark. Then, the identification information of the simulation case is automatically detected through a backtracking system, when the identification information has the 'PASS' completion keyword, the simulation case is judged to be completely run, and the basic simulation Waveform information of the simulation case is recorded through the data structure Waveform _ str.
For example, but not by way of limitation, the trace-back system may trigger automatic detection of the identification information of the simulation case in the simulation environment every time a time step passes based on a preset time step. The time step may be configurable by a user or by the system.
And acquiring a simulation waveform searching instruction triggered by the backtracking system by the user.
When a verifier needs to use the backtracking system to search for the simulation waveform, a simulation waveform searching instruction can be triggered. Preferably, the simulated waveform searching instruction is a wave _ fsdb-check operation command input by a user through a user operation interface or a wave _ fsdb-check operation option output by the user operation interface selected by the user.
By way of example and not limitation, referring to fig. 3, for example, when a user needs to perform a simulated waveform search using the trace-back system, an operation command "wave _ fsdb-check" may be input as a simulated waveform search instruction through an associated Linux terminal (Linux terminal) window.
And acquiring the waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform searching instruction.
In this embodiment, preferably, the step of obtaining the waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform searching instruction may be as follows:
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging whether the simulation case name is contained or not, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of the simulation case corresponding to the simulation case name;
judging whether the simulation case number is contained or not, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of the simulation case corresponding to the simulation case number;
judging whether simulation running time information is contained, searching in a backtracking system based on the simulation running time, and acquiring waveform storage path information of a simulation case corresponding to the simulation running time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not contained, acquiring the waveform storage path information of all the simulation cases in the backtracking system.
And outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of a specified path for a user to view.
Optionally, for the output waveform storage path, the user may select a specific simulation waveform that the user wishes to view through a trigger operation. Specifically, trigger operation of a user on one or more waveform storage paths in the waveform storage path information is collected, and corresponding one or more simulation waveforms are output through a display screen. The simulation waveform is, for example, an FSDB waveform.
By way of example and not limitation, for example, when a user selects a certain waveform storage path in the trigger waveform storage path information through a mouse, the FSDB waveform corresponding to the waveform storage path is output. Of course, the selected trigger may also be a voice trigger, and may also be other action triggers, which is not limited herein.
In another implementation manner of this embodiment, the set data structure may further define a 4 th field, i.e., a test scenario field, where the test scenario field may be used to store test scenario information to which the simulation case belongs. A test scenario is similar to a test project (or simulation project), and may correspond to one or more simulation cases (cases).
At this time, the step of obtaining the waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform search instruction includes: judging whether the simulation waveform searching instruction contains test scene information or not; and judging whether the simulation case contains test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Therefore, the user can search the waveform storage path information of all corresponding simulation cases in the backtracking system according to the test scene information, and the user can conveniently search all simulated FSDB waveforms related to the test scene according to the test scene provided by debugging personnel.
According to the technical scheme provided by the invention, PASS identification is carried out every time a simulation case is run, the backtracking system can automatically trigger the recording of the basic information of the simulation Waveform of the simulation case when detecting the PASS identification, and the basic information of the simulation Waveform is recorded through the set data structure Waveform _ str. When a waveform searching is required to be performed by using the trace-back system, a user only needs to input a wave _ fsdb-check operation command on an associated Linux terminal, and then can output all waveform storage path information of simulation waveform information through a display screen, or store the waveform storage path information into a result file "fsdb.
Referring to fig. 4, a tracing system for simulation waveforms in the EDA simulation of a chip is provided as another embodiment of the present invention.
The trace-back system 100 includes a case run record module 110, a trace-back trigger module 120, and a trace-back processing module 130.
The case operation recording module 110 is configured to record basic simulation waveform information of the simulation case when the simulation case is completely operated, where the basic simulation waveform information at least includes waveform storage path information and simulation operation time information of the simulation case; and mapping and storing the simulation waveform basic information corresponding to the name and/or the number of the simulation case.
The trace-back triggering module 120 is configured to collect a simulation waveform search instruction triggered by a user.
The backtracking processing module 130 is configured to obtain waveform storage path information of a corresponding simulation case according to the simulation waveform search instruction; and outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path for a user to view.
In this embodiment, the backtracking processing module 130 is further configured to: judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information; judging whether the simulation case name is contained or not, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of the simulation case corresponding to the simulation case name; judging whether the simulation case number is contained or not, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of the simulation case corresponding to the simulation case number; judging whether simulation running time information is contained, searching in a backtracking system based on the simulation running time, and acquiring waveform storage path information of a simulation case corresponding to the simulation running time; and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not contained, acquiring the waveform storage path information of all the simulation cases in the backtracking system.
The backtracking processing module 130 may be further configured to: and acquiring the triggering operation of the user on one or more waveform storage paths in the waveform storage path information, and outputting one or more corresponding simulation waveforms through a display screen.
In this embodiment, the backtracking system 100 may further include a data structure configuration module configured to: and acquiring a data structure which is set by a user and corresponds to the simulation waveform basic file, and constructing the data structure which corresponds to the simulation waveform basic file in the backtracking system according to the field information of the data structure set by the user. The data structure at least comprises 3 fields which are respectively used for storing simulation case name and/or number information of the simulation case, waveform storage path information of the simulation case and simulation runtime information.
At this time, the mapping storage unit of the case run recording module 110 is configured to: and for any simulation case, acquiring the name and/or number of the simulation case and the basic information of the simulation waveform, and storing the name and/or number and the basic information of the simulation waveform in a corresponding field in the data structure to realize mapping storage.
Preferably, the data structure further includes a 4 th field test scenario field for storing test scenario information to which the simulation case belongs. At this time, the backtracking processing module 130 may be further configured to: judging whether the simulation waveform searching instruction contains test scene information or not; and judging whether the simulation case contains test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
Other technical features are referred to in the previous embodiments and are not described herein.
Referring to fig. 5, a chip EDA simulation apparatus is provided as another embodiment of the present invention.
The EDA simulation apparatus 200 includes a test system 210 and a trace back system 220.
The test system 210 is configured to run a simulation case through a circuit to be tested to perform a simulation test, generate simulation waveform data, and store the simulation waveform data to a designated storage path.
Specifically, the test system 210 may include a simulation circuit module and a simulation waveform storage module. The simulation circuit module is used for receiving the test excitation information of the simulation case to perform simulation test. The simulation waveform storage module is used for storing simulation waveform data obtained after the simulation circuit unit carries out simulation test.
The backtracking system 220 is configured to record basic simulation waveform information of the simulation case when the simulation case is completely run, where the basic simulation waveform information at least includes waveform storage path information and simulation run time information of the simulation case, and map and store the basic simulation waveform information corresponding to the name and/or number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of a specified path for a user to view.
Specifically, the backtracking system 220 may include a case running record module, a backtracking trigger module and a backtracking processing module.
The case operation recording module is used for recording the basic simulation waveform information of the simulation case when the simulation case is operated, wherein the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case; and mapping and storing the simulation waveform basic information corresponding to the name and/or the number of the simulation case.
And the backtracking triggering module is used for acquiring a simulation waveform searching instruction triggered by a user.
The backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path for a user to view.
Other technical features are referred to in the previous embodiments and are not described herein.
In the foregoing description, the disclosure of the present invention is not intended to limit itself to these aspects. Rather, the various components may be selectively and operatively combined in any number within the intended scope of the present disclosure. In addition, terms like "comprising," "including," and "having" should be interpreted as inclusive or open-ended, rather than exclusive or closed-ended, by default, unless explicitly defined to the contrary. All technical, scientific, or other terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs unless defined otherwise. Common terms found in dictionaries should not be interpreted too ideally or too realistically in the context of related art documents unless the present disclosure expressly limits them to that. Any changes and modifications of the present invention based on the above disclosure will be within the scope of the appended claims.
Claims (10)
1. A method for backtracking simulation waveforms in chip EDA simulation is characterized by comprising the following steps:
acquiring information of the operation completion of the simulation case, recording basic simulation waveform information of the simulation case through a backtracking system, wherein the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case, and mapping and storing the basic simulation waveform information corresponding to the name and/or number of the simulation case;
acquiring a simulation waveform searching instruction triggered by a user aiming at the backtracking system;
acquiring waveform storage path information of a corresponding simulation case in a backtracking system according to the simulation waveform searching instruction;
and outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path.
2. The method of claim 1, wherein: the waveform is an FSDB waveform; and acquiring the triggering operation of the user on one or more waveform storage paths in the waveform storage path information, and outputting one or more corresponding FSDB waveforms through a display screen.
3. The method of claim 1, wherein: the step of obtaining the waveform storage path information of the corresponding simulation case in the backtracking system according to the simulation waveform searching instruction comprises,
judging whether the simulation waveform searching instruction contains a simulation case name or a simulation case number or simulation running time information;
judging whether the simulation case name is contained or not, searching in a backtracking system based on the simulation case name, and acquiring waveform storage path information of the simulation case corresponding to the simulation case name;
judging whether the simulation case number is contained or not, searching in a backtracking system based on the simulation case number, and acquiring waveform storage path information of the simulation case corresponding to the simulation case number;
judging whether simulation running time information is contained, searching in a backtracking system based on the simulation running time, and acquiring waveform storage path information of a simulation case corresponding to the simulation running time;
and when judging that the simulation case name information, the simulation case number information and the simulation running time information are not contained, acquiring the waveform storage path information of all the simulation cases in the backtracking system.
4. The method of claim 1, further comprising the steps of: according to the field information of the data structure set by a user, a data structure corresponding to the basic file of the simulation waveform is built in the backtracking system; the data structure at least comprises 3 fields which are respectively used for storing the name and/or number information of the simulation case, the waveform storage path information of the simulation case and the simulation running time information;
and for any simulation case, acquiring the name and/or number of the simulation case and the basic information of the simulation waveform, and storing the simulation case and the basic information of the simulation waveform in a corresponding field in the data structure to realize the mapping storage.
5. The method of claim 4, wherein: the data structure also comprises a 4 th field for storing the test scene information of the simulation case; at this time, the step of obtaining the waveform storage path information of the corresponding simulation case in the trace-back system according to the simulation waveform searching command includes,
judging whether the simulation waveform searching instruction contains test scene information or not;
and judging whether the simulation case contains test scene information, searching in a backtracking system based on the test scene information, and acquiring waveform storage path information of all simulation cases corresponding to the test scene information.
6. The method according to any one of claims 1-5, wherein: and the simulation running time information is simulation ending time, current timestamp information is acquired when the simulation case is run, and the timestamp information is used as the simulation ending time information.
7. The method according to any one of claims 1-5, wherein: the step of obtaining information that the running of the simulation case is completed includes,
monitoring all simulation cases for performing EDA simulation, and identifying the simulation cases based on preset completion keywords when the simulation cases are completely run;
and the backtracking system detects the identification information of the simulation case, judges that the simulation case is operated completely when the identification information has the completion keyword, and judges that the simulation case is not operated completely if the identification information does not have the completion keyword.
8. The method according to any one of claims 1-5, wherein: the simulation waveform searching instruction is that a user inputs a wave _ fsdb-check operation command through a user operation interface or selects a wave _ fsdb-check operation option output in the user operation interface.
9. A backtracking system of simulation waveforms in chip EDA simulation is characterized by comprising:
the case operation recording module is used for recording the basic simulation waveform information of the simulation case when the simulation case is operated, and the basic simulation waveform information at least comprises waveform storage path information and simulation operation time information of the simulation case; mapping and storing the simulation waveform basic information corresponding to the name and/or the number of the simulation case;
the backtracking triggering module is used for acquiring a simulation waveform searching instruction triggered by a user;
the backtracking processing module is used for acquiring waveform storage path information of a corresponding simulation case according to the simulation waveform searching instruction; and outputting the waveform storage path information through a display screen and/or storing the waveform storage path information into a result file of the specified path.
10. A chip EDA simulation apparatus, comprising:
the test system is used for running the simulation case through the circuit to be tested to perform simulation test, generating simulation waveform data and storing the simulation waveform data to a specified storage path;
the backtracking system is used for recording the basic simulation waveform information of the simulation case when the simulation case finishes running, wherein the basic simulation waveform information at least comprises the waveform storage path information and the simulation running time information of the simulation case, and mapping and storing the basic simulation waveform information corresponding to the name and/or the number of the simulation case; acquiring a simulation waveform searching instruction triggered by a user, and acquiring waveform storage path information of a corresponding simulation case in the backtracking system according to the simulation waveform searching instruction; outputting the waveform storage path information through a display screen, and/or storing the waveform storage path information into a result file of the specified path.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113591422A (en) * | 2021-08-03 | 2021-11-02 | 眸芯科技（上海）有限公司 | System for generating test case flow information in chip verification and application |
| CN114662427A (en) * | 2022-03-08 | 2022-06-24 | 芯华章科技股份有限公司 | Debugging method and device for logic system design |
| CN115062569A (en) * | 2022-08-17 | 2022-09-16 | 深圳市华杰智通科技有限公司 | Parallel acceleration system and method for millimeter wave chip design simulation EDA (electronic design automation) |
| CN117370168A (en) * | 2023-09-28 | 2024-01-09 | 芯华章科技(厦门)有限公司 | Method for setting simulation restoration point of logic system design and related equipment |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070094562A1 (en) * | 2005-10-11 | 2007-04-26 | Dustin Bingham | Apparatus and method for unified debug for simulation |
| CN108446493A (en) * | 2018-03-20 | 2018-08-24 | 北京润科通用技术有限公司 | A kind of power of motor grade emulation mode and device |
| CN111832236A (en) * | 2020-06-29 | 2020-10-27 | 山东云海国创云计算装备产业创新中心有限公司 | Chip regression testing method and system, electronic equipment and storage medium |
| CN112100952A (en) * | 2020-09-14 | 2020-12-18 | 海光信息技术股份有限公司 | Post-simulation method and device for integrated circuit, electronic equipment and storage medium |
| CN112346918A (en) * | 2020-10-26 | 2021-02-09 | 眸芯科技（上海）有限公司 | Method and application for assisting waveform debug in chip verification |
| US10936776B1 (en) * | 2020-03-30 | 2021-03-02 | Cadence Design Systems, Inc. | Analyzing waveform data generated for simulated circuit design |
-
2021
- 2021-03-31 CN CN202110351659.1A patent/CN113065300B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070094562A1 (en) * | 2005-10-11 | 2007-04-26 | Dustin Bingham | Apparatus and method for unified debug for simulation |
| CN108446493A (en) * | 2018-03-20 | 2018-08-24 | 北京润科通用技术有限公司 | A kind of power of motor grade emulation mode and device |
| US10936776B1 (en) * | 2020-03-30 | 2021-03-02 | Cadence Design Systems, Inc. | Analyzing waveform data generated for simulated circuit design |
| CN111832236A (en) * | 2020-06-29 | 2020-10-27 | 山东云海国创云计算装备产业创新中心有限公司 | Chip regression testing method and system, electronic equipment and storage medium |
| CN112100952A (en) * | 2020-09-14 | 2020-12-18 | 海光信息技术股份有限公司 | Post-simulation method and device for integrated circuit, electronic equipment and storage medium |
| CN112346918A (en) * | 2020-10-26 | 2021-02-09 | 眸芯科技（上海）有限公司 | Method and application for assisting waveform debug in chip verification |
Non-Patent Citations (4)
| Title |
|---|
| XIAOFU WU等: "Despreading chip waveform design for coherent delay-locked tracking in DS/SS systems", 《IEEE》, pages 631 - 635 * |
| 丁明清等: "基于EDA设计的调试大纲及波形生成技术", 《计算机工程与应用》, pages 112 - 114 * |
| 宋丽蔚;李刚;赵威威;张晔;: "波形匹配技术在测试性仿真验证中的应用", 计算机测量与控制, no. 01, pages 60 - 62 * |
| 杜涛, 湛军, 李平: "EDA数字仿真波形信息文本化的智能化处理", 微电子学, no. 04, pages 386 - 389 * |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113591422A (en) * | 2021-08-03 | 2021-11-02 | 眸芯科技（上海）有限公司 | System for generating test case flow information in chip verification and application |
| CN113591422B (en) * | 2021-08-03 | 2024-01-30 | 眸芯科技（上海）有限公司 | System for generating test case flow information in chip verification and application |
| CN114662427A (en) * | 2022-03-08 | 2022-06-24 | 芯华章科技股份有限公司 | Debugging method and device for logic system design |
| CN115062569A (en) * | 2022-08-17 | 2022-09-16 | 深圳市华杰智通科技有限公司 | Parallel acceleration system and method for millimeter wave chip design simulation EDA (electronic design automation) |
| CN117370168A (en) * | 2023-09-28 | 2024-01-09 | 芯华章科技(厦门)有限公司 | Method for setting simulation restoration point of logic system design and related equipment |
| CN117370168B (en) * | 2023-09-28 | 2024-10-15 | 芯华章科技(厦门)有限公司 | Method for setting simulation restoration point of logic system design and related equipment |
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