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CN112992874B - Manufacturing method of packaging structure and packaging structure - Google Patents

Manufacturing method of packaging structure and packaging structure Download PDF

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Publication number
CN112992874B
CN112992874B CN202011140782.0A CN202011140782A CN112992874B CN 112992874 B CN112992874 B CN 112992874B CN 202011140782 A CN202011140782 A CN 202011140782A CN 112992874 B CN112992874 B CN 112992874B
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Prior art keywords
layer
package
flow column
packaging
electronic component
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CN202011140782.0A
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CN112992874A (en
Inventor
张强波
张伟杰
宋关强
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Sky Chip Interconnection Technology Co Ltd
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Sky Chip Interconnection Technology Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The application provides a manufacturing method of a packaging structure and the packaging structure, wherein the manufacturing method comprises the steps of obtaining a packaging body; the packaging body comprises a support plate, an electronic component, a through flow column and a packaging layer, wherein the electronic component and the through flow column are arranged on at least one surface of the support plate, and the packaging layer is arranged on the surface of one side of the electronic component, which is far away from the support plate, and contacts the support plate to package the electronic component and the through flow column; pressing one side surface of the packaging body to form a pressing layer; processing the preset position of the pressing layer to form a plurality of external pins; the position of at least part of the external pins corresponds to the position of the through-flow column, the through-flow column is communicated with external equipment through the external pins, and the transverse area of the external pins is larger than that of the through-flow column. The manufacturing method is simple in process, and the heat dissipation and through-flow capacity of the manufactured packaging structure are effectively improved.

Description

Manufacturing method of packaging structure and packaging structure
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a manufacturing method of a packaging structure and the packaging structure.
Background
In the information society of today, the dependence of human beings on electronic products is increasing day by day, and the electronic products are developing vigorously in the direction of high integration, miniaturization and miniaturization.
Currently, in order to achieve high integration, miniaturization and miniaturization of products, a Package In Package (PiP), a Package on Package (PoP) or a System In Package (SiP) is generally adopted to Package each component; however, the package structure in the prior art has a complicated manufacturing method and has weak heat dissipation and current capacity.
Disclosure of Invention
According to the manufacturing method of the packaging structure and the packaging structure, the manufacturing process is simple, and the heat dissipation and through-flow capacity of the manufactured packaging structure are effectively improved.
In order to solve the technical problem, the application adopts a technical scheme that: a manufacturing method of a packaging structure comprises the following steps:
obtaining a packaging body; the packaging body comprises a support plate, an electronic component, a through-flow column and a packaging layer, wherein the electronic component and the through-flow column are arranged on at least one surface of the support plate, and the packaging layer is arranged on the surface of one side of the electronic component, which is far away from the support plate, and contacts the support plate to package the electronic component and the through-flow column;
pressing one side surface of the packaging body to form a pressing layer;
processing the preset position of the pressing layer to form a plurality of external pins;
the position of at least part of the external pins corresponds to the position of the through-flow column, the through-flow column is communicated with external equipment through the external pins, and the transverse area of the external pins is larger than that of the through-flow column.
In order to solve the technical problem, the other technical scheme adopted by the application is as follows: a package structure is provided, which includes a package body and an external pin.
The packaging body comprises a carrier plate, an electronic component, a through-flow column and a packaging layer, wherein the electronic component, the through-flow column and the packaging layer are attached to at least one surface of the carrier plate; the external pin is arranged on the surface of one side of the packaging body and is connected with the through-flow column, so that the electronic component on the carrier plate is communicated with external equipment through the through-flow column and the external pin; wherein, the transverse area of external pin is greater than the transverse area of through-flow post.
According to the manufacturing method of the packaging structure and the packaging structure, the packaging body is obtained, the surface of one side of the packaging body is pressed to form a pressing layer, then the preset position of the pressing layer is processed to form a plurality of external pins, and therefore the packaging structure is manufactured; the method comprises the steps that at least part of external pins correspond to the positions of through-flow columns, so that the through-flow columns are communicated with external equipment through the external pins, the external pins are pressed on the surface of one side of a packaging body to form a pressing layer, and then the preset positions of the pressing layer are processed to form the external pins; in addition, the transverse area of the external pin is larger than that of a bonding pad connected with the through-flow column in the prior art, so that the heat dissipation capacity of the product is effectively improved.
Drawings
Fig. 1 is a schematic flowchart of a method for manufacturing a package structure according to a first embodiment of the present application;
FIG. 2 is a schematic diagram of a product structure corresponding to step S11 in FIG. 1;
FIG. 3 is a sub-flowchart of step S11 in FIG. 1 according to a first embodiment of the present application;
fig. 4 is a schematic view of a product structure corresponding to steps S111 to S114 in fig. 3;
FIG. 5 is a sub-flowchart of step S11 in FIG. 1 according to a second embodiment of the present application;
fig. 6 is a schematic view of a product structure corresponding to steps S115 to S118 in fig. 5;
FIG. 7 is a sub-flowchart of step S12 in FIG. 1;
fig. 8 is a schematic view of a product structure corresponding to steps S121 to S122 in fig. 7;
FIG. 9 is a sub-flowchart of step S13 in FIG. 1;
fig. 10 is a schematic view of a product structure corresponding to steps S131 to S134 in fig. 9;
fig. 11 is a schematic flowchart illustrating a method for manufacturing a package structure according to a second embodiment of the present application;
fig. 12 is a schematic view of a product structure corresponding to steps S21 to S24 in fig. 11;
fig. 13 is a schematic structural diagram of a package structure according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only some embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terms "first", "second" and "third" in this application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or as implying a number of indicated technical features. Thus, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of the feature. In the description of the present application, "plurality" means at least two, e.g., two, three, etc., unless explicitly specified otherwise. In the embodiment of the present application, all the directional indicators (such as upper, lower, left, right, front, and rear … …) are used only to explain the relative positional relationship between the components, the movement, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indicator is changed accordingly. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The present application will be described in detail with reference to the accompanying drawings and examples.
Referring to fig. 1, fig. 1 is a schematic flow chart illustrating a manufacturing method of a package structure according to a first embodiment of the present application; in this embodiment, a method for manufacturing a package structure is provided, where the method includes:
step S11: and obtaining the packaging body.
The specific structure of the package 10 can be seen in fig. 2, and fig. 2 is a schematic view of a product structure corresponding to step S11 in fig. 1; specifically, the package 10 includes a carrier 100, an electronic component 101, a through-flow column 102, and a package layer 103, wherein the electronic component 101 and the through-flow column 102 are attached to at least one surface of the carrier 100, and the package layer 103 covers a surface of the electronic component 101 and a surface of the through-flow column 102 away from the carrier 100 and contacts the carrier 100 to package the electronic component 101 and the through-flow column 102, so as to prevent the electronic component 101 and the through-flow column 102 from directly contacting the atmosphere, thereby protecting the electronic component 101 and the through-flow column 102.
Specifically, the electronic component 101 may include one or any combination of a resistor, an inductor, a capacitor, a chip, and a bare chip of a power supply; of course, in other embodiments, the diode and the transistor may be included at the same time, which is not limited in this embodiment.
Specifically, please refer to fig. 3 to 4, wherein fig. 3 is a sub-flowchart of step S11 in fig. 1 according to a first embodiment of the present disclosure, and fig. 4 is a schematic diagram of a product structure corresponding to step S111 to step S114 in fig. 3; in one embodiment, step S11 specifically includes:
step 111: a carrier plate is provided.
Specifically, a signal line and a pad are disposed on the carrier board 100, and the pad is electrically connected to the signal line, and in a specific implementation process, a pin of the electronic component 101 may be connected to the pad on the carrier board 100 through solder paste, so as to be electrically connected to the signal line on the carrier board 100 through the pad.
Specifically, the carrier 100 may be a Printed Circuit Board (PCB), a package carrier or a Quad Flat No-lead package (QFN) frame.
Step S112: and mounting an electronic component on the first surface of the carrier plate and carrying out primary plastic package on the electronic component to form a first packaging layer.
Specifically, the carrier 100 includes a first surface and a second surface disposed away from the first surface; in a specific implementation process, the electronic component 101 is attached to the first surface of the carrier plate 100, and the electronic component 101 is subjected to plastic package by using injection molding equipment to form a first package layer 1030, so that the electronic component 101 is prevented from directly contacting the atmosphere, and the electronic component 101 is protected; specifically, the plastic packaging material is a mixture of epoxy resin and silicon dioxide.
Specifically, the electronic component 101 may specifically include one or any combination of a resistor, an inductor, a capacitor, a chip, and a bare chip of a power supply; of course, in other embodiments, the electronic component 101 may further include a diode and a transistor, which is not limited in this embodiment; in one embodiment, a resistor, a capacitor, a chip, a power bare chip and a part of an inductor are mounted on the first surface of the carrier 100.
Step S113: and mounting the electronic component and the through flow column on the second surface of the carrier plate, and carrying out secondary plastic package on the electronic component and the through flow column to form a second packaging layer.
An electronic component 101 and a through-flow column 102 are attached to the second surface of the carrier plate 100, and the electronic component 101 and the through-flow column 102 are subjected to plastic package by using injection molding equipment to form a second packaging layer 1031, so that the electronic component 101 and the through-flow column 102 are prevented from being directly contacted with the atmosphere, and the electronic component 101 and the through-flow column 102 are protected; specifically, the plastic packaging material is a mixture of epoxy resin and silicon dioxide.
The electronic component 101 may specifically include one or any combination of a resistor, an inductor, a capacitor, a chip, and a bare chip of a power supply; of course, in other embodiments, the electronic component 101 may further include a diode and a transistor, which is not limited in this embodiment; specifically, in one embodiment, a power bare chip and a part of the inductor are mounted on the second surface of the carrier 100.
Specifically, after the electronic component 101 and the flow post 102 on the carrier board 100 are plastically packaged, the flow post 102 is wrapped inside the package 10, and in order to connect the electronic component 101 with an external device through the flow post 102, the method further includes, after step S113:
step S114: and grinding the surface of one side of the second packaging layer, which is far away from the carrier plate, so as to expose the through flow column.
Specifically, grinding is performed along a horizontal plane parallel to the carrier 100 to remove the second package layer 1031 with a certain thickness, so as to expose the through-flow posts 102; of course, in other embodiments, the through-flow column 102 may be exposed by drilling by laser drilling, which is not limited in this embodiment as long as the through-flow column 102 can be exposed.
Specifically, the product structures corresponding to steps S111 to S114 in this embodiment can be seen in fig. 4.
Please refer to fig. 5 to 6, wherein fig. 5 is a sub-flowchart of step S11 in fig. 1 according to a second embodiment of the present application; fig. 6 is a schematic view of a product structure corresponding to steps S115 to S118 in fig. 5; in another embodiment, step S11 specifically includes:
step S115: a carrier plate is provided.
Specifically, a signal line and a pad are disposed on the carrier board 100, and the pad is electrically connected to the signal line, and in a specific implementation process, a pin of the electronic component 101 may be connected to the pad on the carrier board 100 through solder paste, so as to be electrically connected to the signal line on the carrier board 100 through the pad.
Specifically, the carrier 100 may be a Printed Circuit Board (PCB), a package carrier, or a Quad Flat No-lead package (QFN) frame.
Step S116: and the first surface and the second surface of the carrier plate are respectively pasted with electronic components, and the second surface of the carrier plate is pasted with a through flow column.
Specifically, the carrier 100 includes a first surface and a second surface disposed away from the first surface; in a specific implementation process, the first surface and the second surface of the carrier 100 are respectively attached with the electronic component 101, and the second surface of the carrier 100 is attached with the through-flow column 102; the electronic component 101 may specifically include one or any combination of a resistor, an inductor, a capacitor, a chip, and a bare chip of a power supply; of course, in other embodiments, the electronic component 101 may further include a diode and a transistor, which is not limited in this embodiment.
In one embodiment, the resistor, the capacitor, the chip, the power bare chip and the inductor are mounted on the first surface of the carrier 100, and the power bare chip and the inductor are mounted on the second surface of the carrier 100, so as to reduce the volume of the package structure 1.
Specifically, the power supply die is provided with a bonding wire, and the bonding wire is connected to a bonding pad on the carrier 100 to electrically connect the power supply die and a signal line on the carrier 100.
In a specific implementation process, the power bare chip may be attached to the carrier board 100 by an adhesive, which is taken as an example in the following embodiments; wherein, the adhesive can be glue. Of course, in other embodiments, the power bare chip may also be mounted on the carrier 100 by solder balls or copper pillars, and specifically, the mounting may be performed by solder balls or copper pillars mounted on the carrier 100 in the prior art, and the same or similar technical effects may be achieved, which is not described in detail herein.
It can be understood that, when the power bare chip is mounted on the carrier board 100 through the solder ball or the copper pillar, the power bare chip simultaneously passes through the solder ball or the copper pillar to achieve the electrical connection with the signal line on the carrier board 100.
Step S117: and carrying out plastic package on the electronic components on the first surface of the carrier plate to form a first package layer, and carrying out plastic package on the electronic components on the second surface of the carrier plate and the through-flow column to form a second package layer.
Specifically, plastic packaging is performed on the electronic component 101 on the first surface by using injection molding equipment to form a first packaging layer 1030; plastic-sealing the electronic component 101 and the through-flow column 102 on the second surface of the carrier plate 100 by using injection molding equipment to form a second packaging layer 1031, so that the electronic component 101 and the through-flow column 102 are prevented from directly contacting with the atmosphere, and the electronic component 101 and the through-flow column 102 are protected; specifically, the plastic packaging material is a mixture of epoxy resin and silicon dioxide.
Step S118: and grinding the surface of one side of the second packaging layer, which is far away from the carrier plate, so as to expose the through flow column.
Specifically, grinding is performed along a horizontal plane parallel to the carrier 100 to remove a certain thickness of the second package layer 1031, so as to expose the flow posts 102; of course, in other embodiments, the through-flow column 102 may be exposed by drilling through the through-flow column by laser, but this embodiment is not limited thereto as long as the through-flow column 102 can be exposed.
Specifically, the product structures corresponding to steps S115 to S118 in this embodiment can be specifically referred to in fig. 6.
Step S12: and pressing one side surface of the packaging body to form a pressing layer.
Specifically, please refer to fig. 7 to 8, wherein fig. 7 is a sub-flowchart of step S12 in fig. 1, and fig. 8 is a schematic diagram of a product structure corresponding to steps S121 to S122 in fig. 7; step S12 specifically includes:
step 121: and pressing an insulating material on one side surface of the packaging body to form an insulating layer covering one side surface of the packaging body.
Specifically, the insulating material may be a mold sealing material or a prepreg; in a specific implementation process, an insulating material is pressed on a side surface of the package body 10 exposed out of the through-flow column 102 to form an insulating layer 1100, and the insulating layer 1100 covers a side surface of the package body 10; specifically, the thickness of the insulating material may be set according to actual conditions, and is not limited herein.
Step 122: and pressing a conductive material on the surface of one side of the insulating layer, which is far away from the packaging body, so as to form a conductive layer covering the surface of one side of the insulating layer.
It is understood that conductive layer 1101 is connected to package 10 through insulating layer 1100, and insulating layer 1100 serves to connect conductive layer 1101 to package 10 during implementation.
Specifically, the conductive material may be copper; in a specific implementation, the thickness of the conductive layer 1101 is less than the thickness of the insulating layer 1100 to reduce the production cost.
Specifically, the product structure after the processing of steps S121 to S122 can be specifically referred to in fig. 8.
Step S13: and processing the preset position of the pressing layer to form a plurality of external pins.
Specifically, please refer to fig. 9 to 10, wherein fig. 9 is a sub-flowchart of step S13 in fig. 1, and fig. 10 is a schematic diagram of a product structure corresponding to steps S131 to S134 in fig. 9; step S13 specifically includes:
step S131: and drilling holes at preset positions of the laminated layer to form the through holes.
The preset position of the pressing layer 110 involved in step S131 corresponds to the position of the through-flow column 102, and the lateral areas of the two are the same.
Specifically, a laser drilling method is adopted to drill holes at predetermined positions of the lamination layer 110 to form the via holes 111, and the via holes 111 penetrate through the upper and lower surfaces of the lamination layer 110 and are communicated with the through-flow pillars 102, i.e., one ends of the through-flow pillars 102 far away from the carrier plate 100 after the drilling process are exposed from the lamination layer 110.
Specifically, the lateral dimension of the via hole 111 is the same as the lateral dimension of the flow-through post 102.
Step S132: the surface of one side of the pressing layer far away from the packaging body is provided with a protective film so as to protect the rest positions of the pressing layer except the preset position.
In order to avoid the situation that the conductive material is filled in the via hole 111 and simultaneously the conductive material covers the conductive layer 1101, so as to increase the thickness of the conductive layer 1101, before the conductive material is filled, a protective film 112 is disposed on a surface of the lamination layer 110 away from the package body 10, so as to protect the rest positions of the lamination layer 110 except the preset position; it is understood that the protective film 112 is specifically disposed on a surface of the conductive layer 1101 on a side away from the package body 10 to protect the conductive layer 1101.
Step S133: and filling a conductive material in the via hole to communicate the via post with the conductive layer.
Specifically, the via hole 111 is filled with a conductive material by plating to form a communication portion 200 externally connected to the lead 11, so that the via post 102 is communicated with the conductive layer 1101 through the communication portion 200. Specifically, the communication portion 200 has a cylindrical shape, and the lateral area of the communication portion 200 is the same as the lateral area of the flow column 102.
Specifically, the conductive material may be metallic copper.
Step S134: and carrying out graphical processing on the conductive layer to form a plurality of external pins.
Specifically, a mask etching process is performed on the conductive layer 1101 to form soldering portions 201 of a plurality of external pins 11 at predetermined positions of the conductive layer 1101, and to prevent short-circuit between the external pins 11; specifically, the position of at least a portion of weld 201 corresponds to the position of through-flow column 102.
The preset position of the conductive layer 1101 corresponds to the flow post 102, and the lateral area of the conductive layer is larger than that of the flow post 102.
Specifically, the soldering portion 201 is a plate-shaped structure, the lateral area of the soldering portion 201 is larger than the lateral area of the communicating portion 200, and the surface of the communicating portion 200, which is connected to the soldering portion 201, is entirely located on the soldering portion 201, so as to improve the flow capacity of the flow post 102 and improve the heat dissipation capability of the package structure 1.
In the implementation process, the mask etching process specifically includes disposing a photoresist layer on a surface of the conductive layer 1101 away from the package 10, and exposing and developing the photoresist layer to form a photoresist mask; specifically, the photoresist mask corresponds to a predetermined position on the conductive layer 1101, and has the same shape as the cross section of the predetermined soldering portion 201; the conductive layer 1101 is then etched using a photoresist mask to form the soldering portion 201 externally connected to the lead 11.
Specifically, the product structure after processing in steps S131 to S134 can be specifically referred to in fig. 10.
In the manufacturing method of the package structure provided by this embodiment, the package body 10 is obtained, the surface of one side of the package body 10 is pressed to form the pressing layer 110, and then the preset position of the pressing layer 110 is processed to form the external pins 11, so as to manufacture the package structure 1; the position of at least part of the external pin 11 corresponds to the position of the through-flow column 102, so that the through-flow column 102 is communicated with external equipment through the external pin 11, and because the external pin 11 is formed by pressing the surface of one side of the package body 10 to form a pressing layer 110 and then processing the pressing layer 110, compared with the method of providing the carrier plate 100 in the prior art, arranging a pad on the carrier plate 100 and butting the through-flow column 102 with the pad on the carrier plate 100, the manufacturing method of the application can realize accurate alignment between the formed external pin 11 and the through-flow column 102 without aligning with the through-flow column 102, thereby not only omitting the process of aligning the through-flow column 102 with the pad, but also simplifying the manufacturing method, effectively ensuring the alignment accuracy between the external pin 11 and the through-flow column 102 and effectively improving the through-flow capacity of the product; in addition, because the manufacturing method does not need to mount the manufactured package 10 on another carrier plate provided with a bonding pad, so that the electronic component 101 in the package 10 is communicated with external equipment through the bonding pad on the carrier plate, the manufacturing method not only saves the use of the carrier plate, but also avoids the process of arranging the bonding pad at the corresponding position of the carrier plate, thereby the manufacturing method is simpler, and the production cost is effectively reduced; in addition, compared with the prior art, the transverse area of the external pin 11 is larger than that of a bonding pad connected with the through flow column 102, so that the heat dissipation capacity of the product is effectively improved.
Referring to fig. 11 to 12, fig. 11 is a schematic flowchart illustrating a manufacturing method of a package structure according to a second embodiment of the present disclosure, and fig. 12 is a schematic diagram illustrating a product structure corresponding to steps S21 to S24 in fig. 11; in this embodiment, another manufacturing method of a package structure is provided, where the manufacturing method specifically includes:
step S21: and obtaining the packaging body.
Specifically, the package 10 in the present embodiment is different from the package 10 in the first embodiment in that the package 10 in the first embodiment encapsulates a set of electronic components 101 and a set of flow pillars 102, and the package in the present embodiment encapsulates at least two sets of electronic components 101 and at least two sets of flow pillars 102, so as to improve the manufacturing efficiency of the product. Specifically, the specific implementation process of step S21 may refer to the specific implementation process of step S11 in the first embodiment, and the same or similar technical effects may be achieved, which is not described herein again.
Step S22: and pressing one side surface of the packaging body to form a pressing layer.
Step S23: and processing the preset position of the pressing layer to form a plurality of external pins.
Specifically, the specific implementation process of steps S22 to S23 is the same as or similar to the specific implementation process of steps S12 to S13 in the first embodiment, and the same or similar technical effects can be achieved, which is not described herein again.
Step S24: and cutting the packaging body to form at least two packaging structures.
Specifically, as the carrier plate 100 is simultaneously provided with a plurality of groups of electronic components 101, a plurality of packaging structures 1 can be manufactured at one time by the manufacturing method, so that the manufacturing efficiency is effectively improved, and the production cost is reduced; specifically, the product structures corresponding to steps S21 to S24 can be specifically referred to in fig. 12.
Referring to fig. 13, fig. 13 is a schematic structural diagram of a package structure according to an embodiment of the disclosure. In the present embodiment, a package structure 1 is provided, and the package structure 1 is specifically manufactured by the manufacturing method of the package structure according to the above embodiments.
Specifically, the package structure 1 includes a package body 10 and an external connection pin 11.
The package 10 includes a carrier 100, an electronic component 101, a through-flow column 102, and a package layer 103, wherein the electronic component 101 and the through-flow column 102 are attached to at least one surface of the carrier 100, and the package layer 103 covers a surface of the electronic component 101 away from the carrier 100 and contacts the carrier 100 to package the electronic component 101 and the through-flow column 102, so as to prevent the electronic component 101 and the through-flow column 102 from directly contacting the atmosphere, thereby protecting the electronic component 101 and the through-flow column 102.
It should be understood that, in the above-mentioned embodiment of the method for manufacturing a package structure, the package 10 in the first embodiment has the same structure as the package 10 in the present embodiment, and the package 10 in the second embodiment includes a plurality of packages 10 in the present embodiment, that is, the package 10 in the present embodiment is cut from the package 10 in the above-mentioned second embodiment of the method for manufacturing a package structure.
Specifically, a signal line and a pad are arranged on the carrier board 100, and the pad is electrically connected to the signal line, and in a specific implementation process, a pin of the electronic component 101 is connected to the pad on the carrier board 100 through solder paste, so as to be electrically connected to the signal line on the carrier board 100 through the pad.
Specifically, the carrier 100 includes a first surface and a second surface away from the first surface, where the first surface is specifically a side surface of the carrier 100 away from the external connection pins 11. In a specific implementation process, the electronic component 101 is attached to both the first surface and the second surface of the carrier 100, so as to reduce the volume of the package structure 1.
Specifically, the carrier 100 may be a Printed Circuit Board (PCB), a package carrier or a Quad Flat No-lead package (QFN) frame.
The electronic component 101 may specifically include one or any combination of a resistor, an inductor, a capacitor, a chip, and a bare chip. Of course, in other embodiments, the electronic component 101 may further include a diode and a transistor, which is not limited in this embodiment.
In a specific implementation process, a resistor, a capacitor, a chip, a bare chip of a power supply, and a part of an inductor may be attached to a first surface of the carrier 100, and a part of an inductor, a capacitor, and/or a battery cell may be attached to a second surface of the carrier 100.
The through-flow column 102 is specifically attached to the second surface of the carrier 100, connected to the external pin 11, and configured to communicate the electronic component 101 on the carrier 100 with the external pin 11; specifically, the flow posts 102 are uniformly distributed at two ends of the package structure 1, and one end of each flow post 102 away from the carrier 100 is connected to an external pin 11. Of course, in other embodiments, the surface of the electronic component 101 on the second surface of the carrier 100, which is away from the carrier 100, may also be mounted with the flow post 102, so that the electronic component 101 on the second surface is directly communicated with the external pin 11 through the flow post 102 disposed on the surface of the electronic component 101, so as to improve the current capacity of the package structure 1; it is understood that the external pin 11 is also connected to the end of the flow post 102 attached to the surface of the electronic component 101, which is far away from the electronic component 101.
Specifically, the through-flow column 102 may be one or any combination of a copper column, a copper ball, or a copper block; in a specific process, the flow-through pillar 102 may be a copper pillar, and the lateral dimension of the copper pillar is constant, which is taken as an example of the flow-through pillar 102 in the present application.
Wherein the encapsulation layer 103 includes a first encapsulation layer 1030 and a second encapsulation layer 1031; the first encapsulating layer 1030 covers a side surface of the electronic component 101 on the first surface of the carrier 100, away from the carrier 100, and contacts the carrier 100 to encapsulate the electronic component 101; the second packaging layer 1031 covers the flow post 102 and the surface of the electronic component 101 away from the carrier board 100 on the second surface of the carrier board 100, and contacts the carrier board 100 to package the flow post 102 and the electronic component 101, so as to protect the electronic component 101 and the flow post 102.
Specifically, the material of the first and second encapsulation layers 1030 and 1031 may be a mixture of epoxy and silicon dioxide.
The external pin 11 is arranged on one side surface of the package 10 and connected with the through-flow column 102, and the electronic component 101 electrically connected with the through-flow column 102 on the carrier 100 is connected with the external pin 11 through the through-flow column 102 and further communicated with external equipment through the external pin 11; specifically, the external pins 11 are disposed on a side surface of the second package layer 1031 away from the carrier 100, and positions of at least some of the external pins 11 correspond to positions of the through-flow posts 102, so that the electronic components 101 on the carrier 100 can be communicated with external devices through each through-flow post 102, thereby improving the through-flow capability.
In a specific embodiment, the number of the external pins 11 is the same as that of the through-flow columns 102, and the transverse area of the external pins 11 is larger than that of the through-flow columns 102, so as to improve the alignment precision between the through-flow columns 102 and the external pins 11, thereby effectively improving the through-flow capacity of a product; meanwhile, compared with the prior art, the transverse area of the external pin 11 is larger than that of a bonding pad connected with the through flow column 102, so that the heat dissipation capacity of the product is effectively improved.
In the package structure 1 provided by this embodiment, by providing the package body 10, the package body 10 is configured to include the carrier plate 100, the electronic component 101 and the through-flow column 102 mounted on at least one surface of the carrier plate 100, and the package layer 103, wherein the package layer 103 covers the surfaces of the electronic component 101 and the through-flow column 102 that are away from the carrier plate 100 and contacts the carrier plate 100 to package the electronic component 101 and the through-flow column 102, so that the electronic component 101 and the through-flow column 102 can be effectively prevented from directly contacting the atmosphere, and the electronic component 101 and the through-flow column 102 can be protected; meanwhile, the external pin 11 is arranged on one side surface of the package 10, and the external pin 11 is connected with the through-flow column 102, so that the electronic component 101 on the carrier 100 electrically connected with the through-flow column 102 can be communicated with external equipment through the through-flow column 102 and the external pin 11; in addition, because the transverse area of external pin 11 is greater than the transverse area of through-flow post 102 to can make and realize accurate counterpoint between through-flow post 102 and the external pin 11, and then effectively improve the through-flow capacity of product, and because the transverse area of external pin 11 in this application compares in prior art with the transverse area of the pad of being connected with through-flow post 102 great, thereby effectively improved the heat-sinking capability.
Specifically, in one embodiment, the external connection pin 11 specifically includes a communication portion 200 and a soldering portion 201.
The communication part 200 is connected with one end of the through-flow column 102 far away from the package body 10, so as to communicate the external pin 11 with the through-flow column 102; specifically, the communicating portion 200 has a cylindrical shape, and the lateral area of the cylindrical shape is the same as the lateral area of the through-flow column 102.
Wherein, the welding part 201 is connected to one end of the communication part 200 far away from the flow post 102 to form a welding surface of the package structure 1; in a specific implementation process, an external device is specifically connected to the soldering portion 201, so that the electronic component 101 in the package structure 1 is communicated with the external device sequentially through the flow column 102, the communication portion 200 and the soldering portion 201.
Specifically, the soldering portion 201 is a plate-shaped structure, the transverse area of the soldering portion 201 is larger than the transverse area of the communicating portion 200, and the surface of the communicating portion 200, which is connected to the soldering portion 201, is entirely located on the soldering portion 201, so as to improve the flow capacity of the product and improve the heat dissipation capability of the package structure 1.
Referring to fig. 13, in a specific embodiment, an insulating layer 1100 is further disposed on a surface of the package body 10 near the external connection pin 11, and the insulating layer 1100 is used to bond the external connection pin 11 to the package body 10; specifically, one side surface of the insulating layer 1100 is bonded to one side surface of the package 10, and the other side surface of the insulating layer 1100 is bonded to one side surface of the soldering portion 201 close to the package 10; meanwhile, the insulating layer 1100 is bonded to the sidewalls of the vias 200 to firmly bond the external leads 11 at predetermined positions of the package body 10. Specifically, the insulating layer 1100 has the same longitudinal dimension as the communication portion 200.
The insulating layer 1100 may be a molding compound layer or a prepreg layer.
The above are only embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent structures or equivalent processes performed by the present application and the contents of the attached drawings, which are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.

Claims (13)

1. A method for manufacturing a package structure includes:
obtaining a packaging body; the packaging body comprises a carrier plate, an electronic component, a through flow column and a packaging layer, wherein the electronic component and the through flow column are arranged on at least one surface of the carrier plate, and the packaging layer is arranged on the surface of one side, far away from the carrier plate, of the electronic component and contacts the carrier plate to package the electronic component and the through flow column;
pressing one side surface of the packaging body to form a pressing layer; the to carry out the pressfitting in order to form the pressfitting layer one side surface of packaging body, specifically include: pressing an insulating material on one side surface of the packaging body to form an insulating layer covering one side surface of the packaging body; pressing a conductive material on the surface of one side, far away from the packaging body, of the insulating layer to form a conductive layer covering the surface of one side of the insulating layer;
processing the preset position of the pressing layer to form a plurality of external pins; the right preset position of the pressing layer is processed to form a plurality of external pins, and the method specifically comprises the following steps: drilling holes at the preset positions of the lamination layer to form via holes; wherein the via hole is communicated with the through-flow column; arranging a protective film on the surface of one side, far away from the packaging body, of the pressing layer to protect the rest positions of the pressing layer except the preset position; filling a conductive material in the via hole to communicate the via post with the conductive layer; carrying out graphical processing on the conductive layer to form a plurality of external pins;
the positions of at least part of the external pins correspond to the positions of the through flow columns, the through flow columns are communicated with external equipment through the external pins, and the transverse areas of the external pins are larger than the transverse areas of the through flow columns.
2. The method for manufacturing a package structure according to claim 1, wherein the step of obtaining the package body specifically comprises:
providing a carrier plate;
mounting an electronic component on the first surface of the carrier plate and carrying out primary plastic package on the electronic component to form a first packaging layer;
mounting an electronic component and a through-flow column on a second surface of the carrier plate, and carrying out secondary plastic package on the electronic component and the through-flow column to form a second packaging layer; wherein the first and second surfaces are disposed away from each other;
and grinding the surface of one side of the second packaging layer, which is far away from the carrier plate, so as to expose the through flow column.
3. The method for manufacturing a package structure according to claim 1, wherein the step of obtaining the package body specifically comprises:
providing a carrier plate;
respectively mounting electronic components on the first surface and the second surface of the carrier plate, and mounting a through flow column on the second surface of the carrier plate;
the electronic components on the first surface of the carrier plate are subjected to plastic package to form a first packaging layer, and the electronic components on the second surface of the carrier plate and the through flow column are subjected to plastic package to form a second packaging layer; wherein the first surface and the second surface are disposed away from each other;
and grinding the surface of one side of the second packaging layer, which is far away from the carrier plate, so as to expose the through flow column.
4. The method for manufacturing a package structure according to claim 1, wherein the step of drilling a predetermined position of the lamination layer to form a via hole specifically comprises:
and drilling holes at the preset positions of the laminated layers in a laser drilling mode to form the via holes.
5. The method for manufacturing the package structure according to claim 1, wherein the step of filling the via hole with a conductive material to connect the via post and the conductive layer specifically comprises:
and filling a conductive material in the via hole by adopting an electroplating hole filling mode so as to communicate the via post with the conductive layer.
6. The method for manufacturing a package structure according to claim 1, wherein after the step of processing the predetermined positions of the lamination layer to form a plurality of external leads, the method further comprises:
and cutting the packaging body to form at least two packaging structures.
7. The method for manufacturing the package structure according to any one of claims 1 to 6, wherein a plurality of groups of the electronic components are mounted on the carrier plate so as to package the plurality of groups of the electronic components simultaneously in the plastic package process.
8. The method for manufacturing the package structure according to any one of claims 1 to 6, wherein the through-flow pillars are one or any combination of copper pillars, copper balls or copper blocks.
9. The method for manufacturing the package structure according to claim 1, wherein the insulating material is a mold sealing material or a prepreg; the conductive material is metallic copper.
10. A package structure, characterized in that the package structure is manufactured by the method for manufacturing a package structure according to any one of claims 1 to 9; the package structure includes:
the packaging body comprises a carrier plate, an electronic component, a through-flow column and a packaging layer, wherein the electronic component, the through-flow column and the packaging layer are attached to at least one surface of the carrier plate;
the external pin is arranged on the surface of one side of the packaging body and is connected with the through-flow column, so that the electronic component on the carrier plate is communicated with external equipment through the through-flow column and the external pin; and the transverse area of the external pin is larger than that of the through flow column.
11. The package structure of claim 10, wherein the external pin comprises:
the communication part is connected with one end of the through-flow column, which is far away from the packaging body, so as to communicate the external pin with the through-flow column;
the welding part is connected to one end, far away from the through flow column, of the communication part to form a welding surface of the packaging structure;
wherein a lateral area of the communication portion is the same as a lateral area of the flow post, and a lateral area of the welding portion is larger than the lateral area of the communication portion.
12. The package structure of claim 10, wherein the flow pillars are uniformly distributed at two ends of the package structure, and one end of each flow pillar away from the carrier board is connected to one of the external pins.
13. The package structure according to claim 11, wherein an insulating layer is further disposed on a surface of the package body near the external connection pin, and the insulating layer is used for bonding the external connection pin to the package body; and the longitudinal dimension of the insulating layer is the same as that of the communication portion.
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