CN112994930A

CN112994930A - Submodule address learning method and storage medium

Info

Publication number: CN112994930A
Application number: CN202110160306.3A
Authority: CN
Inventors: 李彦; 蔡菠; 许宗光; 赵玉灿; 刘井密; 李响; 汪涛
Original assignee: NR Electric Co Ltd; NR Engineering Co Ltd
Current assignee: NR Electric Co Ltd; NR Engineering Co Ltd
Priority date: 2021-02-05
Filing date: 2021-02-05
Publication date: 2021-06-18

Abstract

The invention discloses a submodule address learning method, which is suitable for a multilevel converter control system and is used for learning submodule addresses in a ring network consisting of a valve base controller and a plurality of submodules. The sub-module address corresponds to the position of the sub-module in the ring network, each sub-module determines the address of the sub-module by receiving data frames in the ring network, and the valve base controller confirms the completion condition of sub-module address learning by the received frame information. A submodule in the ring network exits from operation and does not influence the learning effect of other normal submodule address.

Description

Submodule address learning method and storage medium

Technical Field

The invention belongs to the technical field of flexible direct current transmission, and particularly relates to a submodule address learning method and a storage medium in a multilevel converter control system.

Background

The flexible direct-current transmission technology is a new generation direct-current transmission technology based on a full-control device, and has the characteristics of independent active and reactive power regulation, no commutation failure and flexible operation mode. The method has outstanding advantages in the aspects of new energy grid connection, direct current network construction, weak system power supply and the like. Modular multilevel converter systems are the main solution for current flexible dc transmission systems. The Valve Base Controller (VBC) is a main control device, and the Sub-module Controller (SMC) is an execution mechanism. The higher the system voltage level is, the more the number of the sub-modules is; meanwhile, in order to obtain better harmonic characteristics and provide sufficient redundancy for a system, a converter is generally formed by cascading a plurality of SMC, the number of SMC cascaded by a single bridge arm can exceed 200, and the number of SMC of six three-phase bridge arms is larger. The VBC needs to communicate with all the sub-modules through a communication network, for example, a VBC and SMC point-to-point communication mode is adopted, and the VBC has extremely high communication port density, which may cause significant hardware design risk and heat dissipation problems.

The VBC and the SMC form a ring network topology, which can greatly reduce the number of communication ports of the VBC, but since each sub-module controller has the same hardware and software configuration, during normal operation in an actual multilevel converter control system, a valve base controller needs to identify each sub-module and implement independent control, and therefore, a distinguishable address needs to be allocated to each sub-module.

Under the condition that a ring network topology is formed by the VBC and the SMC at present, the address setting of the sub-module is mainly realized by adopting the following two modes:

1. and writing the address into a nonvolatile memory inside the submodule according to the position of the submodule in the network, and manually distributing the address for the submodule in an off-line mode. This way causes a huge workload and does not avoid the risk of manual operation errors. And the sub-modules are typically mounted on a valve tower,

the high-altitude operation is needed, and the hidden danger of personal safety accidents is caused.

2. The addresses are distributed to the sub-modules in a mode of setting dial switches or jumper wires, the operation can be realized by leading the dial switches or the jumper wires out of a control circuit part of the sub-modules to a shell of the whole module, the sub-modules work on a primary side with a high voltage level, the electromagnetic environment is complex, the sub-modules are easy to be interfered by the outside, and the reliability risk is caused.

Disclosure of Invention

The invention aims to provide a method for distributing sub-module addresses online in a communication network of a multi-level converter control system.

In order to achieve the above purpose, the solution of the invention is:

on one hand, the application provides a submodule address learning method which is applied to a communication network of a modular multilevel converter control system, and equipment in the communication network comprises a valve base controller VBC and N submodule controllers SMC which are respectively SMC-1 to SMC-N, wherein N is a positive integer. The VBC and the SMC respectively at least comprise 2 pairs of communication ports, and the VBC and the SMC-1 to the SMC-N are sequentially connected to form two independent unidirectional ring networks; the VBC is connected with two pairs of communication ports of the ring network, wherein the communication ports are called small-end communication ports connected with SMC-1 and large-end communication ports connected with SMC-N; the communication direction from the VBC small-end communication port to the SMC-N through the SMC-1 is called a first communication direction, and the communication direction from the VBC large-end communication port to the SMC1 through the SMC-N is called a second communication direction; one of the two independent unidirectional ring networks transmits information along a first communication direction and is called a first ring network, and the other one transmits information along a second communication direction and is called a second ring network. And the VBC respectively sends control command frames carrying different address information from the small-end communication port and the large-end communication port. The SMC determines the address of the sub-module according to the address information in the received frame, and sends the state information frame of the SMC and forwards the received frame downstream. And the VBC confirms the completion condition of the sub-module address learning according to the address information in the received data frame.

Further, the number N of SMCs in the ring network is predetermined, and the relative position of the SMC and the VBC in the ring network is the address of the SMC, and the address range is from 1 to N.

Further, the specific steps of the VBC sending the control command frames carrying different address information from the slave end communication port and the master end communication port are:

the VBC does not forward any received data frame, and sends the control command from the small-side communication port to the ring network in the first communication direction and sends the control command from the large-side communication port to the ring network in the second communication direction according to a preset period T1.

The address information carried by the control command frame sent from the slave communication port is 0, and the address information carried by the control command frame sent from the master communication port is N + 1.

Further, the SMC determines the sub-module address according to the address information in the received frame, and sends the state information frame of the SMC and forwards the received frame downstream, which specifically includes:

the SMC determines the address of the sub-module according to the address information in all the received frames, and completes the address learning of the SMC;

the SMC does not send or forward any data frame before completing address learning;

and after the address learning is finished, sending the address information state information frame containing the SMC along the first ring network and the second ring network at the same time according to a preset period T1, and forwarding the received frame to downstream equipment.

Further, the SMC determines the address of the sub-module according to the address information in all the received frames, and finishes the address learning of the SMC, specifically:

if the SMC can only receive the control command frame and the address information in the control command frame is 0, the appointed port of the SMC finishes address learning and the address is 1;

if the SMC can only receive the control command frame and the address information in the control command frame is N +1, the appointed port of the SMC finishes address learning and the address is N; if the SMC receives a control command frame and other state frames sent by the SMC, if address information in the frames forms an ascending sequence from 0 to m (0< m < N), the appointed port of the SMC finishes address learning, and the address is m + 1; if the address information in the frames form a descending sequence from N +1 to m (1< m < N +1), the designated port of the SMC completes address learning and has an address of m-1.

Further, the two pairs of communication ports of the SMC respectively carry out address learning, if the time that the address learning result of a certain port of the SMC is kept unchanged exceeds T2(T2> T1), the SMC completes the address learning and takes the address learned by the port as the address of the SMC module.

Further, the VBC confirms the completion of the sub-module address learning according to the address information in the received data frame, which specifically includes:

the VBC checks the address information carried in all the SMC sending state frames received by the small-end communication port, if the address information in the frames forms an ascending sequence from 1 to m (m is more than or equal to 1 and less than or equal to N), and the ascending sequence is kept unchanged for more than time T3(T3> T2), the address learning of the SMC-1 to SMC-m is indicated; all address information carried in the SMC sending state frames received by the VBC large-end communication port form an ascending sequence from m to N (m is more than or equal to 1 and less than or equal to N), and the ascending sequence is kept unchanged for a time T3, which indicates that the SMC-m to SMC-N all complete address learning.

Further, the method further comprises: the intraframe address information received by the VBC small-end communication port can be used as fault diagnosis information of a ring network communication link, and if the small-end communication port can receive a control command sent by the large-end communication port, the situation that the second ring network unidirectional communication link has no fault is shown; otherwise, it means that there is a fault on the downstream link of the second ring network.

Further, the method further comprises: the intraframe address information received by the VBC large-end communication port can be used as fault diagnosis information of a ring network communication link, and if the large-end communication port can receive a control command sent by the small-end communication port, the first ring network one-way communication link is indicated to be fault-free; otherwise, it means that there is a failure on the downstream link of the first ring network.

In another aspect, the present application provides a computer readable storage medium having a computer program stored thereon, which when executed by a processor, implements the steps of the sub-module address learning method described above.

The invention has the technical effects that:

(1) by adopting the scheme of the invention, when the VBC and the SMC adopt the ring network topology in the multi-level converter system, the method and the system can be suitable for different sub-module scales in the ring network, the effect of automatically finishing address learning by the SMC is realized, the labor investment is obviously saved, and the risk of human errors is eliminated.

(2) When the SMC exits from the ring network during power-on, the address learning results of other SMC cannot be influenced.

(3) The system communication fault can be identified in the initial operation stage, and the fault of a single submodule cannot influence the address learning result of other submodules. The method of the invention can provide basis for troubleshooting communication fault points, and is beneficial to system maintenance and overhaul.

Drawings

Fig. 1 is a flowchart of a method for learning a sub-module address according to an embodiment of the present invention.

Fig. 2 is a schematic diagram of a communication network topology of a multilevel converter control system according to an embodiment of the present invention;

101 is a valve base controller, the apparatus comprising at least 2 pairs of communication interfaces;

102 is a sub-module in the ring network, and the equipment comprises at least 2 pairs of communication interfaces;

103 is an optical fiber between communication modules;

111 a small end communication port of the valve base controller;

112, a large-end communication port of the valve base controller.

Fig. 3 is a schematic diagram of an address learning process of the 7 SMC ring network system according to the present invention.

Fig. 4 shows a situation that there is a SMC failure in the ring network in the SMC address learning process in the ring network of the present invention.

Fig. 5 is a control command format according to the present invention.

Fig. 6 is a state information frame format according to the present invention.

Detailed Description

The technical solution and the advantages of the present invention will be described in detail with reference to the accompanying drawings.

The embodiment of the application provides a submodule address learning method which is applied to a communication network of a modular multilevel converter control system. The equipment in the communication network comprises a valve base controller VBC and N sub-module controllers SMC which are respectively SMC-1 to SMC-N, wherein N is a positive integer. The VBC and the SMC respectively at least comprise 2 pairs of communication ports, and the VBC and the SMC-1 to the SMC-N are sequentially connected to form two independent unidirectional ring networks; the VBC is connected with two pairs of communication ports of the ring network, wherein the communication ports are called small-end communication ports connected with SMC-1 and large-end communication ports connected with SMC-N; the communication direction from the VBC small-end communication port to the SMC-N through the SMC-1 is called a first communication direction, and the communication direction from the VBC large-end communication port to the SMC1 through the SMC-N is called a second communication direction; one of the two independent unidirectional ring networks transmits information along a first communication direction and is called a first ring network, and the other one transmits information along a second communication direction and is called a second ring network. In the embodiment shown in fig. 1, the sub-module address learning method includes the following steps:

s110: and the VBC respectively sends control command frames carrying different address information from the small-end communication port and the large-end communication port.

Specifically, the VBC does not forward any received data frame, and sends a control command from the small-end communication port to the ring network in the first communication direction and sends a control command from the large-end communication port to the ring network in the second communication direction according to a preset period T1; the address information carried by the control command frame sent from the slave communication port is 0, and the address information carried by the control command frame sent from the master communication port is N + 1.

S120: the SMC determines the address of the sub-module according to the address information in the received frame, and sends the state information frame of the SMC and forwards the received frame downstream.

Specifically, the SMC determines the address of the sub-module according to the address information in all the received frames, and completes the address learning of the SMC; the SMC does not send or forward any data frame before completing address learning; and after the address learning is finished, sending the address information state information frame containing the SMC along the first ring network and the second ring network at the same time according to a preset period T1, and forwarding the received frame to downstream equipment.

If the SMC can only receive the control command frame and the address information in the control command frame is 0, the appointed port of the SMC completes address learning and the address is 1. If the SMC can only receive the control command frame and the address information in the control command frame is N +1, the designated port of the SMC completes address learning and the address is N. If the SMC receives a control command frame and other state frames sent by the SMC, if address information in the frames forms an ascending sequence from 0 to m (0< m < N), the appointed port of the SMC finishes address learning, and the address is m + 1; if the address information in the frames form a descending sequence from N +1 to m (1< m < N +1), the designated port of the SMC completes address learning and has an address of m-1.

The number N of SMCs in the ring network is predetermined, the relative position of the SMCs and the VBC in the ring network is the addresses of the SMCs, and the address range is from 1 to N.

S130: and the VBC confirms the completion condition of the sub-module address learning according to the address information in the received data frame.

Specifically, the VBC checks the address information carried in all SMC sending state frames received by the small-end communication port, if the address information in the frames forms an ascending sequence from 1 to m (m is more than or equal to 1 and less than or equal to N) and keeps unchanged for more than time T3(T3 is more than T2), the address learning of the SMC-1 to SMC-m is completed; all address information carried in the SMC sending state frames received by the VBC large-end communication port form an ascending sequence from m to N (m is more than or equal to 1 and less than or equal to N), and the ascending sequence is kept unchanged for a time T3, which indicates that the SMC-m to SMC-N all complete address learning.

In the preferred embodiment, the two pairs of communication ports of the SMC respectively perform address learning, if the result of address learning of a certain port of the SMC remains unchanged for a time exceeding T2(T2> T1), the SMC completes the address learning and takes the address learned by the port as the address of the SMC module.

In a preferred embodiment, the method further comprises: the intraframe address information received by the VBC large-end communication port can be used as fault diagnosis information of a ring network communication link, and if the large-end communication port can receive a control command sent by the small-end communication port, the first ring network one-way communication link is indicated to be fault-free; otherwise, it means that there is a failure on the downstream link of the first ring network.

And when the VBC monitors the downstream link of the SMC-X at the small-end communication port and detects that the downstream link of the SMC-Y has a fault, the communication link between the SMC-X and the SMC-Y has a problem. The relationship between the data of X and Y can provide the basis for troubleshooting fault points for operators.

The following describes the technical solution of the present application in detail by taking a communication network composed of a valve-based controller VBC and 7 sub-module controllers as an example with reference to fig. 2 to 6. In this embodiment, as shown in fig. 2, communication ports of 7 sub-module controllers SMC-1 to SMC-7 are sequentially connected in series to form a sub-module chain, and communication ports at two ends of the sub-module chain are correspondingly connected to two communication ports of the VBC. Wherein the valve base controller 101 comprises at least 2 pairs of communication interfaces; the sub-module SMC102 includes at least 2 pairs of communication interfaces; the VBC communicates with all SMCs over the gigabit ethernet 103. The VBC is sequentially connected with the SMC-1 to the SMC-7 to form two independent unidirectional looped networks; and the VBC is connected with two pairs of communication ports of the ring network, wherein the communication ports are connected with SMC-1 and called small-end communication ports 111, and the communication ports are connected with SMC-7 and called large-end communication ports 112. The communication direction from the VBC small-end communication port 111 to the SMC-7 through the SMC-1 is called a first communication direction, and the communication direction from the VBC large-end communication port 112 to the SMC1 through the SMC-7 is called a second communication direction; two independent unidirectional looped networks, the one that transmits information along the first communication direction is called the first looped network, and the other transmits information along the second communication direction is called the second looped network. The control command frame sent by the VBC and the status information frame sent by the SMC are both encoded according to an ethernet frame format, and in this embodiment, the frame format is as shown in fig. 5, where the type of the control command frame is 0xD001, and the type of the status information frame is 0xD 002. According to the requirement of the minimum frame length of 64Byte of the Ethernet (IEEE802.3), when the frame length is less than 64B, a frame filling field needs to be added.

The VBC is a master control device in the system, and sends control command frames to the SMC network from the slave communication port 111 and the master communication port 112, respectively, according to a determined period T1. In this embodiment, the frame format of the control command frame is as shown in fig. 5. The destination address is a broadcast address, and the lowest byte of the source address is used for distinguishing that the control command frame is sent to the ring network by the big-end or small-end communication port.

The SMC is an execution device in the system, does not send or forward any data to the ring network before address learning is not finished, and sends the state information of the SMC to two directions of the ring network according to a fixed period T1 after address learning is finished, and forwards the frame received by the SMC to a downstream device. In this embodiment, the frame format of the control command frame is as shown in fig. 6. The destination address is a fixed value, and the lowest byte of the source address identifies the result of the SMC learning address.

Fig. 3 illustrates the working process of the SMC address learning method in this embodiment:

3-1 illustrates the initial state after the system is powered up, when all SMCs do not complete address learning, so they do not send any data. And the small-end communication port of the VBC sends a control command frame carrying an address 0 to the ring network according to a fixed period T1, and the large-end communication port sends a control command frame carrying an address 8 to the ring network according to a fixed period T1.

3-2, SMC-1 next to the small-end communication port can only receive the control command frame carrying address 0, the state is kept unchanged in T2 time, and the port connected with the VBC small-end communication port by SMC-1 learns address 1 and takes it as the own SMC address. The SMC-1 starts to send its SMC status information frame to the ring network in both directions as T1. The SMC-7 next to the big end communication port can only receive the control command frame carrying the address 8, the state is kept unchanged in the time T2, and the port connected with the VBC small end communication port by the SMC-7 learns the address 7 and takes the address as the address of the SMC. The SMC-7 starts to send its SMC status information frame to the ring network in both directions at T1.

And the other SMCs in the ring network finish the address learning step by step in sequence, wherein,

3-3, SMC-2 and SMC-6 complete address learning and send/forward frames carrying addresses 0/1/2 and 6/7/8 to downstream devices.

3-4, SMC-3 and SMC-5 complete address learning and send/forward frames carrying addresses 0/1/2/3 and 5/6/7/8 to downstream devices.

3-5, the address information carried by the frame received from the counterclockwise direction by the SMC farthest from the big end/small end communication port forms an increasing number sequence of 0/1/2/3, and the address information carried by the frame received from the clockwise direction forms a decreasing number of 8/7/6/5, so that both ports of the SMC learn that the addresses are 4, and send/forward the frames carrying the addresses 0/1/2/3/4 and 4/5/6/7/8 to the downstream device as the addresses of the SMC. By this time, all SMCs in the ring have completed address learning. And the small-end communication port and the large-end communication port of the VBC can receive all SMCs in the ring and frames sent by the VBC communication port on the opposite side, and after the state is stably kept for more than T3 time, the VBC can estimate that the communication link in the ring is normal.

Fig. 4 illustrates a situation that 1 sub-module with a physical location of SMC-6 cannot work normally due to a fault in the SMC address learning process in this embodiment:

the SMCs in the ring network complete address learning one by one in order of position, as shown in fig. 4:

4-1: the VBC sends a frame carrying an address 0 from the slave communication port; sending a frame carrying an address 8 from a large-end communication port;

4-2: in the counterclockwise direction, SMC-1 completes address learning and sends/forwards the frame carrying address 0/1 to downstream equipment; in the clockwise direction, the SMC-7 finishes address learning, and downstream SMCs of the SMC-7 have faults, so that a control command frame sent by a large-end communication port and a state information frame sent by the SMC-7 cannot be forwarded in the clockwise direction;

4-3: in the counterclockwise direction, SMC-2 completes address learning and sends/forwards a frame carrying address 0/1/2 to downstream equipment;

4-4: in the counterclockwise direction, SMC-3 completes address learning and sends/forwards a frame carrying address 0/1/2/3 to downstream equipment;

4-5: in the counterclockwise direction, SMC-4 completes address learning and sends/forwards a frame carrying address 0/1/2/3/4 to downstream equipment;

4-6: in the counterclockwise direction, the SMC-5 completes address learning and sends/forwards the frame carrying the address 0/1/2/3/4/5 to downstream equipment, but the submodule with the downstream physical position of the SMC-5 being SMC-6 cannot work normally due to faults, so that the data frame cannot be sent or forwarded. Therefore, the large-end communication port of the VBC can only receive the status information frame sent by the SMC-7, and the small-end communication port of the VBC can only receive the status information frame sent by the SMC-1/SMC-2/SMC-3/SMC-4/SMC-5. And the VBC aggregates the information, finds that the current ring lacks a state information frame of the SMC-6, and can judge that the SMC-6 is in a fault state in the communication link according to the state after the state is stably maintained for more than T3 time.

In this embodiment, the T1 time parameter is set to 100us, the T2 time parameter is set to 1ms, and the T3 time parameter is set to 10 ms. After the system is powered on, the whole address learning process can be completed within 20 ms.

The embodiment of the application also provides a computer readable storage medium, wherein a computer program is stored on the computer readable storage medium, and when the computer program is executed by a processor, the steps of the sub-module address learning method are realized.

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The above embodiments are only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited thereby, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the protection scope of the present invention.

Claims

1. A sub-module address learning method is applied to a communication network of a modular multilevel converter control system, wherein equipment in the communication network comprises a valve base controller VBC and N sub-module controllers SMC which are respectively SMC-1 to SMC-N, and N is a positive integer; the method is characterized in that:

the VBC and the SMC respectively at least comprise 2 pairs of communication ports, and the VBC and the SMC-1 to the SMC-N are sequentially connected to form two independent unidirectional ring networks; the VBC is connected with two pairs of communication ports of the ring network, wherein the communication ports are called small-end communication ports connected with SMC-1 and large-end communication ports connected with SMC-N; the communication direction from the VBC small-end communication port to the SMC-N through the SMC-1 is called a first communication direction, and the communication direction from the VBC large-end communication port to the SMC1 through the SMC-N is called a second communication direction; one of the two independent unidirectional ring networks transmits information along a first communication direction and is called a first ring network, and the other one of the two independent unidirectional ring networks transmits information along a second communication direction and is called a second ring network;

the VBC respectively sends control command frames carrying different address information from the small-end communication port and the large-end communication port;

the SMC determines the address of the sub-module according to the address information in the received frame, and sends the state information frame of the SMC and forwards the received frame downstream;

and the VBC confirms the completion condition of the sub-module address learning according to the address information in the received data frame.

2. The sub-module block address learning method of claim 1, wherein: the number N of SMCs in the ring network is predetermined, the relative position of the SMCs and the VBC in the ring network is the addresses of the SMCs, and the address range is from 1 to N.

3. The sub-module block address learning method of claim 1, wherein:

the specific steps of the VBC sending the control command frames carrying different address information from the slave end communication port and the master end communication port are:

the VBC does not transmit any received data frame, and sends a control command to the ring network from the small-end communication port along the first communication direction and sends a control command to the ring network from the large-end communication port along the second communication direction according to a preset period T1;

4. The sub-module block address learning method of claim 1, wherein: the SMC determines the sub-module address according to the address information in the received frame, and sends the state information frame of the SMC and forwards the received frame downstream, which specifically includes:

5. The sub-module block address learning method of claim 4, wherein: the SMC determines the address of the sub-module according to the address information in all the received frames, finishes the address learning of the SMC, and specifically comprises the following steps:

6. The sub-module block address learning method of claim 1, wherein: and respectively carrying out address learning on two pairs of communication ports of the SMC, if the address learning result of a certain port of the SMC is kept unchanged for more than T2(T2> T1), finishing the address learning by the SMC, and taking the address learned by the port as the address of the SMC module.

7. The sub-module block address learning method of claim 1, wherein: the VBC confirms the completion of the sub-module address learning according to the address information in the received data frame, and specifically includes:

8. The sub-module block address learning method of claim 1, wherein: the method further comprises the following steps: taking the intraframe address information received by the VBC small-end communication port as fault diagnosis information of a ring network communication link, wherein if the small-end communication port can receive a control command sent by the large-end communication port, the second ring network one-way communication link is indicated to be fault-free; otherwise, it means that there is a fault on the downstream link of the second ring network.

9. The sub-module block address learning method of claim 1, wherein: the method further comprises the following steps: taking the intraframe address information received by the VBC large-end communication port as fault diagnosis information of a ring network communication link, wherein if the large-end communication port can receive a control command sent by the small-end communication port, the first ring network one-way communication link is free of faults; otherwise, it means that there is a failure on the downstream link of the first ring network.

10. A computer-readable storage medium, having stored thereon a computer program which, when being executed by a processor, carries out the steps of the sub-module address learning method according to any one of claims 1 to 9.