CN112913339B

CN112913339B - Method for coating solder paste and mask

Info

Publication number: CN112913339B
Application number: CN201980069254.XA
Authority: CN
Inventors: 井上剑太; 浅见爱; 高木和顺; 杉浦达也
Original assignee: Senju Metal Industry Co Ltd
Current assignee: Senju Metal Industry Co Ltd
Priority date: 2018-09-05
Filing date: 2019-09-04
Publication date: 2024-08-09
Anticipated expiration: 2039-09-04
Also published as: KR20210052527A; JP7438116B2; TW202034752A; TWI833798B; CN112913339A; WO2020050330A1; JPWO2020050330A1

Abstract

The present invention provides a coating method for coating a solder paste on a coating object (B), the coating method comprising: and a step of applying solder paste to at least a part of an application region (T) located in the bonding region (P) so as to form a non-application region (N) in the bonding region (P) of the object (B), wherein the application region (T) has a plurality of peripheral regions (A1) arranged at intervals in the circumferential direction around the center (O) of the bonding region (P).

Description

Method for coating solder paste and mask

Technical Field

The present invention relates to a method of applying solder paste and a mask.

The present application claims priority based on japanese patent application No. 2018-166395, filed on 5, 9, 2018, and the contents of which are incorporated herein by reference.

Background

Conventionally, solder paste has been widely used for surface mounting (SMT: surface Mount Technology) in which electronic components such as LGA (land grid array) and BGA (ball grid array) are mounted on the surface of a printed circuit board or the like. Solder paste is produced by mixing solder powder with flux. In surface mounting, first, solder paste is applied to a surface of a printed board on which pads (electrodes) are provided. At this time, the solder paste is coated on the pads in the same coating range as the areas of the pads. Next, the electronic component is mounted on the surface of the printed board so that the land of the printed board and the land (electrode) of the electronic component face each other. At this time, the solder paste is located between the printed circuit board and the two electrodes of the electronic component. Finally, the printed board on which the electronic component is mounted is heated (reflowed) in a reflow oven, and the solder powder of the solder paste is melted and bonded to each other, and is cured again, whereby the two electrodes are electrically connected to each other, thereby completing the surface mounting. In order to ensure proper electrical connection, the resistance value of the solder connecting the two electrodes needs to be equal to or less than a predetermined value. In addition, in order to maintain proper electrical connection without breakage even when the printed board after surface mounting is subjected to impact or the like, solder is required to have a predetermined strength.

In order to apply solder paste to the surface of a printed board, screen printing using a mask as shown in patent document 1 is used, for example.

Prior art documents

Patent literature

Patent document 1: japanese patent laid-open publication No. 2001-77021

Disclosure of Invention

The solder connecting the electrodes after the reflow step may contain a so-called void. The voids are voids formed in the solder, and the voids are filled with a gas obtained by vaporizing a resin component of the flux, a solvent of the flux, or the like. If a void is formed, the resistance between the two electrodes increases, and there is a possibility that proper electrical connection cannot be ensured. In addition, the void may cause a decrease in the strength of the solder, and when an impact or the like is applied, there is a possibility that the electrical connection between the two electrodes cannot be maintained. In addition, since a relatively small void may not cause such a problem, and a void causing such a problem is a relatively large void, it is required to suppress the size of the void generated in the surface mounting field.

The present invention has been made in view of such circumstances, and an object thereof is to provide a method for applying solder paste and a mask capable of suppressing the size of a void even when the void is formed in solder during surface mounting.

In order to solve the above problems, the present invention adopts the following means.

A first aspect of the present invention provides a method of applying solder paste to an object to be applied, the method including: and a step of applying solder paste to at least a part of an application region located in the joint region, the application region having a plurality of peripheral regions arranged at intervals in a circumferential direction around a center of the joint region, so as to form a non-application region in the joint region of the application object.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged to face each other with a center of the joint region interposed therebetween.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged to extend in a direction intersecting the opposing direction of the plurality of peripheral regions.

In the first aspect of the present invention, the gaps between the plurality of peripheral regions may be 30% or more and 70% or less of the maximum diameter of the joining region.

In the first aspect of the present invention, the gap between the plurality of peripheral regions may be 85.7% or more and 200% or less of the width of each peripheral region in the opposite direction of the plurality of peripheral regions.

In the first aspect of the present invention, the number of the plurality of peripheral regions may be 2 to 6.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged at equal intervals in the circumferential direction.

In the first aspect of the present invention, the plurality of peripheral regions have first regions and second regions having different lengths in the circumferential direction, and the first regions and the second regions are alternately arranged in the circumferential direction.

In the first aspect of the present invention, the opposite sides of the plurality of peripheral regions adjacent in the circumferential direction may be parallel to each other.

In the first aspect of the present invention, the coating region may further have a central region located radially inward of the plurality of peripheral regions.

In the first aspect of the present invention, the central region and the opposite sides of each peripheral region may be parallel to each other.

In the first aspect of the present invention, the area of the central region may be 44.4% or more and 278% or less of the area of each peripheral region.

In the first aspect of the present invention, the plurality of peripheral regions may be partially connected to each other.

In the first aspect of the present invention, the circumferential width of each peripheral region may gradually increase from the center of the joint region toward the radially outer side.

In the first aspect of the present invention, the ratio of the gaps between the plurality of peripheral regions, which are open from the center of the joint region toward the radially outer side, to the entire circumference of the joint region may be 11.5% or more.

In the first aspect of the present invention, the plurality of peripheral regions may be arranged so as to overlap with an outer edge of the joint region.

In the first aspect of the present invention, the plurality of peripheral regions may be disposed in the joint region.

A second aspect of the present invention provides a method of applying solder paste to an object to be applied, the method including: and a step of applying solder paste to at least a part of an application region located in the bonding region, the application region having an extension region including the center of the bonding region and extending in one direction, so as to form a non-application region in the bonding region of the application object.

In the second aspect of the present invention, the extension region may be disposed so as to overlap with an outer edge of the joint region.

In the second aspect of the present invention, the extension region may be disposed in the joining region.

In the second aspect of the present invention, the coating region may further include a plurality of side regions arranged across the extension region in a direction intersecting the longitudinal direction of the extension region.

In the second aspect of the present invention, the extending regions and the opposite sides of the side regions may be parallel to each other.

In the second aspect of the present invention, the plurality of side regions may be arranged so as to overlap with an outer edge of the joint region.

In the second aspect of the present invention, the plurality of side regions may be disposed in the joint region.

A third aspect of the present invention provides a mask used in the solder paste application method of the first or second aspect, wherein an opening is formed at a position corresponding to the application region.

According to the aspect of the present invention, even when a void is formed in the solder during surface mounting, the size of the void can be suppressed. Therefore, it is possible to secure an appropriate electrical connection between the application object such as a substrate and the two electrodes of the electronic component, and also to prevent a decrease in strength of the solder connecting the two electrodes, and thus it is possible to provide a substrate or the like after surface mounting that is resistant to impact.

Drawings

Fig. 1 is a schematic view showing a solder printing apparatus according to an embodiment of the present invention.

Fig. 2A is a plan view of a substrate as an object to be coated according to an embodiment of the present invention.

Fig. 2B is a top view of a mask for screen printing according to one embodiment of the invention.

Fig. 3 is a schematic diagram showing the respective steps of a solder paste application method according to an embodiment of the present invention.

Fig. 4 is a schematic view showing a process subsequent to the solder paste application process in the surface mounting.

Fig. 5 is a plan view showing a coating area of the solder paste in example 1.

Fig. 6 is a plan view showing a coating area of the solder paste in example 2.

Fig. 7 is a plan view showing a coating area of the solder paste in example 3.

Fig. 8 is a plan view showing a coating area of the solder paste in example 4.

Fig. 9 is a plan view showing a coating area of the solder paste in example 5.

Fig. 10 is a plan view showing a coating area of the solder paste in example 6.

Fig. 11 is a plan view showing a coating area of the solder paste in example 7.

Fig. 12 is a plan view showing a coating area of the solder paste in example 8.

Fig. 13 is a plan view showing a coating area of solder paste in example 9.

Fig. 14 is a plan view showing a coating area of solder paste in example 10.

Fig. 15 is a plan view showing a coating area of the solder paste in example 11.

Fig. 16 is a plan view showing a coating area of solder paste in example 12.

Fig. 17 is a plan view showing a coating area of solder paste in example 13.

Fig. 18 is a plan view showing a coating area of solder paste in example 14.

Fig. 19 is a plan view showing a coating area of the solder paste in example 15.

Fig. 20 is a plan view showing a coating area of solder paste in example 16.

Fig. 21 is a plan view showing a coating area of the solder paste in example 17.

Fig. 22 is a plan view showing a coating area of solder paste in example 18.

Fig. 23 is a plan view showing a coating area of the solder paste in example 19.

Fig. 24 is a plan view showing a coating area of solder paste in example 20.

Fig. 25 is a plan view showing a coating area of the solder paste in example 21.

Fig. 26 is a plan view showing a coating region of solder paste in example 22.

Fig. 27 is a plan view showing a coating area of solder paste in example 23.

Fig. 28 is a plan view showing a coating area of solder paste in example 24.

Fig. 29 is a plan view showing a coating area of solder paste in example 25.

Fig. 30 is a plan view showing a coating area of solder paste in example 26.

Detailed Description

Next, a solder printing apparatus and a method of applying solder paste according to an embodiment of the present invention will be described with reference to the drawings.

The solder printing apparatus 1 of the present embodiment is a screen printing apparatus using a mask M. As shown in fig. 1, the solder printing apparatus 1 includes: a substrate support section 2 that supports a substrate B as a coating object of the solder paste S; a printing unit 3 disposed vertically above the substrate support unit 2; and a case 4 that houses the substrate support section 2 and the printing section 3. The mask M is held at a predetermined position in the housing 4 by a mask support portion (not shown) fixed to the housing 4 or the like.

The substrate support section 2 includes: a stage 21 for supporting the substrate B from vertically below so that the mounting surface of the substrate B faces vertically upward; and a table moving section 22 that can move the table 21 in the horizontal direction and the vertical direction and can rotate about an axis extending in the vertical direction. The table 21 is provided with a clamp member 23 for holding the substrate B. The solder printing apparatus 1 is provided with a substrate carrying section (not shown) for carrying the substrate B in and out between the substrate supporting section 2 and the outside of the housing 4.

The printing unit 3 includes: a squeegee 31 for moving the solder paste S on the surface (upper surface) of the mask M; a vertical movement device 32 capable of lifting and lowering the squeegee 31; and a horizontal moving device 33 capable of horizontally moving the vertical moving device 32. The squeegee 31 is a member for pushing away the solder paste S supplied onto the mask M by moving in the +x direction in the horizontal direction while being in contact with the surface of the mask M. The squeegee 31 is coupled to the vertical movement device 32. The squeegee 31 may be a plate member made of a single material such as metal, resin, or rubber, or a plate member made of a metal plate or the like, in which a portion contacting the mask M is covered with resin or rubber. The squeegee 31 is disposed so as to be inclined vertically downward in the-X direction opposite to the +x direction. The inclination angle of the blade 31 can also be adjusted manually or automatically.

The vertical movement device 32 is supported by a horizontal movement device 33, and is configured to include a ball screw, for example. The vertical movement device 32 can press the lower end of the squeegee 31 against the surface of the mask M with a prescribed force. The horizontal movement device 33 is fixed to the housing 4, and includes a linear guide 34 that guides the vertical movement device 32 in the horizontal direction, and a motor 35 that rotates a ball screw (not shown) provided in parallel with the linear guide 34. The horizontal moving device 33 can move the vertical moving device 32 coupled to the ball screw by a nut member in the horizontal direction by driving the motor 35. In addition, the horizontal moving device 33 moves the vertical moving device 32 in the horizontal direction in a state where the squeegee 31 is pressed downward by the vertical moving device 32, whereby the squeegee 31 can press the mask M and move in the horizontal direction. The solder printing apparatus 1 is provided with a dispenser (not shown) for supplying the solder paste S to the mask M.

The housing 4 has sufficient rigidity to support the mask support portion and the printing portion 3. The housing 4 may have a structure capable of hermetically sealing the inside thereof. In the case where the application of the solder paste S is performed under a reduced pressure atmosphere, an exhaust device such as a vacuum pump and an atmosphere opening valve may be provided in the case 4.

Fig. 2A is a top view of the substrate B, and fig. 2B is a top view of the mask M. In the present embodiment, the term "plan view" refers to a view from a direction perpendicular to the mounting surface of the substrate B and the upper surface of the mask M.

As shown in fig. 2A, in the present embodiment, the substrate B to which the solder paste S is applied is a printed board composed of a hard plate-like base material, and a plurality of pads P (electrodes, bonding areas) are arranged on at least one surface of the printed board. The surface of the one surface is a mounting surface on which an electronic component E described later is mounted. The material of the pad P may be copper, gold, silver, or the like. A solder resist having a property of repelling molten solder is coated on the mounting surface of the substrate B in the region other than the plurality of pads P.

As shown in fig. 2B, the mask M used in the present embodiment is made of a metal plate such as stainless steel, and has a plurality of openings H penetrating in the thickness direction. The thickness of the mask M is, for example, 30 μm to 200 μm, but may be appropriately changed depending on the degree of the thickness of the solder paste S applied on the substrate B. In the conventional screen printing mask, an opening is formed in a region equivalent to a pad of a substrate at a position facing the pad, but the opening H of the present embodiment has a different plan view shape from the pad P of the substrate B. That is, the mask M of the present embodiment has an opening H for applying the solder paste S to at least a part of the application region located in the pad P so as to form a non-application region in the pad P of the substrate B. In other words, the openings H are formed in the same shape at positions corresponding to the application regions. The shape of the opening H of the mask M of the present embodiment, that is, the shape of the application region of the solder paste S applied on the substrate B is described in detail in examples 1 to 26 described later. In the mask M shown in fig. 2B, two rectangular openings H are formed for one pad P, and these openings H are arranged to face each other across the center of the pad P.

The solder paste S used in the present embodiment is not particularly limited, and may be appropriately selected according to the application atmosphere, temperature, opening size and shape of the mask M, and the like. As described above, the solder paste is made by mixing the solder powder with the flux. As the solder powder, copper, tin, silver, an alloy thereof, or the like is used, and the shape of the solder powder may be any of spherical shape and amorphous shape. The flux contains, for example, a resin such as rosin, a solvent for adjusting viscosity and the like, an active agent for cleaning the surface of the electrode, and a thixotropic agent for adjusting viscosity, adhesion, thixotropic property and the like, and the content thereof can be appropriately adjusted depending on the manner of use.

Next, a method of applying the solder paste S using the solder printing apparatus 1 according to the present embodiment will be described with reference to fig. 3. In fig. 3, the structure of the solder printing apparatus 1 other than the squeegee 31 is omitted.

The substrate B is placed on the table 21 by the substrate conveying section, and is held on the table 21 by the clamping member 23. Next, the horizontal position of the substrate B with respect to the fixed mask M and the rotational position about the axis extending in the vertical direction are adjusted by the operation of the stage moving section 22, and then the stage moving section 22 raises the stage 21 from the state shown in fig. 3 (a) to bring the upper surface (mounting surface) of the substrate B into close contact with the lower surface of the mask M as shown in fig. 3 (B). At this time, since the adjustment of the horizontal position and the rotational position of the substrate B by the stage moving section 22 is completed, the opening H of the mask M is disposed at an appropriate position with respect to the pad P of the substrate B. That is, when the surface of the substrate B on which the pads P are provided is in contact with the mask M, the opening H is formed in the mask M at a position corresponding to (opposite to) the region (application region) where the solder paste S is applied on the substrate B.

Next, as shown in fig. 3 (c), the solder paste S is supplied onto the mask M of the travel target of the squeegee 31, that is, to the +x side of the squeegee 31 by the dispenser. Further, the squeegee 31 is lowered by driving the vertical movement device 32, and the mask M is pressed downward with a predetermined force. In this state, the horizontal movement device 33 moves the vertical movement device 32 in the +x direction, and thereby the squeegee 31 moves in the +x direction while pressing the mask M. The solder paste S is supplied to the position of the travel destination of the squeegee 31, and therefore the solder paste S moves in the +x direction with the movement of the squeegee 31. In addition, since the squeegee 31 is inclined as described above, the solder paste S is applied with a force directed vertically downward as the squeegee 31 moves. Accordingly, as shown in fig. 3 (d), the solder paste S is pressed into and fills the opening H of the mask M, and contacts the upper surface (mounting surface) of the substrate B. Further, since the squeegee 31 moves in the +x direction while pressing the mask M downward, the solder paste S can be scraped off the upper surface of the mask M other than the opening H and moved, and thus the solder paste S can be supplied only to the opening H. When the horizontal movement of the squeegee 31 by the horizontal movement means 33 is completed, as shown in fig. 3 (e), the filling of the solder paste S into the plurality of openings H of the mask M is completed.

Next, as shown in fig. 3 (f), the stage 21 is lowered by the stage moving unit 22, so that the substrate B is separated downward from the lower surface of the mask M. At this time, since the solder paste S filled in the opening H adheres to the upper surface of the substrate B, the solder paste S is also separated from the mask M, whereby the solder paste S is printed on the mounting surface of the substrate B in a pattern corresponding to the opening H of the mask M. Since the opening H of the mask M has the shape shown in fig. 2B, the method of applying solder paste according to the present embodiment includes a step of applying the solder paste S to at least a part of the application region located in the pad P so as to form a non-application region in the pad P of the substrate B. The substrate B is separated from the lower surface of the mask M, and the solder paste S is printed on the substrate B, whereby the application process of the solder paste of the present embodiment is completed. The substrate B coated with the solder paste S is carried out of the solder printing apparatus 1 by the substrate carrying section.

Next, a process following the solder paste application process of the present embodiment in surface mounting will be described with reference to fig. 4.

First, as shown in fig. 4 (a), an electronic component E is mounted on the mounting surface of the board B coated with the solder paste S. The electronic component E may be an LGA, BGA. A plurality of lands L (electrodes) are provided on the bottom surface (surface facing the substrate B) of the electronic component E so as to correspond to the plurality of pads P of the substrate B. In the step shown in fig. 4 (a), the electronic component E is mounted on the substrate B such that the land P of the substrate B and the land L of the electronic component E face each other. At this time, the solder paste S is located between the pads P of the substrate B and the lands L of the electronic component E.

Next, as shown in fig. 4B, the substrate B on which the electronic component E is mounted is heated in a reflow furnace (not shown), and the solder powder in the solder paste S is melted and bonded to each other, so that the melted solder contacts both electrodes of the substrate B and the electronic component E. At this time, the wettability of the molten solder to the pad P is improved by the action of the flux contained in the solder paste S, and the solder resist that repels the molten solder is applied to the surface of the substrate B other than the pad P, so that the molten solder flows radially inward of the pad P. That is, even when the solder paste S is applied to two regions as in the present embodiment, the solders contained in the two regions are integrated in the reflow process. Then, the molten solder is cooled and solidified, whereby the solder S1 electrically connects the two electrodes of the substrate B and the electronic component E. Through the above steps, the surface mounting of the electronic component E on the substrate B is completed.

Next, a plurality of specific examples of the solder paste application method of the present embodiment will be described with reference to the drawings. In addition, for comparison with these examples, comparative examples corresponding to conventional coating methods were also examined.

In examples 1 to 26 below, the application regions of the solder paste will be described with reference to fig. 5 to 30 showing plan views of the mounting surface of the substrate B, each plan view being an enlarged view of 1 pad P of the substrate B as a bonding region. In each embodiment, the top view shape of the pad P is a circular shape having a diameter of 1.0 mm. In the following description, a direction intersecting an axis passing through the center of the pad P and orthogonal to the mounting surface of the substrate B is referred to as a radial direction, and a direction around the axis is referred to as a circumferential direction. For convenience, the vertical direction of the drawing is sometimes referred to as "vertical direction" and the horizontal direction of the drawing is sometimes referred to as "horizontal direction".

In these examples and comparative examples, the gap ratio GR, the coating area ratio AR, and the maximum void area ratio VR described below were confirmed.

The gap ratio GR is a ratio of gaps between a plurality of peripheral areas A1, which will be described later, that open from the center of the pad P toward the radial outside with respect to the entire circumference of the pad P. In other words, if two straight lines are drawn, which extend from the center of the pad P to the radially outer side, and any adjacent area A1 is not included therebetween, the ratio of the angle between the two straight lines to 360 ° is defined as the gap ratio GR. When two straight lines excluding the peripheral region A1 therebetween depict a plurality of pairs, a ratio of a sum of angles between the two straight lines of each pair to 360 ° is set as a gap ratio GR. In addition, the existence of a central area A2 described later is not considered in the calculation of the gap ratio GR.

The application area ratio AR refers to the ratio of the entire application area of the solder paste applied to one pad P to the area of the pad P. The circumference ratio pi is 3.14.

When the maximum void area ratio VR was confirmed, 2 test substrates were prepared in which 36 pads P were arranged in each example, and soldering was performed with electronic components having the same number of lands, respectively, to obtain soldering samples in which 72 pads P were counted in each example. In this soldering, the surface mounting method shown in fig. 3 and 4 is used. The ratio of the area of the generated void (area in a plan view) to the area of one pad P (hereinafter referred to as void area ratio) was calculated for each of the 72 pads P, and the largest void area ratio was defined as the "largest void area ratio" in each example. The land of the electronic component has the same shape as the land P in plan view.

Comparative example

The comparative example used a conventional structure in which solder paste was applied to a pad P having a diameter of 1.0mm in the same region as the pad P. This comparative example is denoted by "Ref" in table 1 shown later. In this comparative example, since there are no plurality of peripheral regions, the gap ratio GR cannot be calculated, and the coating area ratio AR is 100%. The maximum void area ratio VR was 43.5%.

Example 1

The application area of the solder paste in embodiment 1 is described with reference to fig. 5.

In embodiment 1, the solder paste is applied to at least a part of the application region T located in the pad P so that the non-application region N is formed in the pad P of the substrate B. In fig. 5, a mesh is marked in the area to which the solder paste is applied (the same applies to other fig. 6 to 30). The coating region T has a plurality of (two) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P. Each peripheral region A1 has a rectangular shape extending in one direction, and has a length in the longitudinal direction of 0.7mm and a width in the width direction orthogonal to the longitudinal direction of 0.35mm.

The plurality of peripheral areas A1 are disposed opposite to each other with the center O of the pad P interposed therebetween.

The plurality of peripheral areas A1 are arranged to extend in a direction perpendicular to the opposing direction (the up-down direction of the paper surface in fig. 5) of the plurality of peripheral areas A1. That is, each peripheral area A1 extends in the left-right direction of the paper surface. The plurality of peripheral areas A1 may be arranged to extend in a direction intersecting the opposing direction.

The size of the gap between the plurality of peripheral areas A1 (the gap in the opposite direction) is 0.7mm. Therefore, the gap between the plurality of peripheral areas A1 is 70% of the maximum diameter (1.0 mm) of the pad P, and 200% of the width of each peripheral area A1 in the opposite direction.

The plurality of peripheral areas A1 are arranged at equal intervals in the circumferential direction. The plurality of peripheral areas A1 may not be arranged at equal intervals in the circumferential direction.

The opposite sides a, b of the plurality of peripheral areas A1 are parallel to each other. The opposite sides a, b may not be parallel to each other.

The plurality of peripheral areas A1 are arranged to overlap the outer edge of the pad P. That is, a part of each peripheral region A1 is located radially outward of the pad P. In addition, the plurality of peripheral areas A1 may be all arranged in the pad P.

In the case where the coating region T of the present embodiment is divided into four regions by two straight lines extending in the up-down direction and the left-right direction through the center O, for example, a region between a straight line L1 extending from the center O to the right side of the paper surface and a straight line L2 extending from the center O to the upper side of the paper surface is identical to or mirror image of the other three regions, and therefore, a ratio of the angle θ _G to 90 ° between the straight lines L1, L2 is taken as the gap ratio GR of the present embodiment. The angle θ _G is an angle between the straight line L1 and a straight line L3 extending radially outward from the center O and tangent to the vertex of the lower right side of the peripheral area A1 on the upper side of the paper. The peripheral area A1 is not disposed between the straight lines L1, L3. Therefore, the gap ratio GR of the present embodiment is (arctan (0.35/0.35)/90 °) =50%.

The coating area ratio AR of this example was (0.7×0.35×2)/(0.5 ² ×pi) =62.4%.

The maximum void area ratio of this example was 2.3%.

Example 2

The application area of the solder paste in embodiment 2 is described with reference to fig. 6. In example 2, only the structure different from that of example 1 will be described below, and the description of other structures will be omitted.

The size of the gap between the plurality of peripheral areas A1 (the gap in the opposite direction) is 0.3mm. Therefore, the gap between the plurality of peripheral areas A1 is 30% of the maximum diameter (1.0 mm) of the pad P, and is 85.7% of the width of each peripheral area A1 in the opposite direction.

The gap ratio GR of the present embodiment is (arctan (0.15/0.35)/90 °) =25.8%.

The maximum void area ratio of this example was 13.8%.

Example 3

The application area of the solder paste in embodiment 3 is described with reference to fig. 7. In embodiment 3, only the structure different from that of embodiment 1 described above will be described below, and the description of other structures will be omitted.

The size of the gap between the plurality of peripheral areas A1 (the gap in the opposite direction) is 0.4mm. Therefore, the gap between the plurality of peripheral areas A1 is 40% of the maximum diameter (1.0 mm) of the pad P, and 114% of the width of each peripheral area A1 in the opposite direction.

The gap ratio GR of the present embodiment is (arctan (0.2/0.35)/90 °) =33%.

The maximum void area ratio of this example was 11.7%.

Example 4

The application area of the solder paste in embodiment 4 is described with reference to fig. 8. In embodiment 4, only the structure different from that of embodiment 1 described above will be described below, and the description of other structures will be omitted.

The size of the gap between the plurality of peripheral areas A1 (the gap in the opposite direction) is 0.5mm. Therefore, the gap between the plurality of peripheral areas A1 is 50% of the maximum diameter (1.0 mm) of the pad P, and 143% of the width of each peripheral area A1 in the opposite direction.

The gap ratio GR of the present embodiment is (arctan (0.25/0.35)/90 °) =39.5%.

The maximum void area ratio of this example was 7.0%.

Example 5

The application area of the solder paste in embodiment 5 is described with reference to fig. 9. In embodiment 5, only the structure different from that of embodiment 1 described above will be described below, and the description of other structures will be omitted.

The size of the gap between the plurality of peripheral areas A1 (the gap in the opposite direction) is 0.6mm. Therefore, the gap between the plurality of peripheral areas A1 is 60% of the maximum diameter (1.0 mm) of the pad P, and 171% of the width of each peripheral area A1 in the opposite direction.

The gap ratio GR of the present embodiment is (arctan (0.3/0.35)/90 °) =45.1%.

The maximum void area ratio of this example was 4.2%.

Investigation of examples 1 to 5

The maximum void area ratio VR of examples 1 to 5 is lower than that of comparative examples. Therefore, it can be seen that the size of the generated void can be suppressed in any of examples 1 to 5.

The reason why the void size can be suppressed is examined below. When the molten solder powders are bonded to each other in the reflow step, a resin component of the flux or the like between the solder powders before melting is extruded to the outside by the bonding of the molten solder. However, if the application area of the solder paste is large, it is considered that the solder cools and solidifies before the resin component is discharged from the solder, and therefore the resin component remains in the solder (i.e., voids). On the other hand, in examples 1 to 5, the width of each peripheral area A1 was 0.35mm, which was significantly smaller than the maximum diameter (1.0 mm) of the pad P. Therefore, it is considered that, when the resin component of the flux or the like moves in the width direction of the peripheral region A1, the flux is discharged from the molten solder earlier, and therefore the size of the void is suppressed in each peripheral region A1 as compared with the comparative example.

As shown in fig. 4, the solder powder applied to the solder paste in the two areas is also integrated in the reflow process. That is, the solder powder melted in the two peripheral regions A1 flows toward the center O of the pad P, and is connected to each other in the vicinity of the center of the pad P. Since the flow of the molten solder toward the radially inner side is maintained, the joint portion of the molten solder flowing from the two regions expands toward the radially outer side. Since the connecting portion expands radially outward, a force is generated that causes the resin component of the flux and the like to be radially outward, and the resin component can be discharged to the outside of the solder by the force.

In examples 1 to 5, the gaps between the plurality of peripheral regions A1 were 30% to 70% of the maximum diameter (1.0 mm) of the pad P.

The gaps between the peripheral regions A1 are 85.7% to 200% of the width of each peripheral region A1 in the direction opposite to the peripheral regions A1.

(Modification of examples 1 to 5)

Examples 1 to 5 can be considered as modifications below.

Each peripheral area A1 is rectangular in plan view, but may be elliptical or oblong in plan view. The opposite sides a, b of the plurality of peripheral areas A1 are formed in a straight line, but these opposite sides may be bulged toward the radial inner side, or may be recessed toward the radial outer side. Similarly, the radially outer side of the peripheral region A1 may be recessed radially inward or bulged radially outward.

Example 6

The application area of the solder paste in embodiment 6 is described with reference to fig. 10.

In example 6, the solder paste was applied to at least a part of the application region T located in the pad P so that the non-application region N was formed in the pad P of the substrate B. The coating region T has a plurality of (6) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is square with a side length of 0.3 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 10.

The plurality of peripheral areas A1 are arranged at substantially equal intervals in the circumferential direction. The plurality of peripheral areas A1 may not be arranged at equal intervals in the circumferential direction.

The opposite sides a, b of the plurality of peripheral areas A1 adjacent in the circumferential direction are parallel to each other. The opposite sides a, b may not be parallel to each other.

The central area A2 and the opposite sides c, d of each peripheral area A1 are parallel to each other. The opposite sides c, d may not be parallel to each other.

The area of the central area A2 is the same as (100%) of the area of each peripheral area A1.

In the case where the coating region T of the present embodiment is divided into four regions by two straight lines extending in the up-down direction and the left-right direction through the center O, for example, a region between a straight line L1 extending from the center O to the right side of the paper surface and a straight line L2 extending from the center O to the upper side of the paper surface is identical to or mirror image of the other three regions, and therefore, a ratio of 90 ° of the sum of the angle θ _G1 and the angle θ _G2 relative to the straight lines L1, L2 is taken as the gap ratio GR of the present embodiment. The angle θ _G1 is an angle between a straight line L1 and a straight line L3 extending radially outward from the center O and tangent to the vertex of the lower right of the peripheral area A1 on the right of the paper surface, and is expressed by arctan (0.1/0.65). The angle θ _G2 is an angle between a straight line L4 extending from the center O to the radially outer side and tangent to the top left vertex of the peripheral area A1 on the upper side of the paper surface and a straight line L5 extending from the center O to the radially outer side and tangent to the bottom right vertex of the peripheral area A1 on the upper side of the paper surface, and is expressed by (arctan (0.35/0.15) -arctan (0.4/0.35)). Therefore, the gap ratio GR of the present embodiment is (θ _G1+θ_G2)/90 ° =29.7%.

The coating area ratio AR of this example was (0.3 ²×7)/(0.5² ×pi) =80.3%.

The maximum void area ratio of this example was 4.8%.

Example 7

The application area of the solder paste in embodiment 7 is described with reference to fig. 11. In embodiment 7, only the structure different from embodiment 6 described above will be described below, and the description of other structures will be omitted.

The central area A2 is a square with a side length of 0.4 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 11.

The area of the central area A2 is 178% of the area of each peripheral area A1 (=0.4 ²/0.3²).

The gap ratio GR in this example was 29.7% in the same manner as in example 6.

The coating area ratio AR of this example was (0.3 ²×6+0.4²)/(0.5² ×pi) =89.2%.

The maximum void area ratio of this example was 3.9%.

Example 8

The application area of the solder paste in embodiment 8 is described with reference to fig. 12. In embodiment 8, only the structure different from embodiment 6 described above will be described below, and the description of other structures will be omitted.

The central area A2 is a square with a side length of 0.5 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 12.

The area of the central area A2 is 278% of the area of each peripheral area A1 (=0.5 ²/0.3²).

The gap ratio GR in this example was 29.7% in the same manner as in example 6.

The coating area ratio AR of this example was (0.3 ²×6+0.5²)/(0.5² ×pi) =100.6%.

The maximum void area ratio of this example was 13.9%.

Example 9

The application area of the solder paste in embodiment 9 is described with reference to fig. 13. In embodiment 9, only the structure different from that of embodiment 6 described above will be described below, and the description of other structures will be omitted.

The central area A2 is a square with a side length of 0.2 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 13.

The area of the central area A2 is 44.4% of the area of each peripheral area A1 (=0.2 ²/0.3²).

The gap ratio GR in this example was 29.7% in the same manner as in example 6.

The coating area ratio AR of this example was (0.3 ²×6+0.2²)/(0.5² ×pi) =73.9%.

The maximum void area ratio of this example was 12.3%.

Example 10

The application area of the solder paste in embodiment 10 is described with reference to fig. 14. In embodiment 10, only the structure different from that of embodiment 6 described above will be described below, and the description of other structures will be omitted.

The coating region T has a plurality of (2) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is square with a side length of 0.3 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 14.

The central area A2 and the opposite sides a, b of each peripheral area A1 are parallel to each other. The opposite sides a, b may not be parallel to each other.

In the case where the coating region T of the present embodiment is divided into four regions by two straight lines extending in the up-down direction and the left-right direction through the center O, for example, a region between a straight line L1 extending from the center O to the right side of the paper surface and a straight line L2 extending from the center O to the upper side of the paper surface is identical to or mirror image of the other three regions, and therefore, a ratio of the angle θ _G to 90 ° between the straight lines L1, L2 is taken as the gap ratio GR of the present embodiment. The angle θ _G is an angle between the straight line L1 and a straight line L3 extending radially outward from the center O and tangent to the vertex of the lower right of the peripheral area A1 on the upper side of the paper. The peripheral area A1 is not disposed between the straight lines L1, L3. Therefore, the gap ratio GR of the present embodiment is (arctan (0.35/0.15)/90 °) =74.2%.

The coating area ratio AR of this example was (0.3 ²×3)/(0.5² ×pi) =34.4%.

The maximum void area ratio of this example was 3.1%.

Example 11

The application area of the solder paste in embodiment 11 is described with reference to fig. 15. In embodiment 11, only the structure different from that of embodiment 6 described above will be described below, and the description of other structures will be omitted.

The coating region T has a plurality of (3) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 15.

In the case where the coating region T of the present embodiment is divided into 2 by a straight line passing through the center O and extending in the up-down direction, since the region on the right side of the straight line is a mirror image of the region on the left side, the ratio of the sum of the angles θ _G1、θ_G2 and θ _G3 to 180 ° between the straight line L1 extending upward from the center O and the straight line L2 extending downward from the center O is taken as the gap ratio GR of the present embodiment. The angle θ _G1 is an angle between a straight line L3 extending from the center O to the right side of the paper and a straight line L4 extending from the center O to the radial outside and tangent to the vertex of the lower right side of the peripheral area A1 on the upper side of the paper, and is expressed by arctan (0.35/0.15). The angle θ _G2 is an angle between the straight line L2 and a straight line L5 extending radially outward from the center O and tangent to the vertex of the lower left of the peripheral area A1 at the lower right of the paper surface, and is expressed by (90 ° -arctan (0.45/0.35)). The angle θ _G3 is an angle between a straight line L3 and a straight line L6 extending radially outward from the center O and tangent to the upper right vertex of the peripheral area A1 at the lower right of the paper surface, and is represented by arctan (0.15/0.65). Therefore, the gap ratio GR of the present embodiment is (θ _G1+θ_G2+θ_G3)/90 ° =65.4%.

The coating area ratio AR of this example was (0.3 ²×4)/(0.5² ×pi) =45.9%.

The maximum void area ratio of this example was 4.0%.

Example 12

The application area of the solder paste in embodiment 12 is described with reference to fig. 16. In embodiment 12, only the structure different from embodiment 6 described above will be described below, and the description of other structures will be omitted.

The coating region T has a plurality of (4) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is square with a side length of 0.3 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 16.

In the case where the coating region T of the present embodiment is divided into four regions by two straight lines extending in the up-down direction and the left-right direction through the center O, for example, a region between a straight line L1 extending from the center O to the right side of the paper surface and a straight line L2 extending from the center O to the upper side of the paper surface is identical to or mirror image of the other three regions, and therefore, a ratio of the angle θ _G to 90 ° between the straight lines L1, L2 is taken as the gap ratio GR of the present embodiment. The angle θ _G is an angle between a straight line L3 extending radially outward from the center O and tangent to the top left vertex of the peripheral area A1 on the right side of the paper and a straight line L4 extending radially outward from the center O and tangent to the bottom right vertex of the peripheral area A1 on the upper side of the paper. The peripheral area A1 is not disposed between the straight lines L3, L4. Therefore, the gap ratio GR of the present embodiment is (arctan (0.35/0.15) -arctan (0.15/0.35))=48.4%.

The coating area ratio AR of this example was (0.3 ²×5)/(0.5² ×pi) =57.1%.

The maximum void area ratio of this example was 2.6%.

Example 13

The application area of the solder paste in embodiment 13 is described with reference to fig. 17. In example 13, only the structure different from that of example 6 is described below, and the description of other structures is omitted.

The coating region T has a plurality of (4) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. The plurality of peripheral regions A1 include first regions a11 and second regions a12 having different lengths in the circumferential direction, and the first regions a11 and the second regions a12 are alternately arranged in the circumferential direction. The first area a11 and the second area a12 are each provided with two. The 1 st region a11 is a rectangle extending in one direction, and has a length of 0.6mm in the longitudinal direction and a width of 0.3mm in the width direction orthogonal to the longitudinal direction. The 2 nd area a12 and the central area A2 are each square with a side length of 0.3mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship among the 1 st areas a11, 2 nd areas a12 and the central area A2 is shown in fig. 17.

The gap ratio GR in this example was calculated as (arctan (0.35/0.15) -arctan (0.3/0.35))=29.1% in the same manner as in example 12.

The coating area ratio AR of this example was (0.6x0.3x2+0. ²×3)/(0.5² x pi) =34.6%.

The maximum void area ratio of this example was 1.8%.

Example 14

The application area of the solder paste in embodiment 14 is described with reference to fig. 18. In example 14, only the structure different from that of example 6 is described below, and the description of other structures is omitted.

The coating region T has a plurality of (6) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is square with a side length of 0.3 mm. However, a portion radially outward from the outer edge of the pad P in the peripheral region A1 is excluded. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 18.

The gap ratio GR of this example was calculated by the same method as in example 6 described above, but the angle θ _G1 was represented by arcsin (0.05/0.5), so the gap ratio GR was (θ _G1+θ_G2)/90 ° =11.5%.

The coating area ratio AR of the present embodiment is about 43%.

The maximum void area ratio of this example was 13.8%.

Investigation of examples 6 to 14

The maximum void area ratio VR of examples 6 to 14 was all lower than that of comparative example. Therefore, it can be seen that the size of the generated void can be suppressed in any of examples 6 to 14.

The reason why the void size can be suppressed is examined below. First, since the peripheral area A1 and the central area A2 are smaller than the coating area of the comparative example, the resin component of the flux and the like are easily discharged from the molten solder at an early stage, as in examples 1 to 5.

In examples 6 to 14, all of the solder powder was melted and flowed radially outward in the solder paste applied to the central area A2, although the central area A2 was provided. Further, it is apparent that in any of embodiments 6 to 14, the gaps between the plurality of peripheral regions A1 that open radially outward from the center O of the pad P are opened radially outward from the center O with the gap G therebetween by calculating the ratio of the gaps to the entire circumference of the pad P as the gap ratio GR. Accordingly, it is considered that the molten solder from the central region A2 can flow radially outward appropriately by the gap G, and thus the resin component of the flux and the like can be discharged radially outward.

In examples 6 to 14, the area of the central region A2 was 44.4% or more and 278% or less of the area of each peripheral region A1.

Example 15

The application area of the solder paste in embodiment 15 is described with reference to fig. 19. In embodiment 15, only the structure different from that of embodiment 12 described above will be described below, and the description of other structures will be omitted.

Embodiment 15 has a structure obtained by excluding the center area A2 from embodiment 12.

The gap ratio GR in this example was 48.4% in the same manner as in example 12.

The coating area ratio AR of this example was (0.3 ²×4)/(0.5² ×pi) =45.7%.

The maximum void area ratio of this example was 13.4%.

Example 16

The application area of the solder paste in embodiment 16 is described with reference to fig. 20. In example 16, only the structure different from that of example 13 is described below, and the description of other structures is omitted.

Embodiment 16 has a structure obtained by excluding the center area A2 from embodiment 13.

The gap ratio GR in this example was 29.1% in the same manner as in example 13.

The coating area ratio AR of this example was (0.6x0.3x2+0. ²×2)/(0.5² x pi) =23.2%.

The maximum void area ratio of this example was 13.8%.

Investigation of examples 15 and 16

The maximum void area ratio VR of examples 15 and 16 was lower than that of comparative example. Therefore, it is understood that the sizes of the voids generated in examples 15 and 16 can be suppressed.

In the following, when the reason why the size of the void can be suppressed is examined, it is considered that the peripheral area A1 or the central area A2 is smaller than the coating area of the comparative example, and therefore the resin component of the flux and the like are easily discharged from the molten solder at an early stage, as in examples 1 to 5.

Example 17

The application area of the solder paste in embodiment 17 is described with reference to fig. 21. In example 17, only the structure different from that of example 6 is described below, and the description of other structures is omitted.

The coating region T has a plurality of (6) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is circular with a diameter of 0.3 mm. The center of each peripheral area A1 is located on the outer periphery of the pad P. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 21.

The gap ratio GR of the present embodiment is calculated. The angle θ _C is an angle between a straight line L1 extending from the center O to the radially outer side and passing through the center of the peripheral region A1 on the right of the paper surface and a straight line L2 extending from the center O to the radially outer side and tangential to the peripheral region A1 on the right of the paper surface, and is expressed by arcsin (0.15/0.5). The peripheral area A1 is located between the straight lines L1, L2. Therefore, the gap ratio GR of the present embodiment is (180 ° -6×θ _C)/180 ° =41.8%.

The coating area ratio AR of this example was (0.15 ²×π×7)/(0.5² ×pi) =63%.

The maximum void area ratio of this example was 10.9%.

Example 18

The application area of the solder paste in embodiment 18 is described with reference to fig. 22. In example 18, only the structure different from that of example 17 is described below, and the description of other structures is omitted.

The central area A2 is circular with a diameter of 0.4 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 22.

The area of the central area A2 is 178% of the area of each peripheral area A1.

The gap ratio GR in this example was 41.8% in the same manner as in example 17.

The coating area ratio AR of this example was (0.15 ²×π×6+0.2²×π)/(0.5² ×pi) =43.1%.

The maximum void area ratio of this example was 4.6%.

Example 19

The application area of the solder paste in embodiment 19 is described with reference to fig. 23. In example 19, only the structure different from that of example 17 is described below, and the description of other structures is omitted.

The central area A2 is circular with a diameter of 0.5 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 23.

The area of the central area A2 is 278% of the area of each peripheral area A1.

The gap ratio GR in this example was 41.8% in the same manner as in example 17.

The coating area ratio AR of the present example was (0.15 ²×π×6+0.25²×π)/(0.5² ×pi) =48.7%.

The maximum void area ratio of this example was 12.4%.

Example 20

The application area of the solder paste in embodiment 20 is described with reference to fig. 24. In embodiment 20, only the structure different from that of embodiment 17 is described below, and the description of other structures is omitted.

The central area A2 is circular with a diameter of 0.2 mm. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 24.

The area of the central area A2 was 44.4% of the area of each peripheral area A1.

The gap ratio GR in this example was 41.8% in the same manner as in example 17.

The coating area ratio AR of this example was (0.15 ²×π×6+0.1²×π)/(0.5² ×pi) =35.7%.

The maximum void area ratio of this example was 17.8%.

Example 21

The application area of the solder paste in embodiment 21 will be described with reference to fig. 25. In example 21, only the structure different from that of example 6 is described below, and the description of other structures is omitted.

The coating region T has a plurality of (2) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is circular with a diameter of 0.3 mm. The center of each peripheral area A1 is located on the outer periphery of the pad P. The central area A2 is configured such that its center coincides with the center O of the pad P in plan view. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 25.

The gap ratio GR of this example is (180 ° -2×θ _C)/180 ° =80.6% with reference to the above-described example 17.

The coating area ratio AR of this example was (0.15 ²×π×3)/(0.5² ×pi) =27%.

The maximum void area ratio of this example was 3.8%.

Example 22

The application area of the solder paste in embodiment 22 is described with reference to fig. 26. In example 22, only the structure different from that of example 6 is described below, and the description of other structures is omitted.

The coating region T has a plurality of (4) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P, and a central region A2 located radially inward of the plurality of peripheral regions A1. Each of the peripheral area A1 and the central area A2 is circular with a diameter of 0.3 mm. The positional relationship between the plurality of peripheral areas A1 and the central area A2 is shown in fig. 26.

The gap ratio GR of this example is (180 ° -4×θ _C)/180 ° =61.2% with reference to the above-described example 17.

The coating area ratio AR of this example was (0.15 ²×π×5)/(0.5² ×pi) =45%.

The maximum void area ratio of this example was 4.9%.

Investigation of examples 17 to 22

The maximum void area ratio VR of examples 17 to 22 was all lower than that of comparative example. Therefore, it was found that the size of the generated void could be suppressed in any of examples 17 to 22.

In examples 17 to 22, all of the solder powder was melted and flowed radially outward in the solder paste applied to the central area A2, although the central area A2 was provided. Further, it is apparent that in any of examples 17 to 22, the gaps between the plurality of peripheral regions A1 that open radially outward from the center O of the pad P are opened radially outward from the center O with the gap G therebetween by calculating the ratio of the gaps to the entire circumference of the pad P as the gap ratio GR. Accordingly, it is considered that the molten solder from the central region A2 can flow radially outward appropriately by the gap G, and thus the resin component of the flux and the like can be discharged radially outward.

In examples 17 to 22, the area of the central region A2 was 44.4% or more and 278% or less of the area of each peripheral region A1.

Example 23

The application area of the solder paste in example 23 is described with reference to fig. 27.

In example 23, the solder paste was applied to at least a part of the application region T located in the pad P so as to form the non-application region N in the pad P of the substrate B. The coating region T has a plurality of (two) peripheral regions A1 arranged at intervals G in the circumferential direction around the center O of the pad P. The two peripheral areas A1 are disposed so as to be connected to each other at a part of the radially inner side. In the present embodiment, the connection portion of the two peripheral areas A1 is arranged at the same position as the center O in a plan view. The shape of each peripheral area A1 is an isosceles right triangle with a vertex at the center O and a vertex angle of 90 degrees. The length of the bottom side (side opposite to the vertex) of each peripheral area A1 is 1.0mm. The distance between the bottom edges of the two peripheral areas A1 was also 1.0mm. The width of each peripheral region A1 in the circumferential direction gradually increases from the center O of the pad P toward the radially outer side.

The gap ratio GR in this example was 50%.

The coating area ratio AR of this example was (1.0 ²/2)/(0.5² ×pi) =63.7%.

The maximum void area ratio of this example was 12.5%.

Example 24

The application area of the solder paste in embodiment 24 is described with reference to fig. 28. In example 24, only the structure different from that of example 23 is described below, and the description of other structures is omitted.

The length of the bottom edge of each peripheral area A1 was 1.3mm. The distance between the bottom edges of the two peripheral areas A1 was also 1.3mm.

The coating area ratio AR of this example was (1.3 ²/2)/(0.5² ×pi) =107.6%.

The maximum void area ratio of this example was 14.6%.

Investigation of examples 23 and 24

The maximum void area ratio VR of examples 23 and 24 was lower than that of comparative example. Therefore, it is found that the size of the generated void can be suppressed in each of examples 23 and 24.

The reason why the void size can be suppressed is examined below. First, since the peripheral area A1 is smaller than the coating area of the comparative example, the resin component of the flux and the like are easily discharged from the molten solder at an early stage, as in examples 1 to 5.

Further, examples 23, 24 did not have a central region, but the radially inner portion of the peripheral region A1 reached the central portion of the pad P. Therefore, the solder powder in the solder paste applied to the radially inner portion of the peripheral area A1 flows in the left-right direction of the paper surface toward the radially outer side after melting. Further, it is understood that both of examples 23 and 24 are open from the center O to the radial outside with the gap G therebetween, by calculation as the gap ratio GR. Accordingly, it is considered that the molten solder from the radially inner portion of the peripheral region A1 can flow radially outward appropriately by the gap G, and thereby the resin component of the flux and the like can be discharged radially outward.

(Modified examples of examples 23 and 24)

Examples 23 and 24 can be considered as modifications described below.

In these embodiments, two peripheral areas A1 are provided, but the number of peripheral areas A1 may be 3 or more. In this case, the ratio of the circumferential width of each peripheral region A1 may be reduced as it increases radially outward. The connection portion between the two peripheral regions A1 may be disposed at a position different from the center O of the pad P in plan view.

Example 25

The application area of the solder paste in embodiment 25 is described with reference to fig. 29.

In example 25, the solder paste was applied to at least a part of the application region T located in the pad P so as to form the non-application region N in the pad P of the substrate B. The coating region T has an extension region A3 including the center O of the pad P and extending in one direction (in the present embodiment, the left-right direction of the paper surface). The extension area A3 has a rectangular planar shape, a length in the longitudinal direction of 1.3mm, and a width in the width direction of 0.3mm.

The extension region A3 is disposed so as to overlap with the outer edge of the pad P. That is, a part of the extension region A3 is located radially outside the pad P. In the present embodiment, both longitudinal end portions of the extension region A3 are located radially outward of the pad P. The extension region A3 may be entirely disposed in the pad P, or only one end portion of the extension region A3 in the longitudinal direction may be located radially outward of the pad P.

In the present embodiment, the extension area A3 reaches the radially outer side of the pad P, and therefore, the gap ratio GR cannot be calculated.

The coating area ratio AR of this example was (1.3×0.3)/(0.5 ² ×pi) =49.7%.

The maximum void area ratio of this example was 17.5%.

Example 26

The application area of the solder paste in embodiment 26 is described with reference to fig. 30. In example 26, only the structure different from that of example 25 is described below, and the description of other structures is omitted.

The coating region T further includes a plurality of (2) side regions A4 arranged across the extension region A3 in a direction intersecting the longitudinal direction of the extension region A3. The side areas A4 each have a square shape with a side length of 0.3mm in plan view, and extend in the up-down direction of the paper surface. The positional relationship between the plurality of side areas A4 and the extension area A3 is shown in fig. 30.

The opposite sides a, b of the extension area A3 and each side area A4 are parallel to each other. The opposite sides a, b may not be parallel to each other.

The plurality of side areas A4 are arranged to overlap the outer edge of the pad P. That is, a part of each side area A4 is located radially outward of the pad P. In addition, the plurality of side areas A4 may be all arranged in the pad P.

The coating area ratio AR of this example was (1.3×0.3+0.3 ²×2)/(0.5² ×pi) =72.6%.

The maximum void area ratio of this example was 15.0%.

Investigation of examples 25 and 26

The maximum void area ratio VR of examples 25 and 26 was lower than that of comparative example. Therefore, it is understood that the size of the generated void can be suppressed in each of examples 25 and 26.

In the following, it is considered that the reason why the size of the void can be suppressed is that the extension area A3 and the side area A4 are smaller than the coating area of the comparative example, and therefore the resin component of the flux and the like are easily discharged from the molten solder at an early stage, as in examples 1 to 5.

(Modified examples of examples 25 and 26)

Examples 25 and 26 can be considered as modifications below.

For example, the number of the plurality of side areas A4 may be 3 or more.

The gap ratio GR, the coating area ratio AR, and the maximum void area ratio VR of examples 1 to 26 are shown in table 1.

TABLE 1

Examples	Gap ratio GR [% ]	Coating area ratio AR [% ]	Maximum void area ratio VR [% ]
				Ref	-	100.0	43.5
1	50.0	62.4	2.3
				2	25.8	62.4	13.8
3	33.0	62.4	11.7
				4	39.5	62.4	7.0
5	45.1	62.4	4.2
				6	29.7	80.3	4.8
7	29.7	89.2	3.9
				8	29.7	100.6	13.9
9	29.7	73.9	12.3
				10	74.2	34.4	3.1
11	65.4	45.9	4.0
				12	48.4	57.1	2.6
13	29.1	34.6	1.8
				14	11.5	43.0	13.8
15	48.4	45.7	13.4
				16	29.1	23.2	13.8
17	41.8	63.0	10.9
				18	41.8	43.1	4.6
19	41.8	48.7	12.4
				20	41.8	35.7	17.8
21	80.6	27.0	3.8
				22	61.2	45.0	4.9
23	50.0	63.7	12.5
				24	50.0	107.6	14.6
25	-	49.7	17.5
				26	-	72.6	15.0

The maximum void area ratio VR of examples 1 to 26 was all lower than that of comparative example. Thus, it can be seen that the size of the generated void can be suppressed in all embodiments. Therefore, it is possible to secure appropriate electrical connection between the application object such as a substrate and the two electrodes of the electronic component, and also to prevent a decrease in strength of solder connecting the two electrodes, and thus it is possible to provide a substrate or the like after surface mounting that is resistant to impact.

In the above, an embodiment of the present invention has been described, but the present invention is not limited to the above embodiment. Additions, omissions, substitutions, and other modifications can be made without departing from the spirit of the present invention.

For example, in the above embodiment, the shape of the pad P on the substrate B as the coating object in plan view is circular, but the shape is not limited thereto, and may be rectangular or polygonal, for example.

In the above embodiment, the printed board composed of the hard plate-like base material is used as the application target, but a flexible board may be used as the application target of the solder paste. When one electronic component is directly connected to another electronic component, the one electronic component may be used as a coating target, and the electrode surface may be coated with solder paste. The object to be coated may be any member as long as it can be coated with the solder paste.

In the above-described embodiment, screen printing using the mask M was used when applying solder paste to the object to be coated, but a method may be employed in which solder paste is directly applied to the application region as shown in examples 1 to 26 without using a mask or the like, using a dispenser having a discharge nozzle movable on the substrate.

In addition, the present invention may include the following modes.

A fourth aspect of the present invention provides a mask for applying solder paste to an object to be applied, the mask including a plurality of peripheral openings arranged at intervals in a circumferential direction around a center of a joint region, wherein the openings are formed at positions corresponding to application regions at least a part of which is located in the joint region, so that non-application regions are formed in the joint region of the object to be applied.

A fifth aspect of the present invention provides a mask for applying solder paste to an object to be applied, wherein an opening having an extension opening including a center of the joint region and extending in one direction is formed at a position corresponding to an application region at least a part of which is located in the joint region so that a non-application region is formed in the joint region of the object to be applied.

INDUSTRIAL APPLICABILITY

The present invention is applicable to a coating method for coating a solder paste on a coating object such as a printed board, and a mask used for the coating, and can suppress the size of a void even when the void is formed in the solder during surface mounting.

Description of symbols

A1 Peripheral region

A11 First region

A12 Second region

A2 Central region

A3 Extension region

A4 Side area

B substrate (coating object)

N non-coated areas

O center

P bonding pad (bonding area)

S solder paste

T coating area

Claims

1. A method of applying solder paste to an object to be applied, the method comprising: a step of applying solder paste to at least a part of the application region located in the bonding region so as to form a non-application region in the bonding region of the application object,

The coating region has a plurality of peripheral regions arranged at intervals in a circumferential direction around a center of the joint region,

A portion of each peripheral region is located radially outward of the junction region.

2. The method for applying solder paste according to claim 1, wherein the plurality of peripheral regions are arranged opposite to each other across a center of the joint region.

3. The method for applying solder paste according to claim 2, wherein the plurality of peripheral regions are arranged to extend in a direction intersecting with a facing direction of the plurality of peripheral regions.

4. The method for coating solder paste according to claim 2, wherein the gaps between the plurality of peripheral regions are 30% or more and 70% or less of the maximum diameter of the joint region.

5. The method for coating solder paste according to claim 2, wherein the gaps between the plurality of peripheral regions are 85.7% or more and 200% or less of the width of each peripheral region in the opposite direction of the plurality of peripheral regions.

6. The method for coating solder paste according to claim 1, wherein the number of the plurality of peripheral regions is 2 to 6.

7. The application method of solder paste according to claim 1, wherein the plurality of peripheral regions are arranged at equal intervals in the circumferential direction.

8. The method for applying solder paste according to claim 1, wherein the plurality of peripheral regions have first regions and second regions having different lengths in the circumferential direction, the first regions and the second regions being alternately arranged in the circumferential direction.

9. The application method of solder paste according to claim 1, wherein opposite sides of the plurality of peripheral regions adjacent in the circumferential direction are parallel to each other.

10. The application method of solder paste according to claim 1, wherein the application region further has a central region located radially inward of the plurality of peripheral regions.

11. A method of applying solder paste according to claim 10, wherein the opposite sides of the central region and each peripheral region are parallel to each other.

12. The method for applying solder paste according to claim 10, wherein the area of the central region is 44.4% or more and 278% or less of the area of each peripheral region.

13. The method for applying solder paste according to claim 1, wherein the plurality of peripheral regions are configured to be partially connected to each other.

14. The application method of solder paste according to claim 13, wherein the width of the circumferential direction of each peripheral region gradually expands from the center of the joint region toward the radially outer side.

15. The method for applying solder paste according to claim 1, wherein a ratio of gaps between the plurality of peripheral regions, which are opened from a center of the joint region toward a radially outer side, to an entire circumference of the joint region is 11.5% or more.

16. The application method of solder paste according to any one of claims 1 to 15, wherein the plurality of peripheral regions are arranged so as to overlap with an outer edge of the joint region.

17. A method of applying solder paste according to any one of claims 1-15, wherein the plurality of peripheral regions are disposed within the joint region.

18. A method of applying solder paste to an object to be applied, the method comprising: a step of applying solder paste to at least a part of the application region located in the bonding region so as to form a non-application region in the bonding region of the application object,

The coating region has an extension region including a center of the bonding region and extending in one direction,

A portion of the extension region is located radially outward of the engagement region.

19. A method for applying solder paste according to claim 18, wherein said extension region is arranged to overlap with an outer edge of said joint region.

20. A method of applying solder paste according to claim 18, wherein the extension region is disposed within the junction region.

21. The method for applying solder paste according to claim 18, wherein the application region further has a plurality of side regions arranged across the extension region in a direction intersecting a longitudinal direction of the extension region.

22. A method of applying solder paste according to claim 21, wherein the opposite sides of the extension region and each side region are parallel to each other.

23. A method for applying solder paste according to claim 21 or 22, wherein said plurality of side regions are arranged so as to overlap with an outer edge of said joint region.

24. A method of applying solder paste according to claim 21 or 22, wherein the plurality of side regions are arranged within the joint region.

25. A mask for use in the method of applying solder paste according to any one of claims 1 to 24, wherein an opening is formed at a position corresponding to the application region.