CN112896069B - Power input alternative compatible processing circuit - Google Patents
Power input alternative compatible processing circuit Download PDFInfo
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- CN112896069B CN112896069B CN201911222428.XA CN201911222428A CN112896069B CN 112896069 B CN112896069 B CN 112896069B CN 201911222428 A CN201911222428 A CN 201911222428A CN 112896069 B CN112896069 B CN 112896069B
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- 238000012545 processing Methods 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims description 12
- 238000010438 heat treatment Methods 0.000 abstract description 5
- 101100112673 Rattus norvegicus Ccnd2 gene Proteins 0.000 description 10
- 239000008186 active pharmaceutical agent Substances 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- 230000003071 parasitic effect Effects 0.000 description 1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60R—VEHICLES, VEHICLE FITTINGS, OR VEHICLE PARTS, NOT OTHERWISE PROVIDED FOR
- B60R16/00—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for
- B60R16/02—Electric or fluid circuits specially adapted for vehicles and not otherwise provided for; Arrangement of elements of electric or fluid circuits specially adapted for vehicles and not otherwise provided for electric constitutive elements
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B60—VEHICLES IN GENERAL
- B60L—PROPULSION OF ELECTRICALLY-PROPELLED VEHICLES; SUPPLYING ELECTRIC POWER FOR AUXILIARY EQUIPMENT OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRODYNAMIC BRAKE SYSTEMS FOR VEHICLES IN GENERAL; MAGNETIC SUSPENSION OR LEVITATION FOR VEHICLES; MONITORING OPERATING VARIABLES OF ELECTRICALLY-PROPELLED VEHICLES; ELECTRIC SAFETY DEVICES FOR ELECTRICALLY-PROPELLED VEHICLES
- B60L1/00—Supplying electric power to auxiliary equipment of vehicles
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Abstract
The invention discloses a power input alternative compatible processing circuit, comprising: the first power input and the switch signal input are connected to the switch signal output, and the first power input and the second power input are connected to the power output through a first MOS transistor and a second MOS transistor in a gating mode. The invention solves the requirement of two paths of power supply input gating OR gate control logics, and avoids the problem of device heating of a circuit which adopts a power diode to build an OR gate.
Description
Technical Field
The invention relates to the technical field of power input of new energy automobiles, in particular to a power input alternative compatible processing circuit.
Background
With the development of new energy automobile technology, automobile products and parts need to be compatible with a plurality of other products in the updating iteration process in consideration of factors such as universalization, cost and the like. The system and the universal use of the components often need some compatible processing on the integrated circuit board. The problem that a functional circuit is compatible with two paths of power supply input is solved, and the heating is serious when a power diode is adopted for controlling a power supply input switch.
Disclosure of Invention
The invention provides a power input alternative compatible processing circuit, which is used for solving the technical problem that the existing functional circuit cannot be compatible with two paths of power inputs.
In order to solve the technical problems, the technical scheme provided by the invention is as follows:
a power input alternative compatible processing circuit comprises: the first power input and the second power input are connected to the switching signal output, and the first power input and the second power input are connected to the power output through a first MOS transistor and a second MOS transistor in a gating mode.
Preferably, the first MOS transistor is a P-channel MOS transistor, and the second MOS transistor is an N-channel MOS transistor.
Preferably, the substrate of the P-channel MOS transistor is connected with the source electrode and the second power supply input, and the drain electrode is connected with the first power supply input; the grid electrode of the P-channel MOS tube is connected with the drain electrode of the N-channel MOS tube; the substrate of the N-channel MOS is connected with the source electrode, and the grid electrode of the N-channel MOS is connected with the first power supply input.
Preferably, a first resistor is connected between the drain of the P-channel MOS transistor and the gate of the N-channel MOS transistor.
Preferably, the gate of the N-channel MOS is grounded after being connected with the fourth resistor; the substrate of the N-channel MOS is connected with the source electrode and grounded.
Preferably, a second resistor is connected between the substrate and the source of the P-channel MOS transistor.
Preferably, a third resistor is connected between the gate of the P-channel MOS transistor and the drain of the N-channel MOS transistor.
Preferably, when the first power input is gated to the power output, the first power input is powered, and the switching signal input is at a low level.
Preferably, when the second power input is gated to the power output, the second power input is powered and the switching signal input is at a high level.
The invention has the following beneficial effects:
the power input alternative compatible processing circuit realizes that the alternative of a power supply + Vin1 (a first power input) and a power supply + Vin2 (a second power input) is used as a power supply of a functional circuit through two paths of Metal-Oxide-Semiconductor Field-Effect transistors (MOSFETs), metal-Oxide-Semiconductor Field-Effect transistors (MOSFET-FET), also known as insulated gate Field-Effect transistors (IGFETs), and the heating problem can not be generated after long-time use.
In addition to the objects, features and advantages described above, other objects, features and advantages of the present invention are also provided. The present invention will be described in further detail below with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate embodiments of the invention and, together with the description, serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic circuit diagram of a power input alternative compatible processing circuit according to a preferred embodiment of the present invention.
Detailed Description
The embodiments of the invention will be described in detail below with reference to the drawings, but the invention can be implemented in many different ways as defined and covered by the claims.
Referring to fig. 1, + Vin1 and + Vin2 are two available power sources. The invention discloses a power input alternative compatible processing circuit, which comprises: the first power input and the second power input are connected to the switching signal output, and the first power input and the second power input are connected to the power output through a first MOS transistor and a second MOS transistor in a gating mode. Two paths of MOSFETs (the first MOS tube and the second MOS tube are both MOSFETs) are used for realizing that the alternative power supply of a power supply + Vin1 (first power supply input) and a power supply + Vin2 (second power supply input) is used as a power supply of the functional circuit, and the heating problem can not be caused after long-time use.
In implementation, referring to fig. 1, preferably, the first MOS transistor is a P-channel MOS transistor, and the second MOS transistor is an N-channel MOS transistor; the substrate of the P-channel MOS tube is connected with the source electrode and the second power supply input, and the drain electrode is connected with the first power supply input; the grid electrode of the P-channel MOS tube is connected with the drain electrode of the N-channel MOS tube; the substrate of the N-channel MOS is connected with the source electrode, and the grid electrode is connected with the first power supply input. Furthermore, a first resistor is connected between the drain electrode of the P-channel MOS tube and the grid electrode of the N-channel MOS tube, and the grid electrode of the N-channel MOS tube is connected with a fourth resistor and then grounded; the substrate of the N-channel MOS is connected with the source electrode and is grounded, a second resistor is connected between the substrate of the P-channel MOS tube and the source electrode, and a third resistor is connected between the grid electrode of the P-channel MOS tube and the drain electrode of the N-channel MOS tube.
(1) Power supply + Vin1 mode of operation:
when the power supply + Vin1 acts, the switch signal KEY is directly provided by the power supply + Vin1 without adding a switch signal; the GS voltage of the N-channel MOS tube Q2 is as follows:
when U is turned GS2 >U GS(TH) When so, Q2 is turned on.
When the power supply + Vin1 acts on, the DS pole of the P-channel MOS tube Q1 is conducted in a transient state due to the existence of the parasitic capacitor, the voltage drop of the DS poles of the Q1 and the Q2 is ignored, and the GS pole voltage of the Q1 is as follows:
U GS1 ＜-U GS(TH) at this time, Q1 is turned on.
Therefore, the power supply + Vin1 can be realized to enable the functional circuit to work normally by configuring the resistance values of R1-R4.
(2) Power supply + Vin2 mode of operation:
when power + Vin2 is active, the DS pole of Q2 is open, so U GS1 Q1 is not conductive, the switching signal KEY needs to be provided by an external switching signal (high level), and the functional circuit can normally operate.
From the above, the above circuit implements the following or gate control logic:
(1) the power supply + Vin1 and the power supply + Vin2 are selected as power supplies of the functional circuit;
(2) when the power supply + Vin1 acts, a switching signal is not required to be added, and the functional circuit works normally;
(3) when the power supply + Vin2 is used, a switch signal must be added, and the functional circuit can normally work.
In conclusion, the requirements of the control logic are met through the two groups of MOS tubes, the problem of device heating of a circuit built by adopting a power diode or a gate is solved, 2 MOS tubes are saved compared with a traditional MOS tube built or gate circuit, cost is reduced, and the method has great significance in actual circuit design and application.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (8)
1. A power input alternative compatible processing circuit, comprising: the power supply comprises a first power supply input, a second power supply input, a switching signal input, a power supply output and a switching signal output, wherein the power supply output and the switching signal output are provided for a functional circuit;
the first MOS tube is a P-channel MOS tube, and the second MOS tube is an N-channel MOS tube; the substrate of the P-channel MOS transistor is connected with the source electrode and the second power supply input, and the drain electrode is connected with the first power supply input; the grid electrode of the P-channel MOS tube is connected with the drain electrode of the N-channel MOS tube; and the substrate of the N-channel MOS is connected with the source electrode, and the grid electrode of the N-channel MOS is connected with the first power supply input.
2. The circuit according to claim 1, wherein a first resistor is connected between the drain of the P-channel MOS transistor and the gate of the N-channel MOS transistor.
3. The circuit according to claim 2, wherein the gate of the N-channel MOS is grounded after being connected to the fourth resistor.
4. The input power alternative compatible processing circuit of claim 1, wherein the substrate of the N-channel MOS is connected to a source and to ground.
5. An input power supply alternative compatible processing circuit according to any one of claims 1 to 4, wherein a second resistor is connected between the substrate and the source of the P-channel MOS transistor.
6. An input power alternative compatible processing circuit according to any one of claims 1 to 4, wherein a third resistor is connected between the gate of the P-channel MOS transistor and the drain of the N-channel MOS transistor.
7. An input alternative compatible processing circuit according to any of claims 1 to 4, wherein when the first power input is gated to the power output, the first power input is powered and the switching signal input is low.
8. A power input altemative compatible processing circuit according to any one of claims 1 to 4 wherein when the second power input is gated to the power output, the second power input is powered and the switching signal input is high.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911222428.XA CN112896069B (en) | 2019-12-03 | 2019-12-03 | Power input alternative compatible processing circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911222428.XA CN112896069B (en) | 2019-12-03 | 2019-12-03 | Power input alternative compatible processing circuit |
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| Publication Number | Publication Date |
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| CN112896069A CN112896069A (en) | 2021-06-04 |
| CN112896069B true CN112896069B (en) | 2023-02-03 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP4232599B2 (en) * | 2003-10-16 | 2009-03-04 | ソニー株式会社 | Level conversion circuit and display device |
| CN202363968U (en) * | 2011-12-14 | 2012-08-01 | 陕西千山航空电子有限责任公司 | Dual-power input selection and power reverse connection prevention circuit |
| JP6307401B2 (en) * | 2014-09-24 | 2018-04-04 | ローム株式会社 | Current mode controlled switching power supply |
| CN204886405U (en) * | 2015-08-25 | 2015-12-16 | 广州视源电子科技股份有限公司 | Dual-power isolation circuit |
| CN205509647U (en) * | 2016-01-29 | 2016-08-24 | 飞天诚信科技股份有限公司 | Switch control device |
| CN207442697U (en) * | 2017-11-21 | 2018-06-01 | 四川巧夺天工信息安全智能设备有限公司 | A kind of switching power circuit |
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Effective date of registration: 20240906 Address after: No. 201, R&D Building, Phase 2.1 A, Xinma Power Innovation Park, No. 899 Xianyue Ring Road, Majiahe Street, Tianyuan District, Zhuzhou City, Hunan Province, 412000 Patentee after: Hunan CRRC Commercial Vehicle Power Technology Co.,Ltd. Country or region after: China Address before: Liyu Industrial Park, national high tech Development Zone, Zhuzhou City, Hunan Province Patentee before: Zhongche Times Electric Vehicle Co.,Ltd. Country or region before: China |