CN112542206A - LPDDR test method, device, readable storage medium and electronic equipment - Google Patents
LPDDR test method, device, readable storage medium and electronic equipment Download PDFInfo
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Abstract
The invention discloses an LPDDR test method, an apparatus, a readable storage medium and an electronic device, wherein an intel-based test mainboard is built, an LPDDR chip to be tested is placed and connected on the test mainboard, the test mainboard is triggered to be powered on and started, test software is downloaded after the test mainboard is started, the test software is operated to carry out read-write scanning test on the LPDDR chip to be tested so as to obtain a test result of the LPDDR chip to be tested, the automatic test on the LPDDR chip is realized under the action of various instructions through the building of the test mainboard, manual participation is not needed in the whole process, the test efficiency of the LPDDR is improved, and the test cost is reduced.
Description
Technical Field
The invention relates to the field of storage device testing, in particular to an LPDDR testing method, an LPDDR testing device, a readable storage medium and electronic equipment.
Background
With the rapid development of the internet of things, most functions of a traditional computer are replaced by the portable mobile device. Because of the strict requirement of Low Power consumption of portable mobile devices, LPDDR (Low Power Double Data Rate SDRAM, Low Power consumption memory) becomes the main storage component in portable mobile devices. LPDDR has to be tested to ensure reliable use in portable mobile devices.
However, compared with the standard memory bank test method, the existing platform test method for the LPDDR chip is less, and usually still needs manual test, which is inefficient and high in labor cost.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: an LPDDR test method, an apparatus, a readable storage medium and an electronic device are provided to improve the test efficiency of LPDDR and reduce the test cost.
In order to solve the technical problems, the invention adopts a technical scheme that:
a LPDDR test method, comprising the steps of:
receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
sending a power-on instruction of a test mainboard, and triggering the test mainboard to be powered on;
sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
an LPDDR test device comprising:
the first receiving module is used for receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
the first sending module is used for sending a power-on instruction of the test mainboard and triggering the power-on of the test mainboard;
the second sending module is used for sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and the second receiving module is used for receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
a computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the LPDDR test method described above.
In order to solve the technical problem, the invention adopts another technical scheme as follows:
an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the LPDDR test method described above when executing the computer program.
The invention has the beneficial effects that: by building the test mainboard based on intel, automatically placing and connecting the LPDDR chip to be tested on the test mainboard, triggering the test mainboard to be powered on and started, automatically downloading test software after the test mainboard is started, performing read-write scanning test on the LPDDR chip to be tested by running the test software to obtain a test result of the LPDDR chip to be tested, realizing automatic test on the LPDDR chip by building the test mainboard and under the action of various instructions, avoiding manual participation in the whole process, improving the test efficiency of the LPDDR chip and reducing the test cost.
Drawings
FIG. 1 is a flowchart illustrating steps of a LDPPR testing method according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an LDPPR testing apparatus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a high-frequency testing system of an LDPPR testing method according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a mobile phone motherboard of an LDPPR testing method according to an embodiment of the present invention;
fig. 6 is a schematic diagram of a scan test method of the LDPPR test method according to the embodiment of the present invention.
Detailed Description
In order to explain technical contents, achieved objects, and effects of the present invention in detail, the following description is made with reference to the accompanying drawings in combination with the embodiments.
Referring to fig. 1, an embodiment of the invention provides a LPDDR testing method, including the steps of:
receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
sending a power-on instruction of a test mainboard, and triggering the test mainboard to be powered on;
sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
From the above description, the beneficial effects of the present invention are: by building the test mainboard based on intel, automatically placing and connecting the LPDDR chip to be tested on the test mainboard, triggering the test mainboard to be powered on and started, automatically downloading test software after the test mainboard is started, performing read-write scanning test on the LPDDR chip to be tested by running the test software to obtain a test result of the LPDDR chip to be tested, realizing automatic test on the LPDDR chip by building the test mainboard and under the action of various instructions, avoiding manual participation in the whole process, improving the test efficiency of the LPDDR chip and reducing the test cost.
Furthermore, the test mainboard is provided with a slot for placing the LPDDR chip to be tested at the position where the LPDDR chip is placed;
each test mainboard is provided with two slots for combining two LPDDR chips.
According to the description, the two slots are arranged on the test mainboard and used for placing the two LPDDR chips on the slots, so that the matching performance of the formed LPDDR chipset and the test mainboard can be ensured, the test reliability is ensured, and the test efficiency is further improved.
Further, the method also comprises the following steps:
and sending a network setting instruction to the test mainboard, and triggering the test mainboard to start a network through bios.
According to the description, the network setting instruction is sent to the test mainboard, and the test mainboard is triggered to start the network, so that the test mainboard can automatically download the test software through the network after starting, and manual participation is not needed.
Further, the test mainboard comprises a plurality of blocks;
and the plurality of test main boards are networked through the switch and are connected with a server through a TCP/IP network port.
According to the description, the plurality of test main boards are subjected to networking test, so that the plurality of LPDDR can be tested at one time, and the test efficiency is further improved.
Further, the triggering the test motherboard to download the test software includes:
the test software is stored in a preset position of the server in advance, and a starting path is configured;
and triggering the test mainboard to download the test software from the preset position of the server through the allocated IP address.
According to the description, the testing software can be automatically downloaded from the preset position in the server through the configured starting path and the allocated IP address on the testing mainboard, so that the testing efficiency is improved, and the labor cost is reduced.
Further, before receiving the test result of the test software after performing the read-write scan test on the LPDDR chip to be tested, the method further includes the steps of:
triggering the test software to carry out read-write scanning test on the LPDDR chip to be tested according to a preset test mode;
triggering the test software to return a test result corresponding to a preset test mode after the test software executes the preset test mode;
and judging whether the test result is failed, if so, triggering the test software to stop testing, and otherwise, triggering the test software to execute the next preset test mode until all the preset test modes are completely executed.
According to the description, a plurality of test modes are preset, and each preset test mode is tested, so that the test coverage rate is improved.
Further, the receiving the test result of the test software after performing the read-write scan test on the LPDDR chip to be tested includes:
receiving a test result which is returned by the test software and is used for performing read-write scanning test on the LPDDR chip to be tested from the server;
the test result comprises a test result type identifier and a test position.
As can be seen from the above description, the test result includes the test result type identifier and the test position, so that the test condition of each test position can be intuitively obtained, and the test mainboard can be distinguished according to the test result.
Referring to fig. 2, another embodiment of the invention provides an LPDDR testing apparatus, including:
the first receiving module is used for receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
the first sending module is used for sending a power-on instruction of the test mainboard and triggering the power-on of the test mainboard;
the second sending module is used for sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and the second receiving module is used for receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
Another embodiment of the present invention provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the LPDDR test method described above.
Referring to fig. 3, another embodiment of the present invention provides an electronic device, which includes a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the steps of the LPDDR test method.
The LPDDR test method, apparatus, computer readable storage medium and electronic device of the present invention can be applied to a high frequency motherboard specially designed for intel x86 architecture of LPDDR chip, and are described below by specific embodiments:
example one
Referring to fig. 1, a LPDDR test method includes the steps of:
receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
wherein, the test mainboard is provided with a socket (slot) for placing the LPDDR chip to be tested at the position where the LPDDR chip is placed;
each test mainboard is provided with two sockets for combining two LPDDR chips;
wherein, designing the CPU mainboard based on intel ice lake, the platform only reserves basic functional module, for example: CPU, memory, power module, IO bus and basic input/output interface, its LPDDR data transmission frequency can reach 3733 Mbps. The x86 architecture CPU is 64bit wide, and the bit wide of a single LPDDR chip is 32bit, so in order to communicate with the CPU, 2 chips are required to be combined into a group of 64bit wide, the structure is similar to the test of a memory module, and a plurality of mature test software can be directly operated on the structure;
specifically, in this embodiment, a DDR (Double Data Rate) socket corresponding to the LPDDR chip is installed at the LPDDR chip position of the test motherboard, a start button is clicked at the handler machine interface, the LPDDR chip is placed at the corresponding socket position by an automated manipulator, a press block is used to press down the LPDDR chip, and the LPDDR chip and the test motherboard are combined together by a PIN;
the plurality of test main boards are networked through the switch and are connected with a server through a TCP/IP network port;
specifically, referring to fig. 4, 60 test motherboards are assembled together, a switch is arranged in the middle, each test motherboard is connected with a server through a TCP/IP (Transmission Control Protocol/Internet Protocol) port, a physical line for signal Transmission is established, a handler machine interface is connected to the server, and a manipulator is controlled through the handler machine interface;
sending a power-on instruction of a test mainboard, and triggering the test mainboard to be powered on;
specifically, handle has two sets of relays in this embodiment, and the test mainboard start key is connected at the relay both ends, and wherein first group relay is used for supplying power for the test mainboard. The second group of relays are used for controlling the relays to be in short circuit, so that a power-on instruction of the test mainboard is sent, the first group of relays are controlled to be closed, and the test mainboard is powered on;
sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
sending a network setting instruction to the test mainboard, and triggering the test mainboard to start a network through bios;
specifically, in this embodiment, an instruction START _ TEST 021111 + to START testing is sent to the server, where 02 denotes the location ID corresponding to the chip, 1 denotes that the chip is placed therein, and then the server responds to a set of instructions to the handler, which denotes that the handshake is successful. Simultaneously issuing a group of new instructions to enable the second group of relays to be in short circuit for 1s, starting the test mainboard, setting the test mainboard bios to be in network start, and automatically searching the operating system through the network after the mainboard bios runs;
wherein, the triggering test mainboard downloading test software comprises:
the test software is stored in a preset position of the server in advance, and a starting path is configured;
triggering a test mainboard to download the test software from a preset position of the server through the allocated IP address;
specifically, a third-party TFTPD32 tool is installed at a PC (personal computer) end and used as a DHCP (dynamic host configuration protocol) server to distribute IP (Internet protocol) to each test mainboard, meanwhile, third-party test software MemTest86 is placed in a D disk on the server, a starting path is configured by the TFTPD32 tool, and after the test mainboard is started, a test system is automatically downloaded from the server through a network;
receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested;
specifically, the operation results pass of all the scan tests are judged to be good products, and the information returned to the server is as follows: address 01; if the log has error report, the log is judged to be NG, and the returned information is as follows: address 02; the log lacks part of scanning test information, shows that the album number mainboard is stuck, judges as NG similarly, need put the well carousel and come retest, the information of passback is: address 03;
in the actual test, in the time of 500s, the server end does not receive the log information of the test mainboard, the log analysis tool judges that the mainboard is abnormal, and an instruction of an address 03 is returned to a handler;
the server feeds back the result of each TEST mainboard to the handler, positions the position of the chip by returning the address in the information, for example, the returned information is TEST _ DOWN 0201010101 +, wherein 02 represents the position ID corresponding to the chip, OK and NG of the chip are judged by 01/02/03 in the address, wherein 01 represents the TEST result pass, 02 and 03 represent NG, and the manipulator distinguishes the materials according to the address information;
referring to fig. 5, in the present embodiment, the model of the motherboard is MTK6833, LPDDR is placed in the motherboard, and this is taken from left to right at the bottom as a power-on key, a D-type data interface connector and a power supply 5V interface.
Example two
The difference between the embodiment and the first embodiment is that the read-write scan test method of the LPDDR chip is defined as follows:
triggering the test software to perform read-write scanning test on the LPDDR chip to be tested according to a preset test mode; triggering the test software to return a test result corresponding to a preset test mode after the test software executes the preset test mode;
judging whether the test result is failure, if so, triggering the test software to stop testing, otherwise, triggering the test software to execute the next preset test mode until all the preset test modes are completely executed;
receiving a test result which is returned by the test software and is used for performing read-write scanning test on the LPDDR chip to be tested from the server;
the test result comprises a test result type identifier and a test position;
specifically, after the test software is started, the read-write scan test is performed on the DDR chip, and a plurality of different scan test modes are operated, referring to fig. 6, the scan test mode may be Address test, Moving inversion, Block move, Random number sequence, module 20, Bit fail test, Hammer test, and a plurality of read-write scan tests are set in this embodiment: the test modes 0 to 2 are Address test, the test modes 3 to 5 and 7 are Moving updates, the test mode 6 is Block move, the test modes 8, 11 and 12 are Random number sequence, the test mode 9 is Module 20, the test mode 10 is Bit fade test, the test mode 13 is Hammer test, and after each scanning test mode is finished, the test log is returned to the server in an xml document format through a network cable;
the Xml document comprises a position corresponding to each mainboard, a scanning test mode and detailed front 32-bit and rear 32-bit error reporting addresses, a log analysis tool developed by a server end is used for extracting the position of a test chip and error reporting information, when a certain scanning test mode is operated to report errors, a test result fail is transmitted back to the server, and meanwhile, the platform stops operating and is powered off; and when the operation test result is OK, the platform continues to operate until all the scanning test modes are completely operated.
EXAMPLE III
Referring to fig. 2, an LPDDR test apparatus includes:
the first receiving module is used for receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
specifically, the LPDDR test device is a handler (operation end), and after the handler receives a start instruction, the handler controls the manipulator to automatically place the LPDDR chip to be tested at a position corresponding to the intel-based test motherboard according to the start instruction, and automatically connects the LPDDR chip to be tested with the test motherboard;
the first sending module is used for sending a power-on instruction of the test mainboard and triggering the power-on of the test mainboard;
specifically, the handler sends a test instruction to the server, the server responds to a group of instructions to the handler to realize handshake, and meanwhile the handler sends an instruction to start to test the mainboard to be powered on;
the second sending module is used for sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
specifically, the handler sends a test mainboard starting instruction, and starts the test mainboard to automatically download test software;
the second receiving module is used for receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested;
specifically, the handler receives a test result of the scanning test, and controls the manipulator to sort the materials according to address information in the test result.
Example four
A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of a LPDDR test method according to any one of the above-mentioned embodiments one to two.
EXAMPLE five
Referring to fig. 3, an electronic device includes a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the steps of the LPDDR test method according to any one of the first to second embodiments.
In summary, according to the LPDDR test method, the LPDDR test device, the readable storage medium and the electronic device provided by the present invention, by building an intel-based test motherboard, two sockets are arranged on the test motherboard for placing two LPDDR chips on the sockets, and the LPDDR chips to be tested are automatically placed and connected on the test motherboard, so as to ensure the matching between the formed LPDDR chipset and the test motherboard, perform networking test on a plurality of test motherboards, and test a plurality of LPDDR at a time; triggering the test mainboard to be powered on and started, automatically downloading test software after the test mainboard is started, and automatically downloading the test software from a preset position in the server through a configured starting path and an allocated IP address on the test mainboard; the test software is operated to carry out read-write scanning test on the LPDDR chip to be tested so as to obtain a test result of the LPDDR chip to be tested, a plurality of test modes are preset, each preset test mode is tested, the test coverage rate is improved, the test result comprises a test result type identifier and a test position, the test condition of each test position can be intuitively obtained, the automatic test of the LPDDR chip is realized under the action of various instructions through the building of a test mainboard, manual participation is not needed in the whole process, the test efficiency and the coverage rate of the LPDDR chip are improved, the test cost is reduced, and the safety and reliability of the test are improved.
In the above embodiments provided in the present application, it should be understood that the disclosed method, apparatus, computer-readable storage medium, and electronic device may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the modules is only one logical division, and other divisions may be realized in practice, for example, a plurality of components or modules may be combined or integrated into another apparatus, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or components or modules, and may be in an electrical, mechanical or other form.
The components described as separate parts may or may not be physically separate, and parts displayed as components may or may not be physical modules, may be located in one place, or may be distributed on a plurality of network modules. Some or all of the components can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional modules in the embodiments of the present invention may be integrated into one processing module, or each component may exist alone physically, or two or more modules are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode.
The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
It should be noted that, for the sake of simplicity, the above-mentioned method embodiments are described as a series of acts or combinations, but those skilled in the art should understand that the present invention is not limited by the described order of acts, as some steps may be performed in other orders or simultaneously according to the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no acts or modules are necessarily required of the invention.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to the related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for testing LPDDR, comprising the steps of:
receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
sending a power-on instruction of a test mainboard, and triggering the test mainboard to be powered on;
sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
2. The LPDDR test method of claim 1, wherein the test motherboard is provided with a slot for placing the LPDDR chip to be tested at a position where the LPDDR chip is placed;
each test mainboard is provided with two slots for combining two LPDDR chips.
3. The LPDDR test method of claim 1, further comprising the steps of:
and sending a network setting instruction to the test mainboard, and triggering the test mainboard to start a network through bios.
4. The LPDDR test method of claim 1, wherein said test motherboard comprises a plurality of blocks;
and the plurality of test main boards are networked through the switch and are connected with a server through a TCP/IP network port.
5. The LPDDR test method of claim 4, wherein the triggering the test motherboard to download the test software comprises:
the test software is stored in a preset position of the server in advance, and a starting path is configured;
and triggering the test mainboard to download the test software from the preset position of the server through the allocated IP address.
6. The LPDDR test method of any one of claims 1 to 5, wherein before receiving the test result after the test software performs the read-write scan test on the LPDDR chip to be tested, the method further comprises:
triggering the test software to carry out read-write scanning test on the LPDDR chip to be tested according to a preset test mode;
triggering the test software to return a test result corresponding to a preset test mode after the test software executes the preset test mode;
and judging whether the test result is failed, if so, triggering the test software to stop testing, and otherwise, triggering the test software to execute the next preset test mode until all the preset test modes are completely executed.
7. The LPDDR test method of any one of claims 4 to 5, wherein the receiving the test result after the test software performs the read-write scan test on the LPDDR chip to be tested comprises:
receiving a test result which is returned by the test software and is used for performing read-write scanning test on the LPDDR chip to be tested from the server;
the test result comprises a test result type identifier and a test position.
8. An LPDDR test apparatus, comprising:
the first receiving module is used for receiving a test starting instruction, placing the LPDDR chip to be tested at a position corresponding to the intel-based test mainboard according to the test starting instruction, and connecting the LPDDR chip to be tested with the test mainboard;
the first sending module is used for sending a power-on instruction of the test mainboard and triggering the power-on of the test mainboard;
the second sending module is used for sending a test mainboard starting instruction, triggering the test mainboard to start and download test software;
and the second receiving module is used for receiving a test result obtained after the test software carries out read-write scanning test on the LPDDR chip to be tested.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of a method for LPDDR testing as claimed in any one of the claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the steps of a LPDDR test method according to any one of claims 1 to 7 when executing the computer program.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113466664A (en) * | 2021-07-02 | 2021-10-01 | 深圳市宏旺微电子有限公司 | DDR chip testing method and device, terminal device and storage medium |
| CN114113978A (en) * | 2021-11-11 | 2022-03-01 | 成都海光集成电路设计有限公司 | Chip selection method and device |
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