CN112259611B - Oxide semiconductor thin film transistor and manufacturing method thereof - Google Patents
Oxide semiconductor thin film transistor and manufacturing method thereof Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 77
- 239000010409 thin film Substances 0.000 title claims abstract description 72
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000001301 oxygen Substances 0.000 claims abstract description 41
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 41
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 40
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 229910052751 metal Inorganic materials 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims abstract description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 91
- 229910044991 metal oxide Inorganic materials 0.000 claims description 65
- 150000004706 metal oxides Chemical class 0.000 claims description 64
- 238000000034 method Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 15
- 230000008569 process Effects 0.000 claims description 9
- 239000011248 coating agent Substances 0.000 claims description 8
- 238000000576 coating method Methods 0.000 claims description 8
- VVTSZOCINPYFDP-UHFFFAOYSA-N [O].[Ar] Chemical compound [O].[Ar] VVTSZOCINPYFDP-UHFFFAOYSA-N 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 5
- 238000003475 lamination Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 241
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 15
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 10
- 230000037230 mobility Effects 0.000 description 10
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 8
- 229910052733 gallium Inorganic materials 0.000 description 8
- 229910052738 indium Inorganic materials 0.000 description 8
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 8
- 239000011787 zinc oxide Substances 0.000 description 7
- 229910021417 amorphous silicon Inorganic materials 0.000 description 6
- 229910052786 argon Inorganic materials 0.000 description 5
- 239000010408 film Substances 0.000 description 5
- 238000000151 deposition Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 238000001755 magnetron sputter deposition Methods 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 239000013077 target material Substances 0.000 description 3
- 229920001621 AMOLED Polymers 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 206010021143 Hypoxia Diseases 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000002860 competitive effect Effects 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910003437 indium oxide Inorganic materials 0.000 description 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78639—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a drain or source connected to a bulk conducting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
An oxide semiconductor thin film transistor comprises a substrate, a grid electrode insulating layer, an oxide semiconductor layer and a source drain metal layer which are sequentially arranged on the substrate, wherein the source drain metal layer comprises a source electrode and a drain electrode which are arranged at intervals, the oxide semiconductor layer comprises a first oxide layer and a second oxide layer which is arranged above the first oxide layer in a stacked manner, and the oxygen content of the first oxide layer is lower than that of the second oxide layer; part of the first oxide layer is exposed from two sides of the second oxide layer, and the source electrode and the drain electrode are mutually spaced and respectively in direct contact connection with the first oxide layer exposed from two sides of the second oxide layer, so that the source electrode, the drain electrode and the oxide semiconductor layer form better ohmic contact, the on-state current of the thin film transistor is effectively improved, and the comprehensive performance of the thin film transistor is optimized. The invention also relates to a manufacturing method of the oxide semiconductor thin film transistor.
Description
Technical Field
The present invention relates to the field of thin film transistors, and more particularly, to an oxide semiconductor thin film transistor and a method for fabricating the same.
Background
The current switching elements applied to the display are amorphous silicon (a-Si) thin film transistors and polycrystalline silicon (p-Si) thin film transistors, wherein the amorphous silicon thin film transistors are most widely applied, but the amorphous silicon thin film transistors have the problems of low electron mobility (only 0.3-1 cm 2/V.s), poor illumination stability and the like. The polysilicon thin film transistor has a large number of higher electron mobility than the amorphous silicon thin film transistor, but has problems such as complicated structure, large leakage current, and poor uniformity of film quality. With the rapid development of display technology, the requirements of video formats from standard definition to high definition to super definition for resolution shelter of display are gradually increased, and increasingly high requirements are put on the performance and the size of a thin film transistor, so that the requirements cannot be completely met by an amorphous silicon thin film transistor and a polycrystalline silicon thin film transistor, and a high-temperature manufacturing process cannot be used for manufacturing a display panel with a larger size.
In recent years, amorphous oxide semiconductor thin film transistors (Amorphous Oxide Semiconductor Thin Film Transistor, AOS TFTs) have received attention in academia and industry because of their excellent electrical and optical properties. Particularly, an amorphous indium gallium zinc oxide thin film transistor (Amorphous InGaZnO Thin Film Transistor, a-IGZO TFT) is considered as a core component of a driving circuit of an active matrix organic light emitting Diode (Active Matrix Organic LIGHT EMITTING Diode) and an active matrix liquid crystal display (Active Matrix Liquid CRYSTAL DISPLAY, AMLCD) and is also considered as a most competitive back plate driving technology which is developed along with the large-size, flexible and portable direction of the display, due to the advantages of high electron mobility (> 10cm 2/v·s), low power consumption, simple process (no need of high temperature manufacturing), high response speed, good large area uniformity, high transmittance in the visible light range and the like.
For a thin film transistor with excellent performance, a larger threshold voltage, a higher on-off current ratio, a smaller subthreshold swing, and higher stability are required. Generally, the larger the field effect mobility of the thin film transistor, the faster the charge of the pixel storage capacitor, the smaller the leakage current of the thin film transistor, the faster the discharge of the pixel storage capacitor, the smaller the subthreshold swing of the thin film transistor, the faster the switching state of the thin film transistor and the more power-saving. However, these have high requirements on the characteristics of the oxide semiconductor layer, such as structure, surface defect state, carrier concentration, carrier mobility, and the like.
As shown in fig. 1, a conventional oxide semiconductor thin film transistor includes a substrate 1, a gate electrode 2, a gate insulating layer 3, an oxide semiconductor layer 4, and a source/drain electrode layer 5, which are sequentially provided on the substrate 1. In general, the oxide semiconductor layer 4 has a single-layer structure, and the oxide semiconductor layer 4 has different electron mobilities by controlling the oxygen content of the oxide semiconductor layer 4 to adjust the carrier concentration during the process of manufacturing the oxide semiconductor layer 4. However, the oxide semiconductor layers 4 having different oxygen contents have advantages and disadvantages, for example, the oxide semiconductor layer 4 having a lower oxygen content has a higher electron mobility and a higher threshold voltage, but has a higher off-state current; the oxide semiconductor layer 4 having a higher oxygen content has a lower electron mobility and a smaller off-state current, but the threshold voltage is also correspondingly smaller, and the non-uniformity of the oxide semiconductor layer 4 having a single-layer structure limits the improvement of the overall performance of the thin film transistor.
In order to improve the comprehensive performance of the thin film transistor, another oxide semiconductor thin film transistor using a Double stacked oxide channel layer (Double STACKED CHANNEL LAYERS, DSCL) is also proposed in the prior art, as shown in fig. 2, that is, the oxide semiconductor layer 4 of the oxide semiconductor thin film transistor includes an upper layer and a lower layer, wherein the first oxide layer 41 located in the front channel of the lower layer is a metal oxide with lower oxygen content, and the second oxide layer 42 located in the back channel of the upper layer is a metal oxide with higher oxygen content. However, in this structure, the back channel in direct contact with the source and drain electrodes in the source-drain electrode layer 5 is made of a high-oxygen metal oxide, and it is difficult to form an ideal ohmic contact due to its high resistivity, and the on-state current of the DSCL oxide semiconductor thin film transistor is still not ideal enough, which affects the overall performance of the DSCL oxide semiconductor thin film transistor.
Disclosure of Invention
The invention aims to provide an oxide semiconductor thin film transistor which effectively improves the on-state current of the thin film transistor and optimizes the comprehensive performance of the thin film transistor.
The embodiment of the invention provides an oxide semiconductor thin film transistor, which comprises a substrate, a grid electrode insulating layer, an oxide semiconductor layer and a source drain metal layer, wherein the grid electrode, the grid electrode insulating layer, the oxide semiconductor layer and the source drain metal layer are sequentially arranged on the substrate; portions of the first oxide layer are exposed from both sides of the second oxide layer, and the source and drain electrodes are spaced apart from each other and are in direct contact connection with the first oxide layer exposed from both sides of the second oxide layer, respectively.
Further, the oxygen content of the first oxide layer is 0% -50%, and the oxygen content of the second oxide layer is 4% -60%.
Further, the width M of the first oxide layer exposed from each side of the second oxide layer is 1 to 8 μm.
Further, the source electrode covers the first oxide layer exposed from one side of the second oxide layer and extends a part of the second oxide layer in the direction of the second oxide layer, and the drain electrode covers the first oxide layer exposed from the other side of the second oxide layer and extends a part of the second oxide layer in the direction of the second oxide layer.
Further, a width N of a stacked position of the source electrode and the second oxide layer and a stacked position of the drain electrode and the second oxide layer is 1 μm or more.
Further, the thickness D1 of the first oxide layer is 10 to 90 nm, and the thickness D2 of the second oxide layer is 10 to 90 nm.
Further, the width X1 of the first oxide layer is 10 to 20 micrometers, the width X2 of the second oxide layer is 4 to 18 micrometers, the distance between the source electrode and the drain electrode is 2 to 8 micrometers, and the width M of the exposed parts of the first oxide layer from the two sides of the second oxide layer is 1 to 8 micrometers.
Further, the materials of the first oxide layer and the second oxide layer are both metal oxides.
The invention also provides a manufacturing method of the oxide semiconductor thin film transistor, which comprises the following steps: a substrate is provided, and a grid electrode is formed on the substrate in a patterning mode. A gate insulating layer is formed on the substrate and covers the gate electrode. And sequentially preparing a first metal oxide layer and a second metal oxide layer positioned on the first metal oxide layer on the gate insulating layer, wherein the oxygen content of the formed first metal oxide layer is smaller than that of the second metal oxide layer. Coating a layer of photoresist material on the second metal oxide layer and patterning to form a photoresist layer; the photoresist layer comprises a first photoresist region and a second photoresist region, the second photoresist region corresponds to a region where the second oxide layer is formed, and the first photoresist region corresponds to a region where the first oxide layer is formed and the position of the second oxide layer is removed; the height T1 of the second photoresist region is greater than the height T2 of the first photoresist region. The second metal oxide layer and the first metal oxide layer, which are not covered by the photoresist layer, are etched away to form a first oxide layer. The photoresist layer is thinned to completely remove the photoresist material in the first photoresist region. And under the coverage protection of the second photoresist region, etching to remove the second metal oxide layer in the first photoresist region to form a second oxide layer and exposing part of the first oxide layer from two sides of the second oxide layer. Removing the photoresist material of the second photoresist region; and forming a source and a drain.
Further, the first metal oxide layer and the second metal oxide layer are sputtered by adopting the same target material, the oxygen-argon flow ratio of the first metal oxide layer entering the coating chamber in the sputtering process is x to y, wherein the range of x is 0-3, and the range of y is 5-20; the oxygen argon flow ratio of the second metal oxide layer entering the coating chamber in the sputtering process is a to b, wherein the range of a is 3 to 10, and the range of b is 5 to 20; and x and y are smaller than a and b.
The embodiment of the invention provides an oxide semiconductor thin film transistor and a manufacturing method thereof, wherein the oxide semiconductor thin film transistor comprises a substrate, a grid electrode insulating layer, an oxide semiconductor layer and a source drain metal layer which are sequentially arranged on the substrate, wherein the source drain metal layer comprises a source electrode and a drain electrode which are arranged at intervals, the oxide semiconductor layer comprises a first oxide layer and a second oxide layer which is arranged above the first oxide layer in a lamination manner, and the oxygen content of the first oxide layer is lower than that of the second oxide layer; part of the first oxide layer is exposed from two sides of the second oxide layer, and the source electrode and the drain electrode are mutually spaced and respectively in direct contact connection with the first oxide layer exposed from two sides of the second oxide layer, so that the source electrode, the drain electrode and the oxide semiconductor layer form better ohmic contact, the on-state current of the thin film transistor is effectively improved, and the comprehensive performance of the thin film transistor is optimized.
Drawings
Fig. 1 is a schematic structural diagram of a conventional oxide semiconductor thin film transistor.
Fig. 2 is a schematic structural diagram of another conventional oxide semiconductor thin film transistor.
Fig. 3 is a schematic cross-sectional view of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.
Fig. 4A to 4H are schematic cross-sectional views illustrating a process of fabricating an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.
Fig. 5 is a front view showing a part of the structure of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention.
Detailed Description
In order to further describe the technical manner and efficacy of the present invention for achieving the intended purpose, the following detailed description of the embodiments, structures, features and efficacy of the invention refers to the accompanying drawings and examples.
Fig. 3 is a schematic cross-sectional view of an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention, referring to fig. 3, the oxide semiconductor thin film transistor includes a substrate 110, a gate electrode 120, a gate insulating layer 130, an oxide semiconductor layer 140 and a source/drain metal layer 150 sequentially disposed on the substrate 110, the source/drain metal layer 150 includes a source electrode 151 and a drain electrode 152 disposed at intervals, the oxide semiconductor layer 140 includes a first oxide layer 141 and a second oxide layer 142 stacked over the first oxide layer 141, and the oxygen content of the first oxide layer 141 is lower than that of the second oxide layer 142; portions of the first oxide layer 141 are exposed from both sides of the second oxide layer 142, and the source electrode 151 and the drain electrode 152 are respectively in direct contact connection with the first oxide layer 141 exposed from both sides of the second oxide layer 142.
The oxide semiconductor layer 140 is a conductive channel (i.e., an active layer) shorting the source 151 and drain 152. According to the invention, the second oxide layer 142 with high oxygen content is arranged above the first oxide layer 141 with low oxygen content, and the first oxide layer 141 is exposed from two sides of the second oxide layer 142 to be respectively contacted with the source electrode 151 and the drain electrode 152, so that good ohmic contact is formed between the first oxide layer 141 and the source electrode 151 and between the first oxide layer 141 and the drain electrode 152, the on-state current of the thin film transistor is effectively improved, and the comprehensive performance of the thin film transistor is optimized.
Further, the oxygen content of the first oxide layer 141 is 0% to 50%, and the oxygen content of the second oxide layer 142 is 4% to 60%.
Wherein the first oxide layer 141 and the second oxide layer 142 are prepared by a magnetron sputtering method, and the oxygen content of the first oxide layer 141 and the second oxide layer 142 can be controlled by adjusting the volume ratio (oxygen-argon flow ratio) of the flow of oxygen (O 2) and the flow of argon (Ar) entering the coating chamber during the preparation. The first oxide layer 141 has a lower oxygen content, more oxygen vacancies, a higher carrier concentration than the second oxide layer 142, and higher electron mobility.
Further, the width M of the first oxide layer 141 exposed from each side of the second oxide layer 142 is 1 to 8 μm.
Further, the source 151 and the drain 152 are also in contact connection with a portion of the second oxide layer 142 to entirely cover the first oxide layer 141. Specifically, the source electrode 151 covers the first oxide layer 141 exposed from one side of the second oxide layer 142 and extends to the second oxide layer 142 direction to cover a portion of the second oxide layer 142, the drain electrode 152 covers the first oxide layer 141 exposed from the other side of the second oxide layer 142 and extends to the second oxide layer 142 direction to cover a portion of the second oxide layer 142, and a portion of the second oxide layer 142 is exposed from the middle of the source electrode 151 and the drain electrode 152.
Further, as shown in fig. 4H, the width N of the stacked position of the source 151 and the second oxide layer 142 and the width N of the stacked position of the drain 152 and the second oxide layer 142 are each greater than or equal to 1 μm, and the widths of the stacked positions of the source 151, the drain 152 and the second oxide layer 142 may be equal.
Further, as shown in fig. 4G, the thickness D1 of the first oxide layer 141 is 10 to 90 nm, and the thickness D2 of the second oxide layer 142 is 10 to 90 nm.
Further, as shown in fig. 4G and 4H, the width X1 of the first oxide layer 141 is 10 to 20 micrometers, and the width X2 of the second oxide layer 142 is 4 to 18 micrometers; the distance between the source 151 and the drain 152 (i.e., channel length) is 2-8 microns; the width M of the exposed portions of the first oxide layer 141 from both sides of the second oxide layer 142 is 1 to 8 μm.
Further, the materials of the first oxide layer 141 and the second oxide layer 142 are both metal oxides, specifically, for example, indium Gallium Zinc Oxide (IGZO).
Indium gallium zinc oxide is a mixed oxide doped with indium (In) and gallium (Ga) elements based on zinc oxide (ZnO), and the main function of indium and gallium as doping elements is to adjust carrier concentration. The carrier of the indium gallium zinc oxide is mainly generated by Oxygen Vacancies (OV), and under a specific external environment, the metal oxide can cause Oxygen in the crystal lattice to be separated and lead to Oxygen deficiency, so as to form Oxygen vacancies. The greater the number of oxygen vacancies, the higher the carrier concentration and vice versa. Therefore, the carrier concentration can be adjusted by controlling the oxygen content, so that the oxide semiconductor layer 140 has different electron mobility.
According to the oxide semiconductor thin film transistor, the oxide semiconductor layer 140 with the double-layer structure of the first oxide layer 141 and the second oxide layer 142 is adopted, the first oxide layer 141 with lower oxygen content is exposed from two sides of the second oxide layer 142 with higher oxygen content to be respectively in contact connection with the source electrode 151 and the drain electrode 152, good ohmic contact is formed between the oxide semiconductor layer 140 and the source electrode 151 and between the oxide semiconductor layer 140 and the oxide semiconductor layer 152, on-state current of the thin film transistor is improved, and comprehensive performance of the thin film transistor is further improved.
Fig. 4A to 4H are schematic cross-sectional views illustrating a process of fabricating an oxide semiconductor thin film transistor according to a preferred embodiment of the present invention, and referring to the following, the oxide semiconductor thin film transistor adopts a gray-scale Mask (Half-tone Mask) exposure and dry etching technology, so that the DSCL structure with the special shape can be realized, and the manufacturing method of the oxide semiconductor thin film transistor specifically comprises the following steps:
as shown in fig. 4A, a substrate 110 is provided, and a gate electrode 120 is patterned on the substrate 110, and the method for forming the gate electrode 120 is a conventional mature technology and will not be described herein.
As shown in fig. 4B, a gate insulating layer 130 is formed on the substrate 110 to cover the gate electrode 120, and then two metal oxide layers including a first metal oxide layer 141a in direct contact with the gate insulating layer 130 and a second metal oxide layer 142a on the first metal oxide layer 141a are sequentially formed on the gate insulating layer 130 such that the oxygen content of the first metal oxide layer 141a is less than the oxygen content of the second metal oxide layer 142 a. Wherein the first metal oxide layer 141a is used to form the first oxide layer 141 of the oxide semiconductor layer 140, and the second metal oxide layer 142a is used to form the second oxide layer 142 of the oxide semiconductor layer 140.
Specifically, the first metal oxide layer 141a and the second metal oxide layer 142a are sequentially prepared by using a magnetron sputtering method, and the same target material is adopted for sputtering, and the target material is formed by mixing zinc oxide, indium oxide and gallium oxide according to a specific proportion.
The method of forming the first metal oxide layer 141a having an oxygen content smaller than that of the second metal oxide layer 142a includes: when the first metal oxide layer 141a is deposited, the flow ratio of oxygen to argon entering the film plating chamber is x to y, wherein x ranges from 0 to 3, and y ranges from 5 to 20; when the second metal oxide layer 142a is deposited, the flow ratio of oxygen to argon entering the film plating chamber is a to b, wherein the range of a is 3 to 10, and the range of b is 5 to 20; and x: y is less than a: b, i.e., the oxygen argon flow is higher when depositing the second metal oxide layer 141a than when depositing the first metal oxide layer 141 a.
Taking x: y=0:10 as an example, specifically, for example, the oxygen flow rate into the plating chamber at the time of depositing the first metal oxide layer 141a is 0 standard state milliliter/minute (SCCM), and the argon flow rate is 10 standard state milliliter/minute (SCCM). Taking a: b=2:10 as an example, specifically, for example, the oxygen flow rate into the plating chamber at the time of depositing the second metal oxide layer 141a is 2 standard state milliliters/minute (SCCM), and the argon flow rate is 10 standard state milliliters/minute (SCCM).
The oxide semiconductor layer 140 is prepared by using a magnetron sputtering method, the material of the oxide semiconductor layer 140 is indium gallium zinc oxide, and the growth temperature and the post-treatment temperature below 350 ℃ enable the indium gallium zinc oxide to be grown on the glass substrate in a large scale by using the magnetron sputtering method. Therefore, a large-sized display panel can be manufactured using the structure of the oxide semiconductor thin film transistor of the present invention.
As shown in fig. 4C, a photoresist layer 200 is formed by coating a photoresist layer on the second metal oxide layer 142a, and patterning the photoresist layer by using a photomask process, wherein the photoresist layer 200 includes a first photoresist region 201 and a second photoresist region 202, wherein the second photoresist region 202 corresponds to a region where the second oxide layer 142 is formed at a later stage, and the first photoresist region 201 corresponds to a region where the first oxide layer 141 is formed at a later stage, and the second oxide layer 142 is removed, that is, a region where the second oxide layer 142 is exposed from both sides of the first oxide layer 141. Wherein the height T1 of the second photoresist region 202 is greater than the height T2 of the first photoresist region 201. The photoresist material in other areas is removed entirely.
Specifically, half-exposing the first photoresist region 201 by using a half-tone mask (half-tone mask) or a gray-tone mask (gray-tone mask), wherein the half-tone mask is provided with a semi-transmissive film at the position of the first photoresist region 201, and exposure energy of the photoresist on the first photoresist region 201 is reduced by the semi-transmissive film; the gray tone mask is provided with a plurality of slits (slit) closely spaced at the position of the first photoresist region 201, and light diffraction through the slits reduces exposure energy to the rear first photoresist region 201. Taking a positive photoresist as an example, during exposure, the photoresist in the second photoresist region 202 is not exposed, the photoresist in the first photoresist region 201 is half exposed, and the photoresist in other regions is completely exposed, so that development is performed after exposure, so that the photoresist thickness T2 of the first photoresist region 201 is smaller than the photoresist thickness T1 of the second photoresist region 202 in the photoresist layer 200 left after development.
As shown in fig. 4D, the second metal oxide layer 142a and the first metal oxide layer 141a, which do not cover the photoresist layer 200, are etched away. That is, the second metal oxide layer 142a and the first metal oxide layer 141a are etched using the photoresist layer 200 as a mask, the second metal oxide layer 142a and the first metal oxide layer 141a which are not covered by the photoresist layer 200 are sequentially etched away, and the second metal oxide layer 142a and the first metal oxide layer 141a which are covered by the photoresist layer 200 remain after etching, wherein the remaining first metal oxide layer 141a is the first oxide layer 141. This step may be performed by wet etching or dry etching.
As shown in fig. 4E, the photoresist layer 200 is thinned, so that the photoresist material of the first photoresist region 201 is completely removed.
Specifically, the photoresist material remaining in the first photoresist region 201 after the half exposure is completely removed to expose a portion of the second metal oxide layer 142a located in the first photoresist region 201. Although the photoresist thickness of the second photoresist region 202 is also reduced in this step, since the photoresist thickness T1 of the second photoresist region 202 is much greater than the photoresist thickness T2 of the first photoresist region 201, a certain thickness of photoresist remains on the first photoresist region 201. It should be noted that the method for thinning the photoresist layer 200 includes wet photoresist stripping (SPM process), dry photoresist stripping, and organic solvent cleaning.
As shown in fig. 4F, the second metal oxide layer 142a located in the first photoresist region 201 is etched away under the coverage protection of the photoresist material of the second photoresist region 202, so as to form a second oxide layer 142 and expose a portion of the first oxide layer 141 from both sides of the second oxide layer 142. This step is half etching (removing only the second metal oxide layer 142a of the first photoresist region 201), and precise control of etching time is required, so dry etching is preferable. The second metal oxide layer 142a that is not etched away is the second oxide layer 142.
As shown in fig. 4G, the photoresist material of the second photoresist region 202 is completely removed, and this step may be performed in the same manner as the photoresist material described above.
As shown in fig. 3, 4H, and 5, a source electrode 151 and a drain electrode 152 are formed. Specifically, the source electrode 151 and the drain electrode 152 are patterned on the oxide semiconductor layer 140, the source electrode 151 and the drain electrode 152 being spaced apart from each other; the source electrode 151 covers the first oxide layer 141 exposed from one side of the second oxide layer 142 and extends to the second oxide layer 142 direction to cover a portion of the second oxide layer 142, the drain electrode 152 covers the first oxide layer 141 exposed from the other side of the second oxide layer 142 and extends to the second oxide layer 142 direction to cover a portion of the second oxide layer 142, and a portion of the second oxide layer 142 is exposed from the middle of the source electrode 151 and the drain electrode 152.
According to the oxide semiconductor thin film transistor provided by the invention, the first oxide layer 141 with the double-layer channel in the lower layer of the oxide semiconductor layer 140 is exposed from two sides of the second oxide layer 142 in the upper layer to be respectively in direct contact connection with the source electrode 151 and the drain electrode 152, and the oxygen content of the first oxide layer 141 is lower than that of the second oxide layer 142, so that the source electrode 151 and the drain electrode 152 form better ohmic contact with the oxide semiconductor layer 140, the on-state current of the thin film transistor is effectively improved, and the comprehensive performance of the thin film transistor is optimized.
The above description is only of the preferred embodiments of the oxide semiconductor thin film transistor and the method for manufacturing the same, but not limited to the preferred embodiments, and the invention is not limited to the preferred embodiments, but is not limited to the preferred embodiments, and any person skilled in the art will appreciate that the present invention can be used without departing from the scope of the invention, while the above disclosure is directed to various equivalent embodiments, which are capable of being modified or varied in several ways, any simple modification, equivalent changes and variation of the above embodiments according to the technical principles of the present invention will still fall within the scope of the present invention.
Claims (9)
1. An oxide semiconductor thin film transistor, comprising a substrate (110), a gate electrode (120), a gate insulating layer (130), an oxide semiconductor layer (140) and a source-drain metal layer (150) which are sequentially arranged on the substrate (110), wherein the source-drain metal layer (150) comprises a source electrode (151) and a drain electrode (152) which are arranged at intervals, and the oxide semiconductor thin film transistor is characterized in that the oxide semiconductor layer (140) comprises a first oxide layer (141) and a second oxide layer (142) which is arranged above the first oxide layer (141) in a lamination manner, the materials of the first oxide layer (141) and the second oxide layer (142) are metal oxides, and the oxygen content of the first oxide layer (141) is lower than that of the second oxide layer (142); part of the first oxide layer (141) is exposed from both sides of the second oxide layer (142), and the source electrode (151) and the drain electrode (152) are spaced apart from each other and are respectively in ohmic contact with the first oxide layer (141) exposed from both sides of the second oxide layer (142).
2. The oxide semiconductor thin film transistor according to claim 1, wherein an oxygen content of the first oxide layer (141) is 0% to 50%, and an oxygen content of the second oxide layer (142) is 4% to 60%.
3. The oxide semiconductor thin film transistor according to claim 1, wherein a width M of the first oxide layer (141) exposed from each side of the second oxide layer (142) is 1 to 8 μm.
4. The oxide semiconductor thin film transistor according to claim 1, wherein the source electrode (151) covers the first oxide layer (141) exposed from one side of the second oxide layer (142) and extends a part of the second oxide layer (142) in a direction of the second oxide layer (142), and wherein the drain electrode (152) covers the first oxide layer (141) exposed from the other side of the second oxide layer (142) and extends a part of the second oxide layer (142) in a direction of the second oxide layer (142).
5. The oxide semiconductor thin film transistor according to claim 4, wherein a width N of a stacked position of the source electrode (151) and the second oxide layer (142) and a stacked position of the drain electrode (152) and the second oxide layer (142) is greater than or equal to 1 μm.
6. The oxide semiconductor thin film transistor according to claim 1, wherein a thickness D1 of the first oxide layer (141) is 10 to 90 nm, and a thickness D2 of the second oxide layer (142) is 10 to 90 nm.
7. The oxide semiconductor thin film transistor according to claim 1, wherein a width X1 of the first oxide layer (141) is 10 to 20 micrometers, a width X2 of the second oxide layer (142) is 4 to 18 micrometers, a distance between the source electrode (151) and the drain electrode (152) is 2 to 8 micrometers, and a width M of an exposed portion of the first oxide layer (141) from both sides of the second oxide layer (142) is 1 to 8 micrometers.
8. A method for manufacturing the oxide semiconductor thin film transistor according to any one of claims 1 to 7, comprising:
providing a substrate (110), and patterning a gate (120) on the substrate (110);
forming a gate insulating layer (130) on the substrate (110) and covering the gate electrode (120);
Sequentially preparing a first metal oxide layer (141 a) and a second metal oxide layer (142 a) on the first metal oxide layer (141 a) on the gate insulating layer (130) and making the oxygen content of the first metal oxide layer (141 a) formed smaller than the oxygen content of the second metal oxide layer (142 a);
Coating a photoresist layer on the second metal oxide layer (142 a) and patterning the photoresist layer to form a photoresist layer (200); the photoresist layer (200) comprises a first photoresist region (201) and a second photoresist region (202), the second photoresist region (202) corresponds to a region where the second oxide layer (142) is formed, and the first photoresist region (201) corresponds to a region where the first oxide layer (141) is formed and the second oxide layer (142) is removed; the height T1 of the second photoresist region (202) is greater than the height T2 of the first photoresist region (201);
etching away the second metal oxide layer (142 a) and the first metal oxide layer (141 a) not covering the photoresist layer (200) to form the first oxide layer (141);
Thinning the photoresist layer (200) to completely remove the photoresist material of the first photoresist region (201);
Etching away the second metal oxide layer (142 a) located in the first photoresist region (201) under the coverage protection of the second photoresist region (202) to form the second oxide layer (142) and expose part of the first oxide layer (141) from two sides of the second oxide layer (142);
removing the photoresist material of the second photoresist region (202); and
A source electrode (151) and a drain electrode (152) are formed.
9. The method of manufacturing an oxide semiconductor thin film transistor according to claim 8, wherein the first metal oxide layer (141 a) and the second metal oxide layer (142 a) are sputtered with the same target, and an oxygen-argon flow ratio of the first metal oxide layer (141 a) into the coating chamber during sputtering is x:y, wherein x ranges from 0 to 3, and y ranges from 5 to 20; the oxygen argon flow ratio of the second metal oxide layer (142 a) entering the coating chamber in the sputtering process is a to b, wherein the range of a is 3-10, and the range of b is 5-20; and x and y are smaller than a and b.
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