Disclosure of Invention
The invention aims to solve the technical problem of providing an annular network audio system based on the INIC.
In order to solve the technical problems, the invention adopts the following technical scheme:
an annular network audio system based on INIC comprises a central processing unit, an MCU module, a DSP module and an INIC network module, wherein the central processing unit is respectively connected with the MCU module and the DSP module, the MCU module is connected with the DSP module and the INIC network module, the central processing unit is used for downloading or storing audio and transmitting the audio to the DSP module, the DSP module is used for converting the audio into any audio format, and the MCU module is used for configuring and managing the DSP module and the INIC network module through an I2C bus;
the INIC network module comprises a main node and a plurality of secondary nodes, wherein the secondary nodes are sequentially connected in series, the first secondary node and the last secondary node are connected with the main node to form an annular network, the main node and the secondary nodes form the annular network, the main node is used for sequentially transmitting audio formats converted by a DSP to the secondary nodes, each secondary node is connected with a power amplifier chip or an MIC sound acquisition module, the MIC sound acquisition module is used for acquiring sound and transmitting the sound to the main node through the secondary nodes, and then the sound is transmitted to the DSP module to be processed, and the power amplifier chip is connected with a loudspeaker.
Further, the DSP module is also configured to remove noise.
After the technical scheme is adopted, compared with the prior art, the invention has the following advantages:
the invention can add a plurality of secondary nodes, can support at most 30 secondary nodes, can arbitrarily increase or reduce the nodes in the range, is simple and convenient, and can meet the configuration requirements of all automobiles at the present stage; when a certain secondary node fails, the main node can automatically detect the transposition ecall mode, the network changes the annular trend into the unidirectional trend, other nodes can be normally used, all nodes cannot normally work due to a certain failed node, the failed node is easy to find, and the bandwidth efficiency is high (more than 96%).
The present invention will be described in detail below with reference to the accompanying drawings and examples.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth to illustrate, but are not to be construed to limit the scope of the invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", "clockwise", "counterclockwise", etc., indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
As shown in fig. 1, an INIC-based ring network audio system includes a central processing unit 1, an MCU module 2, a DSP module 3, and an INIC network module, where the central processing unit 1 is connected to the MCU module 2 and the DSP module 3, respectively, the MCU module 2 is connected to the DSP module 3 and the INIC network module, the central processing unit 1 is configured to download or store audio and transmit the audio to the DSP module 3, the DSP module 3 is configured to convert the audio into any audio format, and the MCU module 2 is configured and managed by the DSP module 3 and the INIC network module through an I2C bus;
the INIC network module includes main node 41 and a plurality of time node 42, a plurality of time node 42 series connection in order, first time node 42 and last time node 42 all are connected with main node 41, form ring network, main node 41 forms a ring network with time node 42, main node 41 is used for transmitting the audio format that DSP converted in proper order for time node 42, and every time node 42 all is connected with power amplifier chip 5 or MIC sound collection module 7, MIC sound collection module 7 is used for gathering sound and transmits main node 41 through time node 42, and the retransmission is handled for DSP module 3, power amplifier chip 5 is connected with speaker 6.
In one embodiment, the DSP module 3 is further configured to remove sound emitted from the speaker 6 from the collected sound.
In this embodiment, the model of the central processing unit 1 is a3920, the MCU module 2 employs MIMXRT1063DVL6A, and the DSP module 3 employs ADAU1467 of ADI;
as shown in fig. 2, the DSP module 3 is used to perform sound effect processing and echo cancellation on the I2S signal sent by the central processing unit 1, the chip has a U84 bit number, which has up to 294.912MHz, a 32-bit sigmaadsp core, 4 serial input ports, 4 serial output ports, 48 channels, a 32-bit digital I/O sampling rate up to 192khz, TDM, I2S are flexibly configured, and a left-right alignment PCM format, as shown in fig. 2, Q4 is an external triode, forms an external LDO with a pin3 and an IOVDD network of the DSP module 3 to generate a 1.2V core voltage, a pin25 and a pin26 are connected to a 12.288M passive crystal oscillator to provide a main clock for the DSP module 3, pin28 is a reset pin of the chip, and is connected to an M4 pin of the MCU module 2 after being connected to an RC circuit, and is connected to an M4 pin of the MCU module 2 through D9 to perform compatible processing with a U22 voltage monitoring chip, in order to simplify a hardware circuit, the DSP default RC circuit is selected to be used as a pin 383, and a reset pin 73742 is connected to a mac 31, the pin38 and the pin39 are selected as the IIC slave, the IIC slave is connected with the pinC1 and the pinF1 of the MCU module 2, and the MCU module 2 configures the DSP module 3 after being electrified; pin50, pin51, pin52 is the main node 41 which is connected with the INIC network module by I2S OUT, and outputs the sound source which is done with sound effect processing to the main node 41, pin84, pin85, pin86 is I2S IN, and is connected with the central processing unit 1, and is used for receiving the sound source sent from the central processing unit 1; pin58, pin59, pin60 is I2S OUT, connects to the central processing unit 1, sends the sound source which has done sound effect processing to the central processing unit 1, pin76, pin77, pin78 is I2S IN, connects to the master node 41, receives the sound source sent from the master node 41 and does processing; u18 is flash, DSP module 3 can choose to start from the flash, here we choose to start with I2C connected to MCU module 2; in the debugging stage, a J8 interface is selected to be connected with a burner for debugging, a D8 is an indicator light, when the burner is inserted, D8 is on, and when the burner is pulled out, D8 is off; DSP module 3 only needs the power supply of 3.3V can work, and theoretical operating current needs 268mA, and through above-mentioned scheme, DSP module 3 is to being the sound effect processing to the sound source that receives for the sound tone quality that we heard is more wonderful.
As shown in fig. 3, the master node 41 is OS81210 of michip, which is a highly integrated Intelligent Network for Interface Controller (INIC) of 50mbit/s automotive network, whose electro-physical layer (ePHY) is optimized for Unshielded Twisted Pair (UTP) copper. The QFN packaging chip is a 64-pin QFN packaging chip and is powered by 1.8V and 3.3V, a pin37 and a pin38 of a main node 41 are connected with an 18.432MHZ crystal oscillator, and a pin15 and a pin28 are reset pins and are connected with a U60 (voltage monitoring IC); d56 is used to control the power-up sequence of 1.8V and 3.3V; pin23, pin24 and pin29, wherein pin30 is two pairs of differential networks, the transmission rate is 50mbit/s, pin23 and pin24 are TX networks, and pin29 and pin30 are RX networks; pin47, pin48 is a USB interface, and is connected to the central processing unit 1 as a reserved interface, which will not be used here; pin55, pin56 is an I2C interface, is connected to pin J11 and pin K11 of MCU module 2, and is reserved to be connected to central processing unit 1, and I2C is configured by MCU module 2 powering on OSB 1210; the pin54 is connected to the pin1 of the MCU module 2 and is reserved to be connected to the central processing unit 1; u13 is an interface for debugging OS81210, when OS81210 works normally, D48 will be on, otherwise it will be off; the data transmission method comprises the following steps that pins 59, pin60, pin61 and pin62 are I2S interfaces, pin61 is a data input interface, pin62 is a data output interface, two paths of data share a frame clock and a bit clock, and the frame clock and the bit clock are respectively pin9 and pin 60; pin59, pin60, pin61 is connected to pin50, pin51, pin52 of U84; pin59, pin60, pin62 is connected to pin76, pin77, pin78 of U84; j6 is a differential network and power interface with pin3, pin7 connected to the RX network of the primary node 41, pin2, pin6 connected to the RX of the secondary node 42.
Through the scheme, the main node 41 is used for receiving the audio signals and transmitting the signals to the secondary nodes through the network, and the signal efficiency is high and the anti-interference capability is strong in the process.
As shown in fig. 4 and 6, the secondary node 42 is OS81216 of michip, the power amplifier chip 5 is FDA803D, which is a highly integrated intelligent network used for an interface controller (INIC) of a 50mbit/s car network, an electro-physical layer (ePHY) of the power amplifier chip is optimized for an Unshielded Twisted Pair (UTP) copper wire, and is a 48pin QFN package chip supplied with power by 1.8V and 3.3V, the pin28 and the pin29 of the secondary node 42 are connected with an 18.432MHZ crystal oscillator and supplied with power by 1.8V and 3.3V, and the pin20 is a power-on reset pin and connected to a voltage monitoring IC pin; d2 is used to control the power-up sequence of 1.8V and 3.3V; pin15, pin16 and pin21, wherein pin22 is two pairs of differential networks, the transmission rate is 50mbit/s, pin15 and pin16 are TX networks, pin21 and pin22 are RX networks, the 4 networks are connected to the base of 8 pins of J1, the RX network of J1 is connected to the master node 41, and the TX network is connected to the RX network of the next secondary node 42; the pin39, pin40 is an I2C network, and is connected to pins 19 and 20 of the power amplifier chip 5, and is used for configuring a register of the power amplifier chip 5; pin38 of the secondary node 42 is an interrupt pin and is connected with pin15 of the power amplifier chip 5; pins 2, 3, 4 and 5 of the secondary node 42 are connected with pins 10, 11, 12 and 13 of the power amplifier chip 5, and the four pins are used for controlling the starting sequence of the power amplifier chip 5(FDA 803D); the pin6 pin of the secondary node 42 is connected with the pin30 pin of the power amplifier chip 5 after the triode is reversed; the pins 42, 43 and 44 of the secondary node 42 are respectively a frame clock, a bit clock and data of the I2S, and are connected to the pins 24, 23 and 22 of the power amplifier chip 5; u6 is an interface for burning configuration of the secondary node 42; LED1 will light up when secondary node 42 is operating normally, and will go out otherwise;
through the above scheme, the secondary node 42 is configured to receive the ring network signal of the primary node, send the audio signal to the power amplifier chip 5, and transmit the ring network signal to the next secondary node 42.
As shown in FIG. 5, the secondary node 42 is OS81216 of MICROCHIP, and the MIC sound collection module 7 includes ICS-43434 and NS/ICS-43434, which are shown in FIG. 4, and differs from FIG. 4 in that pins 42, 43, and 44 of the secondary node 42 are connected to pins 1, 4, and 6 of the ICS-43434 and NS/ICS-43434, respectively, where NS/ICS-43434 is not attached and ICS-43434 is selected as the right-channel MIC.
Through the scheme, the last secondary node 42 is used for transmitting the sound collected by the MIC sound collection module 7 to the DSP module 3 for processing through the ring network, and then transmitting to the central processing unit 1.
Fig. 7 is a schematic structural diagram of an existing audio system, which is different from the existing system: 1. the invention supports sound effect processing, can eliminate echo and has strong DSP function; 2. the method can support at most 30 secondary nodes, can increase or decrease the nodes within a range at will, can meet the configuration requirements of all automobiles at present, can automatically detect that a main node is changed into an ecall mode after a certain node fails, can still normally use other nodes, and is easy to find out failure points.
The foregoing is illustrative of the best mode of the invention and details not described herein are within the common general knowledge of a person of ordinary skill in the art. The scope of the present invention is defined by the appended claims, and any equivalent modifications based on the technical teaching of the present invention are also within the scope of the present invention.