CN112071206A

CN112071206A - Display panel and display device

Info

Publication number: CN112071206A
Application number: CN202010966179.1A
Authority: CN
Inventors: 陈毅成; 文红
Original assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Current assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
Priority date: 2020-09-15
Filing date: 2020-09-15
Publication date: 2020-12-11
Anticipated expiration: 2040-09-15
Also published as: CN112071206B

Abstract

The application provides a display panel and a display device, which comprise a display area and a non-display area positioned on the periphery of the display area, wherein the non-display area comprises a binding area far away from one side of the display area; the bonding region is internally provided with a substrate, a driving circuit layer positioned on the substrate, a first bonding terminal positioned on the driving circuit layer and a second bonding terminal positioned on one side of the substrate far away from the driving circuit layer. The partial data lines on the driving circuit layer are arranged in different layers, so that the first partial data lines are electrically connected with the first binding terminals, the second partial data lines on the driving circuit layer are electrically connected with the second binding terminals, the number of binding terminals in a binding area is increased, and the technical problem that the process difficulty of the binding area terminals is increased due to the increase of the number of the data lines is solved.

Description

Display panel and display device

Technical Field

The present disclosure relates to display devices, and particularly to a display panel and a display device.

Background

With the requirement for screen definition becoming higher and higher while the television is becoming larger, a display panel with resolution of 8K or higher is a development trend.

As the resolution of the panel increases, the display panel will include more pixels, and thus the number of data lines will increase. And because the area of the binding area is fixed, the increase of the data lines corresponds to more binding terminals, so that the number of the terminals is increased, the size of the terminals and the distance between adjacent terminals are reduced, the process difficulty of the binding area terminals is increased, and the manufacturing cost of the display panel is improved.

Therefore, a display panel is needed to solve the above technical problems.

Disclosure of Invention

The application provides a display panel and a display device, which are used for solving the technical problem that the process difficulty of a binding area is improved due to the fact that the number of data lines of the existing display panel is too large.

In order to solve the above problems, the technical solution provided by the present application is as follows:

the application provides a display panel, which comprises a display area and a non-display area positioned on the periphery of the display area, wherein the non-display area comprises a binding area far away from one side of the display area;

the bonding region is internally provided with a substrate, a driving circuit layer positioned on the substrate, a first bonding terminal positioned on the driving circuit layer and a second bonding terminal positioned on one side of the substrate far away from the driving circuit layer;

the first part of data lines of the driving circuit layer are electrically connected with the first binding terminals, and the second part of data lines of the driving circuit layer are electrically connected with the second binding terminals.

In the display panel of the present application, the driving circuit layer includes a first gate layer and a second conductive layer on the substrate, and the second conductive layer includes a first source drain layer and a second source drain layer;

the first source drain layer is located on the first gate layer, at least one first-type data line in the first source drain layer is electrically connected with the first binding terminal, at least part of the second source drain layer is located on one side, far away from the first gate layer, of the substrate, and at least one second-type data line in the second source drain layer is electrically connected with the second binding terminal.

In the display panel of the present application, the second source drain layer is located on a side of the substrate away from the first gate layer;

in the top view direction of the display panel, the second type data lines in the second source drain layer and the first type data lines in the first source drain layer are arranged at intervals.

In the display panel of the present application, any one of the second type data lines includes a first conductive line, a second conductive line, and a third conductive line connecting the first conductive line and the second conductive line;

the first lead and the first source drain layer are arranged on the same layer, and the second lead is positioned on one side of the substrate far away from the first grid layer.

In the display panel of the present application, the display panel includes a first via hole, and the third lead is located in the first via hole;

the first via hole is positioned in a non-display area between a display area and the binding area; or the first via hole is positioned in a non-display area on one side of the display area, which is far away from the binding area.

In the display panel of the present application, the first lead and the second lead extend to a first side surface of the display panel away from the side of the bonding region, and the third lead is located in the first side surface.

In the display panel of the present application, the display panel further includes a second gate layer located between the substrate and the second source drain layer;

in any two adjacent first sub-pixels and second sub-pixels of the display panel, the first sub-pixels are driven by first thin film transistors formed by the first gate layer and the first source drain layers, and the second sub-pixels are driven by second thin film transistors formed by the second gate layer and the second source drain layers.

In the display panel of the application, a metal protective layer positioned on the driving circuit layer, and a flexible layer and an insulating protective layer positioned on the protective layer are also arranged in the binding region;

the insulating protective layer, the flexible layer, and the first binding terminal or the second binding terminal are disposed on the same layer, and the insulating protective layer is located between the flexible layer and the first binding terminal or the second binding terminal.

In the display panel of the present application, the first binding terminal or/and the second binding terminal is formed by at least one metal layer in the driving circuit layer.

The application also provides a display device, it includes above-mentioned display panel, and is located display panel binds first driver chip and second driver chip in the district, first driver chip passes through first binding the terminal with the display panel electricity is connected, second driver chip passes through the second bind the terminal with the display panel electricity is connected.

Has the advantages that: this application sets up through the different layer of partial data line on drive circuit layer for first partial data line with first binding the terminal electricity and connecting, the second partial data line on drive circuit layer with the terminal electricity is connected to the second binding, has increased the quantity of binding the terminal in the binding area, has avoided leading to binding the technical problem that the district terminal technology degree of difficulty increases because of data line increase in quantity.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

FIG. 1 is a first top view structural diagram of a display panel according to the present application;

FIG. 2 is a schematic diagram of a global cross-sectional structure of a display panel according to the present application;

FIG. 3 is a schematic view of a first cross-sectional structure of a display panel of the present application along section AA;

FIG. 4 is a schematic view of a first cross-sectional structure of a display panel of the present application along a section BB;

FIG. 5 is a schematic view of a second cross-sectional structure of a display panel of the present application along section BB;

FIG. 6 is a schematic view of a third cross-sectional structure of a display panel of the present application along section BB;

FIG. 7 is a second top view structural diagram of the display panel of the present application;

fig. 8 is a cross-sectional structural view of a bonding area of a display panel according to the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

The area of the binding area of the existing display panel is fixed, the number of terminals is increased due to the fact that the number of the data lines is increased corresponding to more binding terminals, the size of the terminals and the distance between adjacent terminals are reduced, the process difficulty of the binding area terminals is increased, and the manufacturing cost of the display panel is improved. The present application proposes the following technical solutions to solve the above technical problems.

Referring to fig. 1 to 5, the present application provides a display panel 100, which includes a display area 200 and a non-display area 300 located at a periphery of the display area 200, where the non-display area 300 includes a binding area 400 located at a side far from the display area 200.

A substrate 10, a driving circuit layer 20 located on the substrate 10, a first binding terminal 301 located on the driving circuit layer 20, and a second binding terminal 302 located on one side of the substrate 10 far from the driving circuit layer 20 are disposed in the binding region 400.

In this embodiment, a first portion of the data lines of the driving circuit layer 20 is electrically connected to the first binding terminal 301, and a second portion of the data lines of the driving circuit layer 20 is electrically connected to the second binding terminal 302.

This application sets up through the different layer of partial data line of drive circuit layer 20 for first partial data line with first binding terminal 301 electricity is connected, the second partial data line of drive circuit layer 20 with terminal 302 electricity is connected to the second binding, has increased the quantity of binding the terminal in binding district 400, has avoided leading to binding the technical problem that district 400 terminal technology degree of difficulty increases because of data line quantity increases.

The technical solution of the present application will now be described with reference to specific embodiments.

In this embodiment, the display panel 100 may be an LCD display panel 100 or an OLED display panel 100, and the present application is not limited in particular, and the OLED display panel 100 is taken as an example for description.

Referring to fig. 2, in the present embodiment, the display panel 100 may include a substrate 10, a driving circuit layer 20 on the substrate 10, a light emitting device layer 30 on the driving circuit layer 20, a thin film encapsulation layer 40 on the light emitting device layer, and a cover plate layer 50 on the thin film encapsulation layer. The light emitting device layer 30, the thin film encapsulation layer 40, and the cover plate layer 50 are conventional structures of the prior art, and will not be described in detail herein.

In this embodiment, the material of the substrate 10 may be determined according to the rigidity and flexibility of the product, such as a rigid material of glass, quartz, or a flexible material of polyimide.

In the present embodiment, the driving circuit layer 20 includes a plurality of thin film transistors. The thin film transistor may be of an etch-stop type, a back channel etch type, or a top gate thin film transistor type, and the like, and is not particularly limited. The thin film transistor, for example, a bottom gate thin film transistor type, may include a gate electrode on the substrate 10, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, source/drain electrodes on the active layer, and a passivation layer on the source/drain electrodes. Since the above structures are all in the prior art, they are not described in detail here.

In the display panel 100 of the present application, the driving circuit layer 20 includes a first gate layer and a second conductive layer on the substrate 10, and the second conductive layer includes a first source drain layer 21 and a second source drain layer 22.

The first source-drain layer 21 is located on the first gate layer, at least one first-type data line 210 in the first source-drain is electrically connected to the first binding terminal 301, at least a portion of the second source-drain layer 22 is located on a side of the substrate 10 away from the first gate layer, and at least one second-type data line 220 in the second source-drain is electrically connected to the second binding terminal 302.

Referring to fig. 3, in the cross section AA of fig. 1, the second source/drain layer 22 is located on a side of the substrate 10 away from the first gate layer. In the top view direction of the display panel 100, the second type data lines 220 in the second source drain layer 22 and the first type data lines 210 in the first source drain layer 21 are disposed at intervals.

In the present embodiment, the data lines of the display panel 100 include a first type data line 210 located at a first side of the substrate 10 and a second type data line 220 located at a second side of the substrate 10. Two sub-pixels can be spaced between two adjacent first-type data lines 210, and two sub-pixels can be spaced between two adjacent second-type data lines 220, that is, the distance between the data lines can be reduced, and when the first source drain layer 21 is processed, the process difficulty of the first source drain layer 21 can be reduced, and the process precision of the first source drain layer 21 can be reduced. For example, the distance between two adjacent data lines in the prior art is L, and the distance between two adjacent data lines of the first type 210 or the second type 220 in this application is 2L.

In this embodiment, the first side is a side of the substrate 10 close to the first source/drain layer 21, and the second side is a side of the substrate 10 far from the first source/drain layer 21.

Second, the second source or the second drain connected to the second type data line 220 may be disposed on the second source drain layer 22 or the first source drain layer 21, which is not specifically limited in this application. For example, when the second source/drain is located on the first source/drain layer 21, the second type data line 220 and the VDD or VSS signal line disposed on the same layer as the second type data line 220 may be disposed on the second side of the substrate 10, and the second source/drain is electrically connected to the second type data line 220 through a corresponding via hole. When the second source/drain electrode is located on the second source/drain electrode layer 22, the second type data line 220, the signal line such as VDD or VSS, etc. is disposed on the second side of the substrate 10, and the second source/drain electrode is electrically connected to the pixel electrode or other electrodes in the corresponding thin film transistor through the via hole.

In the display panel 100 of the present application, any one of the second type data lines 220 includes a first conductive line 221, a second conductive line 222, and a third conductive line 223 connecting the first conductive line 221 and the second conductive line 222.

In this embodiment, the first conductive line 221 and the first source/drain layer 21 are disposed in the same layer, and the second conductive line 222 is located on a side of the substrate 10 away from the first gate layer.

In this embodiment, the display panel 100 includes a first via 224, and the third conductive line 223 is located in the first via 224. Referring to fig. 4, in the BB section of fig. 1, the first via 224 is located in the non-display area 300 between the display area 200 and the bonding area 400; alternatively, referring to fig. 5, in the BB cross section of fig. 1, the first via 224 is located in the non-display area 300 on the side of the display area 200 away from the bonding area 400.

In this embodiment, the second type data lines 220 are arranged in segments, and the data lines in the first source/drain layer 21 are switched to the second side of the substrate 10 through the via holes. For the structure in fig. 4, the length of the second type data line 220 is the shortest, the resistance formed by the resistor-capacitor (RC) is the smallest, and the signal transmission delay is the smallest, but the structure between the display area 200 and the bonding area 400 forms a via hole for line change, which increases the process difficulty and the wiring difficulty of the first type data line 210. With the structure of fig. 5, although the length of the second type data line 220 is longer, the position of the first via 224 is located at a side far away from the bonding region 400, i.e., may be considered as an upper frame region of the display panel 100, and the arrangement of the position of the first via 224 does not affect the routing of the first type data line 210.

In the display panel 100 of the present application, the first conductive line 221 and the second conductive line 222 extend toward a first side of the display panel 100 away from the bonding region 400, and the third conductive line 223 is located in the first side.

Referring to fig. 6, in the BB cross section of fig. 1, the first conductive line 221 is located on the first source/drain layer 21, the second conductive line 222 is located on the second source/drain layer 22, and the third conductive line 223 is located on a side surface close to the upper frame. The third conductive line 223 is directly disposed outside the display panel 100 in the present embodiment, and the second data line 220 does not need to be replaced through a via hole.

In the display panel 100 of the present application, the display panel 100 further includes a second gate layer located between the substrate 10 and the second source drain layer 22. In any two adjacent first sub-pixels and second sub-pixels of the display panel 100, the first sub-pixels are driven by the first thin film transistor formed by the first gate layer and the first source/drain layer 21, and the second sub-pixels are driven by the second thin film transistor formed by the second gate layer and the second source/drain layer 22.

On the basis of the above embodiments, the present application may further provide a corresponding second gate layer on the second side of the substrate 10. Corresponding to moving the gate structure located in the first gate layer in the previous embodiment to the second gate layer.

For example, referring to the first subpixel X and the second subpixel Y marked in fig. 7, in the top view direction of the display panel 100, the first subpixel X may be driven by a first thin film transistor formed by the first gate layer and the first source/drain layer 21, and the second subpixel Y may be driven by a second thin film transistor formed by the second gate layer and the second source/drain layer 22.

In the display panel 100 of the present application, referring to fig. 8, a metal protection layer 60 located on the driving circuit layer 20, and a flexible layer 70 and an insulating protection layer 80 located on the metal protection layer 60 are further disposed in the bonding region 400. The insulating protection layer 80, the flexible layer 70, and the first binding terminal 301 or the second binding terminal 302 are disposed in the same layer, and the insulating protection layer 80 is located between the flexible layer 70 and the first binding terminal 301 or the second binding terminal 302.

Since the metal wires in the driving circuit layer 20 need a metal material with better conductivity, the metal belongs to the category of easy oxidation, such as metal aluminum. Therefore, the present application further provides a metal protection layer 60, such as metal titanium, on the driving circuit layer 20. In addition, in order to ensure the flexibility and the insulating property of the product, a flexible material and an insulating protective layer are further disposed on the metal protective layer 60, the flexible material may be polyimide, and the insulating protective layer may be an inorganic insulating material or the like. In addition, because the display panel 100 further includes the first binding terminal 301 and the second binding terminal 302, when the binding terminal transmits signals, a certain amount of heat is generated, and when the flexible material is close to the binding terminal, the organic material may be heated to fail, so the application sets the insulating protection layer 80 close to the binding terminal, and the flexible material is away from the binding terminal, i.e., the failure of the flexible material can be avoided, and the binding terminal and the metal layer below the insulating protection layer 80 can also be protected by the insulating protection layer 80.

In the display panel 100 of the present application, the first binding terminal 301 or/and the second binding terminal 302 is formed by at least one metal layer in the driving circuit layer 20. For example, after the driving circuit layer 20 is formed, at least one metal layer may be formed directly on the bonding region 400; alternatively, the first metal layer to which the terminal is bonded may be formed at the time of the gate forming process, and the second metal layer to which the terminal is bonded may be formed at the time of the source-drain forming process.

The present application further provides a display device, please refer to fig. 8, where the display device includes the display panel 100, and a first driver chip 901 and a second driver chip 902 located in the binding region 400 of the display panel 100, the first driver chip 901 is electrically connected to the display panel 100 through the first binding terminal 301, and the second driver chip 902 is electrically connected to the display panel 100 through the second binding terminal 302. The working principle of the display device can refer to the display panel 100, and detailed description thereof is omitted.

The application provides a display panel and a display device, which comprise a display area and a non-display area positioned on the periphery of the display area, wherein the non-display area comprises a binding area far away from one side of the display area; the bonding region is internally provided with a substrate, a driving circuit layer positioned on the substrate, a first bonding terminal positioned on the driving circuit layer and a second bonding terminal positioned on one side of the substrate far away from the driving circuit layer. This application sets up through the different layer of partial data line on drive circuit layer for first partial data line with first binding the terminal electricity and connecting, the second partial data line on drive circuit layer with the terminal electricity is connected to the second binding, has increased the quantity of binding the terminal in the binding area, has avoided leading to binding the technical problem that the district terminal technology degree of difficulty increases because of data line increase in quantity.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The display panel and the display device provided by the embodiments of the present application are described in detail above, and the principle and the implementation of the present application are explained in the present application by applying specific examples, and the description of the embodiments above is only used to help understanding the technical solution and the core idea of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims

1. The display panel is characterized by comprising a display area and a non-display area positioned on the periphery of the display area, wherein the non-display area comprises a binding area far away from one side of the display area;

2. The display panel according to claim 1, wherein the driving circuit layer comprises a first gate layer and a second conductive layer on the substrate, and the second conductive layer comprises a first source drain layer and a second source drain layer;

3. The display panel according to claim 2, wherein the second source drain layer is located on a side of the substrate away from the first gate layer;

4. The display panel according to claim 2, wherein any one of the second type data lines comprises a first conductive line, a second conductive line, and a third conductive line connecting the first conductive line and the second conductive line;

5. The display panel of claim 4, wherein the display panel comprises a first via, and the third lead is located within the first via;

6. The display panel of claim 4, wherein the first lead and the second lead extend toward a first side of the display panel on a side away from the bonding region, and wherein the third lead is located within the first side.

7. The display panel according to claim 4, further comprising a second gate layer between the substrate and the second source-drain layer;

8. The display panel according to claim 4, wherein a metal protection layer on the driving circuit layer, and a flexible layer and an insulating protection layer on the protection layer are further disposed in the bonding region;

9. The display panel according to claim 4, wherein the first binding terminal or/and the second binding terminal is formed by at least one metal layer in the driving circuit layer.

10. A display device, comprising the display panel according to any one of claims 1 to 9, and a first driver chip and a second driver chip located in the display panel bonding region, wherein the first driver chip is electrically connected to the display panel through the first bonding terminal, and the second driver chip is electrically connected to the display panel through the second bonding terminal.