CN112015352B

CN112015352B - Storage block device identification device, system and storage block device reading and writing method

Info

Publication number: CN112015352B
Application number: CN202011129032.3A
Authority: CN
Inventors: 赵二城
Original assignee: Capitalonline Data Service Co ltd
Current assignee: Capitalonline Data Service Co ltd
Priority date: 2020-10-21
Filing date: 2020-10-21
Publication date: 2021-01-22
Anticipated expiration: 2040-10-21
Also published as: CN112015352A

Abstract

The application provides a device and a system for identifying storage block equipment and a method for reading and writing the storage block equipment, wherein a first operating system runs on the device for identifying the storage block equipment, a first network card is arranged in the device for identifying the storage block equipment, and a second operating system runs in the first network card; the first operating system comprises a driving module, and the second operating system comprises a block device identification module and a channel simulation module, wherein the block device identification module is used for identifying a storage block device of the back-end storage device so as to mount the identified storage block device into the second operating system; the channel simulation module is used for simulating a PCIe channel so that the storage block device mounted by the second operating system is connected with the driving module through the PCIe channel; and the drive module is used for correspondingly identifying the storage block equipment connected through the PCIe channel as the NVMe hard disk in the first operating system. The method and the device are beneficial to improving the storage performance of the system.

Description

Storage block device identification device, system and storage block device reading and writing method

Technical Field

The present application relates to data processing technologies, and in particular, to a device and a system for identifying a storage block device, and a method for reading and writing the storage block device.

Background

Due to the Solid State Disk (SSD) and the NVMe hard Disk, the hardware performance is greatly improved. At this time, in order to fully exert the performance of the SSD and the NVMe hard disk, an NVMe Input/Output (IO) architecture appears, and a bottom interface required by the NVMe IO architecture is a PCIe interface.

However, most of the current backend storage systems employ Internet Small Computer System Interface (ISCSI) or Fibre Channel (FC) interfaces, or factory-defined interfaces such as scala IO and ceph backend storage. The existing stage of architecture cannot fully exert the performance of the SSD and the NVMe hard disk.

Disclosure of Invention

The embodiment of the application provides a storage block device identification device, a storage block device identification system and a storage block device reading and writing method, which aim to solve the problems in the related art, and the technical scheme is as follows:

in a first aspect, an embodiment of the present application provides a storage block device identification apparatus, where a first operating system runs on the storage block device identification apparatus, a first network card is arranged in the storage block device identification apparatus, and a second operating system runs in the first network card;

the first operating system comprises a driving module, the second operating system comprises a block device identification module and a channel simulation module, wherein,

the block device identification module is used for identifying the storage block devices of the back-end storage device so as to mount the identified storage block devices into the second operating system;

the channel simulation module is used for simulating a PCIe channel so that the storage block device mounted by the second operating system is connected with the driving module through the PCIe channel;

and the drive module is used for correspondingly identifying the storage block equipment connected through the PCIe channel as the NVMe hard disk in the first operating system.

In one embodiment, the block device identification module includes: a storage interface layer, a storage service layer, a block device mount layer, and a driver layer, wherein,

the storage interface layer comprises at least one storage interface which is used for connecting the channel simulation module;

the driving layer includes at least one block device driving unit;

a block device mounting layer for mounting a storage block device of the back-end storage apparatus;

and the storage service layer is used for analyzing the read-write instruction received by the at least one storage interface and calling the corresponding block device driving unit to distribute the read-write instruction to the target storage block device according to the analysis result.

In one embodiment, the storage interface includes an internet small computer system interface, a virtual host system interface, and an NVMe-of interface;

the at least one block device driving unit comprises a solid state disk driving unit and an NVMe driving unit;

the storage block device comprises at least one of a linux asynchronous input and output device, a ceph device, an NVMe device and an object storage device.

In one embodiment, the channel simulation module includes a channel submodule and a protocol conversion submodule, wherein,

the protocol conversion submodule is used for realizing protocol conversion between the PCIe channel and the storage interface so that the PCIe channel supports each storage interface;

and the channel submodule is used for simulating a PCIe channel so as to enable the storage block device mounted by the second operating system to be connected with the driving module through the PCIe channel.

In a second aspect, an embodiment of the present application provides a storage block device identification system, where the system includes a storage block device identification apparatus and a backend storage apparatus provided in any embodiment of the present application, where the storage block device identification apparatus is connected to the backend storage apparatus, a storage operating system is run on the backend storage apparatus, and a plurality of storage block devices are provided in the storage operating system.

In an implementation manner, the back-end storage device further includes a second network card, and the second network card is respectively connected to the storage operating system and the first network card, so that the plurality of storage block devices of the storage operating system are connected to the block device identification module.

In one implementation mode, the system further comprises a switch, one end of the switch is connected with the first network card, and the other end of the switch is connected with the second network card.

In a third aspect, a method for reading and writing a storage block device in an embodiment of the present application is applied to a storage block device identification apparatus in any embodiment of the present application, and the method for reading and writing a storage block device includes:

receiving a first read-write instruction to the NVMe hard disk through a drive module;

sending the first read-write instruction to the block device identification module through the PCIe channel simulated by the channel simulation module;

and determining a target storage block device corresponding to the first read-write instruction in the storage block devices mounted by the second operating system through the block device identification module, and sending the first read-write instruction to the target storage block device.

In one embodiment, the channel simulation module includes a channel submodule and a protocol conversion submodule, and then, the PCIe channel simulated by the channel simulation module sends the first read-write instruction to the block device identification module, including:

receiving a first read-write instruction from the driving module through a PCIe channel simulated by the channel sub-module, and sending the first read-write instruction to the protocol conversion sub-module;

performing protocol conversion on the first read-write instruction through a protocol conversion sub-module to obtain a second read-write instruction, and sending the second read-write instruction to a storage interface corresponding to the block equipment identification module;

determining a target storage block device corresponding to the first read-write instruction, and sending the first read-write instruction to the target storage block device, including:

and analyzing the second read-write instruction, determining a target storage block device corresponding to the second read-write instruction, and calling a corresponding block device driving unit to distribute the second read-write instruction to the target storage block device.

In a third aspect, an embodiment of the present application provides a device for reading and writing a storage block device, where the device includes: a memory and a processor. Wherein the memory and the processor are in communication with each other via an internal connection path, the memory is configured to store instructions, the processor is configured to execute the instructions stored by the memory, and the processor is configured to perform the method of any of the above aspects when the processor executes the instructions stored by the memory.

The advantages or beneficial effects in the above technical solution at least include: and identifying a plurality of storage block devices of the back-end storage device through the block device identification module so as to load the storage block devices in the second operating system. And then, the storage block device is connected with the first operating system through a PCIe channel simulated by the channel simulation module, and the storage block device connected through the PCIe channel is identified through a driving module of the first operating system, so that the storage block device is finally identified as an NVMe hard disk for use in the first operating system. According to the embodiment of the application, the storage block device identification device can also exert the performances of the SSD and the NVMe hard disk under the condition that the PCIe interface is not provided, and the overall storage performance of the system can be improved.

The foregoing summary is provided for the purpose of description only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the present application will be readily apparent by reference to the drawings and following detailed description.

Drawings

In the drawings, like reference numerals refer to the same or similar parts or elements throughout the several views unless otherwise specified. The figures are not necessarily to scale. It is appreciated that these drawings depict only some embodiments in accordance with the disclosure and are therefore not to be considered limiting of its scope.

FIG. 1 is a diagram illustrating the operation of a memory block device identification commonly used in the prior art;

fig. 2 is a block diagram of a memory block device identification apparatus according to an embodiment of the present application;

FIG. 3 is a schematic diagram illustrating an operation of an apparatus for identifying a memory block device according to an embodiment of the present application;

FIG. 4 is a block diagram of a block device identification module according to an embodiment of the present application;

FIG. 5 is a block diagram of a channel simulation module according to an embodiment of the present application;

FIG. 6 is a block diagram of a memory block device identification system according to an embodiment of the present application;

FIG. 7 is a flowchart of a method for reading from and writing to a memory block device according to an embodiment of the present application;

fig. 8 is a flowchart of how to send a read/write command to a block device identification module through a channel simulation module in the storage block device read/write method according to the embodiment of the present application;

fig. 9 is a block diagram of a structure of a read/write device of a storage block device according to an embodiment of the present application.

Detailed Description

In the following, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present application. Accordingly, the drawings and description are to be regarded as illustrative in nature, and not as restrictive.

Fig. 1 shows a schematic diagram of the operation of memory block device identification, which is commonly used in the prior art. Referring to fig. 1, a network connection is made between a host system and a back-end storage system. Specifically, the host system and the back-end storage system are respectively provided with a network card, and the network card of the host system is connected with the network card of the back-end storage system through a switch. Through the network connection structure, a plurality of storage block devices (such as LUN1, LUN2, and LUN3 in the storage backend system) are directly mounted into the host system. The working process of fig. 1 shows how the host system implements the cloud storage function to meet the cloud storage requirement of the user.

However, in the prior art, since the backend storage system interface is not a PCIe interface, the host system cannot adopt NVMe drive, and the backend storage performance is low. Because the NVMe IO architecture is required if the performance of SSD and NVMe hard disks is to be fully exploited, while the underlying interface required by the NVMe IO architecture is the PCIe interface.

Fig. 2 illustrates a block diagram of a memory block device identification apparatus 200 according to an embodiment of the present application. Referring to fig. 2, a first operating system 201 runs on the storage block device identification apparatus 200, a first network card 202 is arranged in the storage block device identification apparatus 200, and a second operating system 203 runs in the first network card 202.

The first operating system 201 includes a driver module 2011, and the second operating system 203 includes a block device identification module 2031 and a channel simulation module 2032, wherein,

a block device identification module 2031, configured to identify a storage block device of the backend storage apparatus, so as to mount the identified storage block device to the second operating system;

the channel simulation module 2032 is configured to simulate a PCIe channel, so that the memory block device mounted on the second operating system 203 is connected to the driver module 2011 through the PCIe channel;

the driver module 2011 is configured to correspondingly identify, in the first operating system 201, the storage block device connected through the PCIe channel as an NVMe hard disk.

The block device is one of I/O devices, stores information in blocks of a fixed size, each block having its own address, and can read data of a certain length at any position of the device, such as a hard disk, a U disk, or a Secure Digital Memory Card (SD Card).

Among them, pcie (peripheral component interconnect express) is a high-speed serial computer expansion bus standard, and is intended to replace the old PCI bus standard. PCI is an abbreviation for Peripheral Component Interconnect (PCI), which is the most widely used interface in personal computers today, and PCI slot is the type of motherboard with the largest number of slots.

Nvm (nonvolatile memory), which represents fixed memory, nonvolatile memory. Nvme (nvm express), or Non-Volatile Memory host controller interface specification (Non-Volatile Memory express), is a logical device interface specification. The bus transfer protocol specification (corresponding to the application layer in the communication protocol) based on the device logic interface is used for accessing the nonvolatile memory medium attached through the PCIe bus.

Mount (mounting) in this embodiment refers to a process by which a computer file and directory on a storage device (such as a hard disk, CD-ROM, or shared resource) is made available to a user through the file system of the computer by an operating system.

The storage block device identification apparatus provided in this embodiment identifies a plurality of storage block devices of the backend storage apparatus 300 by the block device identification module 2031, so as to load the storage block devices in the second operating system 203. Then, the storage block device is connected to the first operating system 201 through the PCIe channel simulated by the channel simulation module 2032, and the storage block device connected through the PCIe channel is identified by the driver module 2011 of the first operating system 201, so that the storage block device is finally identified as the NVMe hard disk for use in the first operating system. According to the embodiment of the application, the storage block device identification device can completely exert the performances of the SSD and the NVMe hard disk under the condition that the PCIe interface is not provided, so that the storage performance is improved.

Referring to fig. 3, a plurality of storage block devices LUN1, LUN2, and LUN3 are provided in the back-end storage apparatus 300. The storage block device identification apparatus provided in this embodiment performs a storage block device identification process by:

(1) mounting storage block devices LUN1, LUN2, and LUN3 on second operating system 203 by block device identification module 2031;

(2) the channel simulation module 2032 simulates PCIe channels PCIe1, PCIe2, and PCIe3, and PCIe channels PCIe1, PCIe2, and PCIe3 connect the storage block device LUN1, LUN2, and LUN3 to the driver module 2011 of the first operating system 201 in a one-to-one correspondence;

(3) the storage block devices LUN1, LUN2, and LUN3 are mounted to the first operating system 201 by the driver module 2011, and are correspondingly identified as NVMe hard disks for use in the first operating system 201. For example, in fig. 3, storage block device LUN1 is identified as hard disk NVMe1, storage block device LUN2 is identified as hard disk NVMe2, and storage block device LUN3 is identified as hard disk NVMe 3.

In one example, the device driver code of driver module 2011 runs in kernel mode, driven by NVME implemented in kernel mode, to access PCIe lanes. Kernel mode refers to a mode run in the kernel of an operating system, and code running in the mode can access system memory and external devices without limitation.

In one example, the back-end storage 300 is located in a server or cloud.

In one example, first network card 202 is a Smart network card (Smart NIC). The core of the intelligent network card is that a Central Processing Unit (CPU) is assisted by a Field Programmable Gate Array (FPGA) to process network load, and a network interface function is programmed, so that the intelligent network card has the characteristics of supporting function customization of a data plane and a control plane and assisting the CPU to process the network load through FPGA localized programming.

In an example, the first operating system 201 may further be compatible with a Remote Direct data Access (RDMA) protocol during the process of identifying the storage block device of the back-end storage apparatus by the block device identification module 2031. The RDMA protocol is a communication protocol, and the RDMA protocol is compatible to improve communication bandwidth.

In one embodiment, the block device identification module 2031 may employ a storage capability development kit (SPDK). The SPDK is developed based on NVMe-SSD hardware and is used for writing high-performance and telescopic user mode storage application programs. The specific structure of the block device identification module may be exemplified as follows:

referring to fig. 4, the block device identification module 2031 comprises: a storage interface layer 401, a storage service layer 402, a block device mount layer 403, and a driver layer 404; the storage service layer 402 is connected to the storage interface layer 401, the block device mount layer 403, and the driver layer 404, respectively.

The memory interface layer 401 includes at least one memory interface for connecting the channel simulation module 2032.

In one example, the storage interfaces may include an Internet Small Computer System Interface (ISCSI), a Virtual Host System (Vhost) Interface, and an NVMe-of (NVMe over Fabric) Interface. The NVMe over Fabric is used for realizing the extension of the NVMe standard on a PCIe bus; NVMe over Fabric supports mapping NVMe to multiple Fabrics transport options.

The driving layer 404 includes at least one block device driving unit.

In one example, the block device drive unit may be a solid state disk drive unit (SSD drive unit) and an NVMe drive unit.

In one example, the device driver code of the NVMe driver unit runs in the user mode, and the drive is directly accessed through the NVMe driver implemented in the user mode. In the design of a Central Processing Unit (CPU), a user mode refers to a non-privileged state. In this state, the executed code is limited by hardware, and certain operations cannot be performed, such as writing into the storage space of other processes, so as to prevent the security hazard from being brought to the operating system. In operating system design, its user state is also similar to that in CPU design, referring to the unprivileged execution state. The kernel prohibits code in this state from potentially dangerous operations, such as writing system configuration files, killing other users' processes, restarting the system, and the like.

A block device mount layer 403 for mounting each storage block device of the back-end storage apparatus 300.

In one example, the storage block device may be a linux Asynchronous Input Output (AIO) device, a ceph device, an NVMe device, and/or an object storage device.

The ceph is a distributed storage system and provides three functions of object storage, block storage and file system storage.

The storage service layer 402 is configured to parse the read/write instruction received through the at least one storage interface, and invoke the corresponding block device driver unit to distribute the read/write instruction to the target storage block device according to a result of the parsing. The mapping relationship between the storage block device and the corresponding called block device driving unit can be established according to conventional settings in the art.

In one example, the read-write command includes an identifier of the target storage block device, and the storage service layer 402 parses the identifier included in the command to determine the target storage block device.

In one example, the block device identification module 2031 operates as follows:

(1) the storage interface of the storage interface layer 401 receives the read-write instruction from the channel simulation module 2032, and then sends the read-write instruction to the storage service layer 402;

(2) the storage service layer 402 determines a target storage block device corresponding to the read-write instruction in the block device mount layer 403 according to the identifier included in the read-write instruction, and determines a target block device driving unit for driving the target storage block device in the driving layer 404;

(3) the storage service layer 402 distributes the read-write instruction to the target storage block device in the block device mount layer 403 by calling the target block device driver unit in the driver layer 404.

In one example, the block device identification module 2011 operates in a polling mode. Specifically, the block device identification module 2011 may continue to perform other tasks after submitting the read/write request, and check whether the IO has been completed or not at a preset time interval. This operation avoids delay and overhead due to interrupts, and makes block device identification module 2011 have higher IO efficiency.

In one embodiment, referring to fig. 5, the channel simulation module 2032 includes a channel submodule 501 and a protocol conversion submodule 502, the channel submodule 501 is connected to the driving module 2011 and the protocol conversion submodule 502 respectively, and the protocol conversion submodule 502 is connected to the plurality of storage interfaces of the storage interface layer 401.

The channel submodule 501 is configured to simulate a PCIe channel, so that the memory block device mounted by the second operating system is connected to the driver module through the PCIe channel.

The protocol conversion sub-module 502 is configured to implement protocol conversion between the PCIe channel and the storage interface, so that the PCIe channel supports each storage interface.

In this embodiment, each storage block device in the back-end storage apparatus 300 is stored on the first operating system 201 as an NVMe hard disk by the analog channel module 2032.

In the case that the first operating system 201 can support NVMe-SSD, the channel simulation module 2032 utilizes the driver module 2011 of the first operating system, and combines advantages of local SSD performance, management, and software transparency of the first operating system, so that the storage block device of the backend storage apparatus 300 is recognized as being used by the NVMe hard disk in the first operating system. So that the present embodiment allows a user to combine remote NVMe flash memory connected to a server and access it as local flash memory, achieving all the efficiency and management advantages of remote storage while having the simplicity of local storage.

Fig. 6 is a structural diagram of a storage block device identification system according to an embodiment of the present application, and referring to fig. 6, the storage block device identification system includes the storage block device identification apparatus 200 and the backend storage apparatus 300 provided in any of the embodiments. The structure of the storage block device identification apparatus 200 may refer to the description of other embodiments of the present application, and is not described herein again.

With reference to fig. 6, the storage block device identification apparatus 200 is connected to the back-end storage apparatus 300, a storage operating system 301 runs on the back-end storage apparatus 300, and a plurality of storage block devices are provided in the storage operating system 301.

In an embodiment, the back-end storage apparatus 300 further includes a second network card 302, and the second network card 302 is respectively connected to the storage operating system 301 and the first network card 202, so that the plurality of storage block devices of the storage operating system 301 are connected to the block device identification module 2031.

In one embodiment, the storage block device identification system further includes a switch 303, one end of the switch 303 is connected to the first network card 202, and the other end of the switch 303 is connected to the second network card 302.

The switch 303 is a network device for forwarding an electrical (optical) signal, and the switch 303 is connected to the first network card 202 and the second network card 302, so as to establish an electrical signal path that is shared by both the storage block device identification apparatus 200 and the back-end storage apparatus 300.

In one example, switch 303 may employ an ip switch, a Fiber Channel (FC) switch, or an InfiniBand (IB) switch.

Referring to fig. 7, fig. 7 is a flowchart illustrating a method for reading and writing a storage block device according to an embodiment of the present application. The method may be applied to the storage block device identification apparatus 200 provided in any embodiment of the present application, and the specific structure of the storage block device identification apparatus 200 may be referred to the description of other embodiments of the present application, which is not described herein again. The storage block device reading and writing method comprises the following steps:

s701, receiving a first read-write instruction for the NVMe hard disk through a drive module 2011;

s702, sending the first read-write instruction to the block device identification module 2031 through the PCIe channel simulated by the channel simulation module 2032;

s703, determining, by the block device identification module 2031, a target storage block device corresponding to the first read-write instruction in the storage block devices mounted on the second operating system 202, and sending the first read-write instruction to the target storage block device.

In one embodiment, the channel simulation module 2032 includes a channel submodule 501 and a protocol conversion submodule 502, and the structure of the channel simulation module 2032 can be shown in fig. 5. Referring to fig. 8, step S702 may include:

s801, receiving a first read-write instruction from the driver 2011 through the PCIe channel simulated by the channel sub-module 501, and sending the first read-write instruction to the protocol conversion sub-module 502;

s802, performing protocol conversion on the first read-write instruction through the protocol conversion sub-module 502 to obtain a second read-write instruction, and sending the second read-write instruction to the storage interface corresponding to the block device identification module 2031;

then, in step S703, determining a target storage block device corresponding to the first read-write instruction, and sending the first read-write instruction to the target storage block device, including: and analyzing the second read-write instruction, determining a target storage block device corresponding to the second read-write instruction, and calling a corresponding block device driving unit to distribute the second read-write instruction to the target storage block device.

Fig. 9 shows a block diagram of a read-write device of a storage block device according to an embodiment of the present application. As shown in fig. 9, the memory block device read/write device includes: a memory 910 and a processor 920, the memory 910 having stored therein computer programs operable on the processor 920. The processor 920 implements the method for reading and writing the memory block device in the above embodiments when executing the computer program. The number of the memory 910 and the processor 920 may be one or more.

The storage block device read-write device further comprises:

and a communication interface 930 for communicating with an external device to perform data interactive transmission.

If the memory 910, the processor 920 and the communication interface 930 are implemented independently, the memory 910, the processor 920 and the communication interface 930 may be connected to each other through a bus and perform communication with each other. The bus may be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, an Extended ISA (EISA) bus, or the like. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is shown in FIG. 9, but this does not indicate only one bus or one type of bus.

Optionally, in an implementation, if the memory 910, the processor 920 and the communication interface 930 are integrated on a chip, the memory 910, the processor 920 and the communication interface 930 may complete communication with each other through an internal interface.

Embodiments of the present application provide a computer-readable storage medium, which stores a computer program, and when the program is executed by a processor, the computer program implements the method provided in the embodiments of the present application.

The embodiment of the present application further provides a chip, where the chip includes a processor, and is configured to call and execute the instruction stored in the memory from the memory, so that the communication device in which the chip is installed executes the method provided in the embodiment of the present application.

An embodiment of the present application further provides a chip, including: the system comprises an input interface, an output interface, a processor and a memory, wherein the input interface, the output interface, the processor and the memory are connected through an internal connection path, the processor is used for executing codes in the memory, and when the codes are executed, the processor is used for executing the method provided by the embodiment of the application.

It should be understood that the processor may be a Central Processing Unit (CPU), other general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or any conventional processor or the like. It is noted that the processor may be an advanced reduced instruction set machine (ARM) architecture supported processor.

Further, optionally, the memory may include a read-only memory and a random access memory, and may further include a nonvolatile random access memory. The memory may be either volatile memory or nonvolatile memory, or may include both volatile and nonvolatile memory. The non-volatile memory may include a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an electrically Erasable EPROM (EEPROM), or a flash memory. Volatile memory can include Random Access Memory (RAM), which acts as external cache memory. By way of example, and not limitation, many forms of RAM are available. For example, Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SDRAM), double data rate synchronous SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), synchlink DRAM (SLDRAM), and direct memory bus RAM (DR RAM).

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions according to the present application are generated in whole or in part when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium.

In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process. And the scope of the preferred embodiments of the present application includes other implementations in which functions may be performed out of the order shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved.

The logic and/or steps represented in the flowcharts or otherwise described herein, e.g., an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions.

It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. All or part of the steps of the method of the above embodiments may be implemented by hardware that is configured to be instructed to perform the relevant steps by a program, which may be stored in a computer-readable storage medium, and which, when executed, includes one or a combination of the steps of the method embodiments.

In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module may also be stored in a computer-readable storage medium if it is implemented in the form of a software functional module and sold or used as a separate product. The storage medium may be a read-only memory, a magnetic or optical disk, or the like.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various changes or substitutions within the technical scope of the present application, and these should be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A storage block device identification device is characterized in that a first operating system runs on the storage block device identification device, a first network card is arranged in the storage block device identification device, and a second operating system runs in the first network card;

the first operating system includes a driver module, the second operating system includes a block device identification module and a channel simulation module, wherein,

the block device identification module is used for identifying a storage block device of a back-end storage device so as to mount the identified storage block device into the second operating system;

the channel simulation module is used for simulating a PCIe channel so that the storage block device mounted by the second operating system is connected with the drive module through the PCIe channel;

the drive module is configured to correspondingly identify the storage block device connected through the PCIe channel as an NVMe hard disk in the first operating system.

2. The apparatus of claim 1, wherein the block device identification module comprises: a storage interface layer, a storage service layer, a block device mount layer, and a driver layer, wherein,

the storage interface layer comprises at least one storage interface, and the storage interface is used for connecting the channel simulation module;

the driving layer includes at least one block device driving unit;

the block device mounting layer is used for mounting the storage block devices of the rear-end storage device;

3. The apparatus of claim 2, wherein the storage interface comprises an internet small computer system interface, a virtual host system interface, and an NVMe-of interface;

4. The apparatus of claim 2, wherein the channel simulation module comprises a channel submodule and a protocol conversion submodule, wherein,

the channel submodule is used for simulating the PCIe channel so that the storage block device mounted by the second operating system is connected with the drive module through the PCIe channel.

5. A storage block device identification system, comprising the storage block device identification apparatus according to any one of claims 1 to 4 and a backend storage apparatus, wherein the storage block device identification apparatus is connected to the backend storage apparatus, a storage operating system is run on the backend storage apparatus, and a plurality of storage block devices are provided in the storage operating system.

6. The system according to claim 5, wherein the back-end storage device further comprises a second network card, and the second network card is respectively connected to the storage operating system and the first network card, so that the plurality of storage block devices of the storage operating system are connected to the block device identification module.

7. The system of claim 6, further comprising a switch, wherein one end of the switch is connected to the first network card, and the other end of the switch is connected to the second network card.

8. A method for reading and writing a storage block device, which is applied to the storage block device identification apparatus of any one of claims 1 to 4, the method comprising:

receiving a first read-write instruction to the NVMe hard disk through the drive module;

9. The method of claim 8, wherein the channel emulation module includes a channel sub-module and a protocol conversion sub-module, and the sending the first read-write command to the block device identification module via the PCIe channel emulated by the channel emulation module includes:

receiving the first read-write instruction from the driving module through the PCIe channel simulated by the channel sub-module, and sending the first read-write instruction to the protocol conversion sub-module;

performing protocol conversion on the first read-write instruction through the protocol conversion sub-module to obtain a second read-write instruction, and sending the second read-write instruction to a storage interface corresponding to the block device identification module;

the determining a target storage block device corresponding to the first read-write instruction and sending the first read-write instruction to the target storage block device includes:

10. A device for reading from and writing to a memory block device comprising a processor and a memory, the memory having stored therein instructions which are loaded and executed by the processor to implement the method of any of claims 8 to 9.