CN111863842B

CN111863842B - Electronic equipment, display module and display panel thereof

Info

Publication number: CN111863842B
Application number: CN202010761514.4A
Authority: CN
Inventors: 李明阳
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2020-07-31
Filing date: 2020-07-31
Publication date: 2022-08-05
Anticipated expiration: 2040-07-31
Also published as: CN111863842A

Abstract

The display panel comprises an array substrate and a plurality of sub-pixels, each sub-pixel at least corresponds to a switch thin film transistor, a drive thin film transistor and a storage capacitor, the array substrate comprises an active layer, a first metal layer and a second metal layer, the first metal layer forms a gate electrode of the switch thin film transistor and a gate electrode of the drive thin film transistor, and the second metal layer forms a source/drain electrode of the switch thin film transistor and a source/drain electrode of the drive thin film transistor; wherein, in the thickness direction of the display panel, the thickness of the source/drain electrode of the driving thin film transistor is greater than that of the source/drain electrode of the switching thin film transistor. The display panel provided by the application can reduce the impedance of the source/drain electrode of the driving thin film transistor by increasing the thickness of the source/drain electrode of the driving thin film transistor, so that the voltage drop on the display panel can be weakened, and the light-emitting uniformity of the display panel is further improved.

Description

Electronic equipment, display module and display panel thereof

Technical Field

The application relates to the technical field of electronic equipment, in particular to electronic equipment, a display module and a display panel thereof.

Background

With the increasing popularity of electronic devices, electronic devices have become indispensable social and entertainment tools in people's daily life, and users have higher and higher requirements for electronic devices. For electronic devices such as mobile phones, not only the design concept of being light and thin is to be satisfied, but also the trend of being popular at present, such as full-screen, foldable, and rollable, etc., is to be met. Display panels such as OLED (Organic Light-Emitting Diode) have been increasingly widely used due to their characteristics of Light weight, self-luminescence, wide viewing angle, high luminous efficiency, low power consumption, fast response speed, etc.; due to the characteristic of being bendable, the display panels such as the OLED have led the electronic devices such as the mobile phones to develop towards curved screens, folding screens, cloud roll screens and the like. However, the OLED display panel has some disadvantages in terms of brightness uniformity, etc. compared to the conventional lcd (liquid Crystal display) display panel. The reason is mainly as follows: display panels such as LCDs are voltage driven; whereas display panels such as OLEDs are current driven. In addition, most of the existing Integrated Circuits (ICs) only transmit voltage signals, and the pixel driving Circuit of the display panel such as OLED needs to complete the task of converting the voltage signals into current signals. In an electronic device such as a mobile phone, an IC is generally disposed on one side, and as the size of a display panel is increased, an IR-Drop (IR-Drop) may exist thereon, resulting in insufficient brightness of a region of the display panel far from the IC.

Disclosure of Invention

The embodiment of the application provides a display panel, wherein the display panel comprises an array substrate and a plurality of sub-pixels, each sub-pixel at least corresponds to a switching thin film transistor, a driving thin film transistor and a storage capacitor, the array substrate comprises an active layer, a first metal layer and a second metal layer, the first metal layer forms a gate electrode of the switching thin film transistor and a gate electrode of the driving thin film transistor, and the second metal layer forms a source/drain electrode of the switching thin film transistor and a source/drain electrode of the driving thin film transistor; wherein, in the thickness direction of the display panel, the thickness of the source/drain electrode of the driving thin film transistor is greater than that of the source/drain electrode of the switching thin film transistor.

The embodiment of the application further provides a display module, wherein the display module comprises a transparent cover plate and the display panel, and the display panel is attached to the transparent cover plate.

The embodiment of the application further provides electronic equipment, wherein the electronic equipment comprises the display module, a rear cover plate and a middle frame, wherein the display module and the rear cover plate are respectively positioned on two opposite sides of the middle frame and fixedly connected with the middle frame; the transparent cover plate is farther away from the back cover plate than the display panel.

The beneficial effect of this application is: the display panel provided by the application can reduce the impedance of the source/drain electrode of the driving thin film transistor by increasing the thickness of the source/drain electrode of the driving thin film transistor, so that the voltage drop on the display panel can be weakened, and the light-emitting uniformity of the display panel is further improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

Fig. 1 is a schematic disassembled structural diagram of an embodiment of an electronic device provided in the present application;

FIG. 2 is a schematic electrical diagram of the components involved in the electronic device of FIG. 1;

FIG. 3 is a schematic top view of the display panel of FIG. 1;

FIG. 4 is a schematic diagram of a stacked structure of the display panel of FIG. 3;

FIG. 5 is a schematic diagram of a stacked structure of the display panel of FIG. 3 corresponding to a sub-pixel;

FIG. 6 is a schematic diagram of a pixel driving circuit corresponding to the sub-pixel in FIG. 5;

fig. 7 is a flowchart illustrating a manufacturing method of a display panel according to an embodiment of the present disclosure.

Detailed Description

The present application will be described in further detail with reference to the following drawings and examples. It is to be noted that the following examples are only illustrative of the present application, and do not limit the scope of the present application. Likewise, the following examples are only some examples and not all examples of the present application, and all other examples obtained by a person of ordinary skill in the art without any inventive work are within the scope of the present application.

Reference in the specification to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the specification. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.

The inventors of the present application found in long-term studies that: in order to improve the problem of uneven brightness of the display panel, the related art generally compensates the voltage drop by providing a plurality of thin film transistors, and the pixel driving circuit of the display panel such as OLED has been developed from a basic 2T1C (2Transistor 1Capacitance, i.e. two thin film transistors plus one storage capacitor) circuit to a 7T1C circuit. However, as the number of thin film transistors increases, the structure of the pixel driving circuit becomes more complex, and the problems of smaller parasitic capacitance, coupling capacitance, and storage capacitance are also easily caused. To this end, the present application proposes the following examples.

Referring to fig. 1 and fig. 2 together, fig. 1 is a schematic disassembled structure diagram of an embodiment of the electronic device provided in the present application, and fig. 2 is a schematic circuit diagram of a portion of structural components involved in the electronic device in fig. 1.

In the present application, the electronic device 10 may be a portable device such as a mobile phone, a tablet computer, a notebook computer, and a wearable device. In this embodiment, the electronic device 10 is taken as a mobile phone for exemplary explanation.

As shown in fig. 1, the electronic device 10 may include a display module 11, a middle frame 12, and a rear cover 13. The display module 11 and the rear cover plate 13 are respectively located on two opposite sides of the middle frame 12, and can be fixedly connected with the middle frame 12 through one or a combination of assembling modes such as gluing, clamping, welding and the like, so that a basic structure that the display module 11 and the rear cover plate 13 clamp the middle frame 12 together is formed after the three are assembled. Further, a cavity with a certain volume can be formed between the display module 11 and the rear cover plate 13, and the cavity can be used for arranging structural members such as a battery 14, a main board 15, a camera module 16 and the like, so that the electronic device 10 can realize corresponding functions. For example: the structural members are fixed to the middle frame 12 to remain relatively fixed, thereby assembling the complete electronic device 10. The display module 11, the camera module 16 and other components may be electrically connected to the battery 14, the main board 15 and the like through a Flexible Printed Circuit (FPC), so that they can be supplied with electric power from the battery 14 and can execute corresponding instructions under the control of the main board 15.

For example, the display module 11 may include a display panel 111 and a transparent cover plate 112, and the transparent cover plate 112 may be attached to the display panel 111 by using a glue such as an Optical Clear Adhesive (OCA) and a Pressure Sensitive Adhesive (PSA), that is, assembled with the display panel 111. After the display module 11, the rear cover 13 and the middle frame 12 are assembled, the transparent cover 112 is farther away from the rear cover 13 than the display panel 111. Further, the transparent cover 112 may be used to protect the display panel 111 and may serve as an outer surface of the electronic device 10, so as to facilitate a user to perform a touch operation such as clicking, sliding, pressing, and the like. The display panel 111 is mainly used for enabling the display module 11 to display a picture, and can be used as an interactive interface to instruct a user to perform the touch operation on the transparent cover 112. The transparent cover 112 may be a flexible substrate such as Polyimide (PI), Colorless Polyimide (PI), and the like, so as to facilitate manufacturing of the flexible display screen. Of course, the transparent cover plate 112 may be a rigid substrate such as glass. Further, as shown in fig. 2, the display module 11 may further include a touch panel 113. The touch panel 113 is disposed between the transparent cover 112 and the display panel 111, so as to convert the touch operation into a corresponding touch command when the user performs the touch operation.

Further, the edge of the display module 11 may be bent toward the middle frame 12, so that the image displayed on the display module 11 may extend from the front surface of the display module 11 to the side surface thereof in a form similar to a "waterfall". So set up, not only can reduce or even hide the black edge of display module assembly 11 to make electronic equipment 10 can provide bigger demonstration field of vision for the user, can also make display module assembly 11 build a visual effect around the demonstration, thereby make electronic equipment 10 bring one kind and be different from bang screen, water droplet screen, dig the visual experience of flat full-face screen such as hole screen, over-and-under type camera, sliding closure type camera for the user, and then increase electronic equipment 10's competitiveness. Accordingly, the edge of the rear cover 13 may also be bent toward the middle frame 12, so as to improve the grip feeling and aesthetic appearance of the electronic device 10.

Referring to fig. 2, the electronic device 10 may further include an antenna module 17, a memory 18, an audio circuit 19, a speaker 20, and a microphone 21. The antenna module 17, the memory 18, and the audio circuit 19 may be coupled to the motherboard 15 through a data bus, for example.

As an example, the antenna module 17 is used for transceiving signals; the memory 18 is used for storing data, instructions and other information; the speaker 20 is electrically connected to the main board 15 through the audio circuit 19, so that the user can hear an audio file played by the electronic device 10, and the microphone 21 is electrically connected to the main board 15 through the audio circuit 19, so that the electronic device 10 can collect voice of the user and/or environmental sound of an environment where the user is located.

Referring to fig. 3 and 4 together, fig. 3 is a schematic top view structure diagram of an embodiment of the display panel in fig. 1, and fig. 4 is a schematic laminated structure diagram of the display panel in fig. 3. It should be noted that: each tile in fig. 3 can be simply viewed as a sub-pixel.

As shown in fig. 3 and 4, the display panel 111 may include an array substrate 1111, a first electrode layer 1112, an organic electroluminescent layer 1113, a second electrode layer 1114, and an encapsulation layer 1115, which are sequentially stacked. After the transparent cover plate 112 is attached to the display panel 111, the encapsulation layer 1115 is closer to the transparent cover plate 112 than the array substrate 1111. Further, the array substrate 1111 is mainly electrically connected to the first electrode layer 1112 and the second electrode layer 1114, so that each RGB Sub-Pixel (Sub Pixel) arranged in the organic electroluminescent layer 1113 in an array can obtain different current inputs, and further emit light rays with different colors and brightness, so that the display module 11 can display images. The array substrate 1111 generally includes a plurality of Thin Film Transistors (TFTs) and storage capacitors (Cs) arranged in an array, and generally corresponds to the plurality of RGB sub-pixels arranged in an array in the organic electroluminescent layer 1113 one to one. Each RGB sub-pixel at least corresponds to a switch thin film transistor (T1), a driving thin film transistor (T2) and a storage capacitor (Cs). In other words, as shown in fig. 4, the present application exemplifies that the array substrate 1111 includes a basic 2T1C circuit. The first electrode layer 1112 is typically a transparent anode (ITO) and is typically disposed in a grid. The second electrode layer 1114 is typically a semi-transparent cathode (Mg/Ag) and is typically disposed over the entire surface. The encapsulation layer 1115 is mainly used for achieving the isolation requirement between the organic electroluminescent layer 1113 and water and oxygen, so as to ensure the reliability of the organic electroluminescent layer 1113 and further prolong the service life of the display panel 111.

Further, the display panel 111 may further include an integrated circuit 1116 and a peripheral power supply line. Among them, the peripheral Power lines may include an anode Power Line (VDD Power Line)1117 and a cathode Power Line (VSS Power Line) 1118. Referring to fig. 1, for an electronic device 10 such as a mobile phone, the integrated circuit 1116 generally includes an end of the display panel 111 facing away from the camera module 16. The anode power line 1117 is electrically connected to the first electrode layer 1112 through the array substrate 1111, and the cathode power line 1118 is electrically connected to the second electrode layer 1114 through the array substrate 1111. The first electrode layer 1112 is generally disposed in a grid shape, and the anode power line 1117 can be correspondingly disposed in an n shape to shorten the routing. The second electrode layer 1114 is generally disposed over the entire surface, and the cathode power line 1118 may be correspondingly disposed in a ring shape to increase the uniformity of the potential across the second electrode layer 1114.

Based on this, the peripheral power lines are all fed from the integrated circuit 1116 located on the lower frame of the display panel 111, and the anode power line 1117 and the cathode power line 1118 are mostly metal traces, which causes the voltage drop when the current passes through. In an actual product, when electric energy is transmitted from the lower frame to the upper frame of the display panel 111, the voltage on the peripheral power line may drop by about 1.0-1.5V, that is, the voltages of the light-emitting pixels in the upper and lower areas of the display panel 111 are different, and the currents are correspondingly different, which finally causes the uneven light-emitting brightness of the display panel 111 and affects the visual experience of the user.

Referring to fig. 5 and fig. 6 together, fig. 5 is a schematic diagram of a stacked structure of the display panel in fig. 3 corresponding to a sub-pixel, and fig. 6 is a schematic diagram of a schematic structure of a pixel driving circuit corresponding to the sub-pixel in fig. 5. It should be noted that: the directions indicated by the double-headed arrows in fig. 5 can be regarded as the thickness directions of the display panel.

As shown in fig. 5, the array substrate 1111 may include an active layer 11111, a first metal layer 11112, and a second metal layer 11113. Among them, the first metal layer 11112 may constitute a gate electrode of the switching thin film transistor (T1) and a gate electrode of the driving thin film transistor (T2), and the second metal layer 11113 may constitute source/drain electrodes of the switching thin film transistor (T1) and the driving thin film transistor (T2). Referring to fig. 3, the active layer 11111, the first metal layer 11112 and the second metal layer 11113 extend from one end of the display panel 111 close to the integrated circuit 1116 to the other end away from the integrated circuit 1116, so that each RGB sub-pixel can be supplied with power. Further, the peripheral power line is electrically connected to the second metal layer 11113. As shown in fig. 6, the drain electrode of the switching thin film transistor (T1) may be electrically connected to the gate electrode of the driving thin film transistor (T2) to control the on/off and duration of the driving thin film transistor (T2). The source electrode of the driving thin film transistor (T2) may be electrically connected to the anode power line 1117, and the drain electrode of the driving thin film transistor (T2) may be electrically connected to the first metal layer 1112 to input current to the organic electroluminescent layer 1113, so that each RGB sub-pixel emits light. Based on this, the voltage drop of the display panel 111 can be considered to occur mainly on the source/drain electrodes of the driving thin film transistor (T2). In the present application, the thickness of the source/drain electrode of the driving thin film transistor (T2) is greater than the thickness of the source/drain electrode of the switching thin film transistor (T1) in the thickness direction of the display panel 111. Under the same conditions, for example, the thickness of the display panel 111 is substantially the same as that of the related art, and the material of the second metal layer 11113 is substantially the same as that of the related art, the resistance of the source/drain electrode of the driving thin film transistor (T2) is reduced by increasing the thickness of the source/drain electrode of the driving thin film transistor (T2), so that the voltage drop can be reduced, and the uniformity of light emission of the display panel 111 can be improved.

It should be noted that: in the related art, the thickness of the second metal layer 11113 is often not different, that is, the thickness of the source/drain electrode of the driving thin film transistor (T2) is equal to that of the switching thin film transistor (T1). Further, in the case where the size of each RGB sub-pixel is determined, it is difficult to reduce the impedance thereon by designing the source/drain electrodes of the driving thin film transistor (T2) with a larger width, subject to Array Design Rule in the art. In other words, the width of the source/drain electrode of the driving thin film transistor (T2) tends to be saturation design, and it is difficult to break through the width.

Illustratively, in the thickness direction of the display panel 111, the thickness of the source/drain electrode of the switching thin film transistor (T1) may be denoted as a, the thickness of the source/drain electrode of the driving thin film transistor (T2) may be denoted as b, and then b > a. Preferably, 2a ≦ b ≦ 3 a. In this way, the thickness of the source/drain electrode of the switching thin film transistor (T1) and the thickness of other structures such as via hole line changing can adopt the conventional design in the art, so that the differential exposure process can be performed on the second metal layer 11113 by adopting a half tone (halftone) mask process without increasing the difficulty of the manufacturing process, and the purpose that the thickness of the source/drain electrode of the driving thin film transistor (T2) is greater than that of the source/drain electrode of the switching thin film transistor (T1) is achieved. In other words, the second metal layer 11113 is formed by a half-tone mask process. Further preferably, in the thickness direction of the display panel 111, the thickness of the source electrode of the switching thin film transistor (T1) is equal to the thickness of the drain electrode of the switching thin film transistor (T1), and the thickness of the source electrode of the driving thin film transistor (T2) is equal to the thickness of the drain electrode of the driving thin film transistor (T2), so as to simplify the halftone mask process and the structure of the mask thereof.

Based on the above description, since the peripheral power lines (specifically, the anode power line 1117 and the cathode power line 1118) are mainly used for supplying electric energy, the above voltage drop also exists on the peripheral power lines. In the present application, the thickness of the peripheral power supply line may be greater than the source/drain electrodes of the switching thin film transistor (T1) in the thickness direction of the display panel 111. With such an arrangement, under the same conditions, for example, the thickness of the display panel 111 is substantially the same as that of the related art, and the material of the peripheral power line is substantially the same as that of the related art, the impedance of the peripheral power line is reduced by increasing the thickness of the peripheral power line, so that the voltage drop can be reduced, and the uniformity of the light emission of the display panel 111 can be further provided. Preferably, the thickness of the peripheral power supply line is equal to the thickness of the source/drain electrode of the driving thin film transistor (T2) in the thickness direction of the display panel 111. The arrangement is adopted to simplify the halftone mask process and the structure of the mask plate.

Further, as shown in fig. 5, the array substrate 1111 may further include a substrate 11114, a barrier layer 11115 and a buffer layer 11116 sequentially disposed on the substrate 11114, an active layer 11111 disposed on the buffer layer 11116, a first insulating layer 11117 disposed between the first metal layer 11112 and the active layer 11111, a second insulating layer 11118 disposed between the second metal layer 11113 and the first metal layer 11112, a passivation layer 11119 and a planarization layer 11120 sequentially disposed on the second metal layer 11113. The substrate 11114 may be a flexible substrate such as polyimide or colorless polyimide, or may be a rigid substrate such as glass. The barrier layer 11115, the buffer layer 11116, the first insulating layer 11117, the second insulating layer 11118, and the passivation layer 11119 may be made of silicon oxide, silicon nitride, or the like, and the planarization layer 11120 may be made of an organic material. Further, referring to fig. 4, the first metal layer 1112 and the organic electroluminescent layer 1113 are disposed on the planarization layer 11120.

Referring to fig. 7, fig. 7 is a schematic flow chart illustrating an embodiment of a method for manufacturing a display panel according to the present disclosure. With reference to fig. 5, the manufacturing method may include:

s101: a barrier layer and a buffer layer are formed on a substrate.

The barrier layer 11115 and the buffer layer 11116 may be formed of silicon-oxygen compound, silicon-nitrogen compound, or the like, and may be deposited on the substrate 11114 by chemical vapor deposition.

S102: an active layer is formed on the buffer layer.

Wherein, the low temperature polysilicon may be doped by means of ion implantation to form the active layer 11111.

S103: a first insulating layer and a first metal layer are sequentially formed on the active layer.

The first insulating layer 11117 may be formed of silicon oxide, silicon nitride, or the like, and may be deposited on the active layer 11111 by chemical vapor deposition. The first insulating layer 11117 may serve as a gate insulating layer of the switching thin film transistor (T1) and the driving thin film transistor (T2), and may also serve as a dielectric insulating layer of the storage capacitor (Cs). Further, the composition of the first metal layer 11112 may be gold, silver, copper, or the like, and may be deposited on the first insulating layer 11117 by physical vapor deposition.

S104: and sequentially forming a second insulating layer and a second metal layer on the first metal layer.

The second insulating layer 11118 may be formed of silicon-oxygen compound or silicon-nitrogen compound, and may be deposited on the first metal layer 11112 by chemical vapor deposition. The second insulating layer 11118 is mainly used as an insulating layer between the second metal layer 11113 and the first metal layer 11112. Further, the second metal layer 11113 may have a composition of gold, silver, copper, etc., and may be deposited on the second insulating layer 11118 using a half-tone mask process.

Illustratively, 1) depositing a second metal layer 11113 on the second insulating layer 11118 by physical vapor deposition; 2) coating a photoresist layer on the second metal layer 11113; 3) placing the halftone mask between a light source and the semi-finished product in the step 2) for exposure and development, so that the thickness of the photoresist layer is differentiated; wherein, the transmittance of the part of the halftone mask corresponding to the switch thin film transistor (T1) to light may be 50%, the transmittance of the part corresponding to the drive thin film transistor (T2) to light may be 0, and the transmittance of the other parts to light may be 100%; 4) etching the semi-finished product in the step 3), and thinning the second metal layer 11113 under the action of the etching liquid; the thicknesses of the photoresist layer after exposure and development are different, so that the thicknesses of the part, corresponding to the switching thin film transistor (T1), of the second metal layer 11113, the part, corresponding to the driving thin film transistor (T2) and other parts are different, and the purpose that the thickness of the source/drain electrode of the driving thin film transistor (T2) is larger than that of the source/drain electrode of the switching thin film transistor (T1) is achieved.

S105: and forming a passivation layer and a flat layer on the second metal layer.

The passivation layer 11119 may be a silicon-oxygen compound or a silicon-nitrogen compound, and may be deposited on the second metal layer 11113 by chemical vapor deposition. The planarization layer 11120 may be organic material such as benzocyclobutene or acrylic acid, and may be formed on the passivation layer 11119 by coating.

Further, the planarization Layer 11120 is mainly used to make the surface of the array substrate 1111 as flat as possible, so as to form a Pixel Definition Layer (PDL) required for the first electrode Layer 1112 and the organic electroluminescent Layer 1113 on the surface of the array substrate 1111.

The above description is only a part of the embodiments of the present application, and not intended to limit the scope of the present application, and all equivalent devices or equivalent processes that can be directly or indirectly applied to other related technologies, which are made by using the contents of the present specification and the accompanying drawings, are also included in the scope of the present application.

Claims

1. A display panel is characterized in that the display panel comprises an array substrate and a plurality of sub-pixels, each sub-pixel at least corresponds to a switch thin film transistor, a drive thin film transistor and a storage capacitor, the array substrate comprises an active layer, a first metal layer and a second metal layer, the first metal layer forms a gate electrode of the switch thin film transistor and a gate electrode of the drive thin film transistor, and the second metal layer forms a source/drain electrode of the switch thin film transistor and a source/drain electrode of the drive thin film transistor; wherein a thickness of the source/drain electrode of the driving thin film transistor is greater than a thickness of the source/drain electrode of the switching thin film transistor in a thickness direction of the display panel.

2. The display panel according to claim 1, wherein in a thickness direction of the display panel, a thickness of a source/drain electrode of the switching thin film transistor is a, and a thickness of a source/drain electrode of the driving thin film transistor is b; wherein, b is more than or equal to 2a and less than or equal to 3 a.

3. The display panel according to claim 2, wherein a thickness of the source electrode of the switching thin film transistor is equal to a thickness of the drain electrode of the switching thin film transistor, and a thickness of the source electrode of the driving thin film transistor is equal to a thickness of the drain electrode of the driving thin film transistor in a thickness direction of the display panel.

4. The display panel according to claim 1, further comprising a peripheral power line electrically connected to the second metal layer; wherein, in the thickness direction of the display panel, the thickness of the peripheral power line is greater than the source/drain electrodes of the switching thin film transistor.

5. The display panel according to claim 4, wherein a thickness of the peripheral power supply line is equal to a thickness of a source/drain electrode of the driving thin film transistor in a thickness direction of the display panel.

6. The display panel according to claim 1, wherein the active layer constitutes a first plate of the storage capacitor, and the first metal layer constitutes a second plate of the storage capacitor.

7. The display panel of claim 1, wherein the array substrate further comprises a substrate, a barrier layer and a buffer layer sequentially disposed on the substrate, the active layer disposed on the buffer layer, a first insulating layer disposed between the first metal layer and the active layer, a second insulating layer disposed between the second metal layer and the first metal layer, a passivation layer and a planarization layer sequentially disposed on the second metal layer.

8. The display panel according to claim 1, wherein the second metal layer is formed by a half-tone mask process.

9. A display module, comprising a transparent cover plate and the display panel of any one of claims 1 to 8, wherein the display panel is attached to the transparent cover plate.

10. An electronic device, comprising a rear cover plate, a middle frame and the display module set of claim 9, wherein the display module set and the rear cover plate are respectively located at two opposite sides of the middle frame and are fixedly connected with the middle frame; the transparent cover plate is farther away from the rear cover plate than the display panel.