CN111722789A - Memory management method and memory storage device - Google Patents
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- 230000005055 memory storage Effects 0.000 title claims abstract description 34
- 238000007726 management method Methods 0.000 title claims abstract description 31
- 238000013507 mapping Methods 0.000 claims abstract description 26
- 239000000872 buffer Substances 0.000 claims abstract description 12
- 230000003139 buffering effect Effects 0.000 claims abstract description 12
- 230000001351 cycling effect Effects 0.000 claims 1
- 238000000034 method Methods 0.000 description 5
- 238000011084 recovery Methods 0.000 description 5
- 230000002159 abnormal effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1044—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices with specific ECC/EDC distribution
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1068—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0614—Improving the reliability of storage systems
- G06F3/0619—Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/065—Replication mechanisms
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0658—Controller construction arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The invention provides a memory management method and a memory storage device. The memory management method comprises the following steps: after the power supply of the memory storage device is restarted, searching a first page in the first block, wherein the first page is a virtual page with the minimum page index value in the first block, and the virtual page is a page which is not programmed after the first block is erased; judging whether a second page of the first block passes the error check code checking operation or not, wherein the second page is an effective page with the maximum page index value; if the second page passes the error check code check operation, calculating the number of effective pages of the first block; judging whether the last buffer index value is zero or not; and if the last buffering index value is not zero, copying the old data to the first page according to the mapping information corresponding to the last buffering index value.
Description
Technical Field
The present invention relates to a memory management method and a memory storage device, and more particularly, to a memory management method and a memory storage device for reconstructing data after power restart.
Background
With advances in technology, storage devices are gradually evolving from traditional hard disks to flash memory (e.g., memory storage devices such as solid state disks, embedded multimedia cards, etc.). Compared with the traditional hard disk, the flash memory has the advantages of light weight, small volume, low power, high access speed and the like. However, when the flash memory is subjected to an abnormal power-off, a loss of data may be caused. Therefore, how to recover data after the flash memory is abnormally powered off and the power is restarted is an objective that should be addressed by those skilled in the art.
Disclosure of Invention
The invention provides a memory storage device, which can perform data recovery after abnormal power failure and power restart, in particular to perform data recovery of small files.
The invention provides a memory management method, which comprises the following steps: after the power supply of the memory storage device is restarted, searching a first page in the first block, wherein the first page is a virtual page with the minimum page index value in the first block, and the virtual page is a page which is not programmed after the first block is erased; determining whether a second page of the first block passes an Error Correction Code (ECC) check operation, wherein the second page is a valid page having a maximum page index value; if the second page passes the error check code check operation, calculating the number of effective pages of the first block; judging whether the last buffer index value is zero or not; and if the last buffering index value is not zero, copying the old data to the first page according to the mapping information corresponding to the last buffering index value.
The invention provides a memory storage device, comprising: a storage controller; and a nonvolatile rewritable memory module coupled to the memory controller. The nonvolatile rewritable memory module comprises a plurality of blocks. The block includes a first block. After the power of the memory storage device is restarted, the memory controller searches the first page in the first block, wherein the first page is a virtual page with the smallest page index value in the first block, and the virtual page is a page that is not programmed after the first block is erased. The memory controller determines whether a second page of the first block passes an error checking code checking operation, wherein the second page is a valid page having a largest page index value. If the second page passes the error checking code checking operation, the memory controller calculates the number of valid pages of the first block. The memory controller determines whether the last buffered index value is zero. If the last buffer index value is not zero, the memory controller copies the old data to the first page according to the mapping information corresponding to the last buffer index value.
Based on the above, the memory management method and the memory storage device of the invention will find the first page with the smallest page index value in the virtual pages of the first block after the power of the memory storage device is restarted, and determine whether the valid page (i.e., the second page) with the largest page index value in the first block passes the error check code checking operation. If the second page passes the error checking code checking operation, the memory controller calculates the number of valid pages of the first block and determines whether the last buffer index value is zero. And if the last buffering index value is not zero, copying the old data to the first page according to the mapping information corresponding to the last buffering index value.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a block diagram of a memory storage device according to an embodiment of the invention;
FIG. 2 is a flow chart of a memory management method according to an embodiment of the invention;
fig. 3A and 3B are examples of a memory management method according to an embodiment of the invention.
The reference numbers illustrate:
100: memory storage device
110: storage controller
120: nonvolatile rewritable memory module
S201 to S202, S211 to S213, S221 to S225, and S230: method for memory management
20. 22: block
310: old data
320: virtual data
Detailed Description
FIG. 1 is a block diagram of a memory storage device according to an embodiment of the invention.
Referring to fig. 1, a memory storage device 100 according to an embodiment of the invention may include a memory controller 110 and a non-volatile rewritable memory module 120 coupled to the memory controller 110. The memory storage device 100 is, for example, a Solid State Disk (SSD), an embedded Multimedia Card (eMMC), a secure digital Card (SD Card), or other similar devices. The memory controller 110 may include one or more processors (not shown) to perform access operations of the nonvolatile rewritable memory module 120. The non-volatile rewritable memory module 120 may include a plurality of blocks and each block may include a plurality of pages. Each page may include a plurality of sections (sections). For example, a 32 kilobyte (32 KB) sized page may include 8 4 kilobyte (4KB) sized segments, as will be described below with this example page size and segment size. However, the page size and the sector size of the present invention are not limited thereto.
In an embodiment, the non-volatile rewritable memory module 120 may further include a Management Block (MGB). The management block may record a Page Mapping Table (PMT) and a Last Buffer Index value (LBI). The page mapping table records the mapping relation between the logic page and the entity page. In the example where 1 page includes 8 sections, LBI may be an integer value between 0 and 8. The LBI is accumulated after the memory controller 110 receives a segment write data of one segment size (e.g., 4 KB). For example, when the memory controller 110 receives a write command instructing to write 4KB of write data, the memory controller 110 increments LBI by 1 and buffers the write data in the cache. When the LBI value is 8, the memory controller 110 writes the cached temporary data into the target page and resets the LBI to 0. At the same time of recording the LBI, the memory controller 110 also records mapping information corresponding to the LBI in the management block. Based on the mapping information, the memory controller 110 may access the write data of the one or more sector sizes. After one or more pages are written, the management block may update a last page index (last page index) to record the last page written.
FIG. 2 is a flow chart of a memory management method according to an embodiment of the invention.
Referring to fig. 2, in step S201, a first page is searched in a first block after the power of the memory storage device is reset. The first page is a virtual page with the smallest page index value in the first block, and the virtual page is a page that is not programmed after the first block is erased. The above-described operation may be performed after the power source is restarted after the abnormal power outage.
In step S202, it is determined whether the second page of the first block passes an Error Correction Code (ECC) check operation. The second page is an effective page with the maximum page index value, and the page index value of the second page is smaller than that of the first page.
If the second page passes the ECC check operation, in step S211, the number of valid pages of the first block is calculated.
In step S212, it is determined whether LBI is zero.
If the LBI is zero, which means that the recovery operation of the small file (e.g. 4KB) data is not required, the process proceeds to step S230 and ends.
If the LBI is not zero, in step S213, the old data is copied to the first page according to the mapping information corresponding to the LBI. The process then proceeds to step S230, and ends. It is noted that after copying the old data to the first page, the memory controller 110 updates the number of valid pages according to the LBI. For example, when the old data size is equal to 3 segment sizes, LBI is 3. Thus, the memory controller 110 would add 3/8 (e.g., 1 page includes 8 sectors) to the number of valid pages as the updated number of valid pages. In one embodiment, the 3 sector old data and the 5 sector dummy data (dummy data) are integrated and copied to the first page.
If the second page fails the ECC check operation, in step S221, the number of valid pages of the first block is calculated.
In step S222, it is determined whether the current storage mode is the single-rank storage mode.
If the current storage mode is the single-level storage mode (e.g., SLC mode), in step S223, the mapping table is modified to conform to the single-level storage mode. Then, in step S224, the valid page of the first block is copied to the second block.
If the current storage mode is not the single-level storage mode (e.g., TLC mode), the process proceeds to step S224 directly.
In step S225, the old data is copied to the second block according to the mapping information of the corresponding LBI. Finally, the process proceeds to step S230 and ends.
Fig. 3A and 3B are examples of a memory management method according to an embodiment of the invention.
Referring to fig. 3A, before the memory storage device 100 is abnormally powered off, the last page index value of the block 20 recorded by the management block is, for example, 10 (corresponding to page 10). After power is restarted, the memory controller 110 looks for a virtual page with the smallest page index value (i.e., page 13, or referred to as the first page) and a valid page with the largest page index value (i.e., page 12, or referred to as the second page). At this time, the pages 11 and 12 have been written with data but have not yet been recorded in the management block. When the memory controller 110 determines that the page 12 passes the ECC check operation, the number of valid pages of the block 20 is calculated, for example, the number of valid pages is equal to 11 (page 0 to page 10 sum). The memory controller 110 further determines whether the LBI is zero. If LBI is not zero, e.g., LBI is 3, the memory controller 110 copies the old data 310 and the dummy data 320 to page 13 (i.e., the first page) according to the mapping information corresponding to LBI 3 recorded in the management block, and updates the number of valid pages of the block 20 to 11+ (3/8). If the LBI is zero, the data copy operation corresponding to the LBI is not required. Finally, the memory controller 110 updates the last page index to page 13 to complete the data recovery of the small file (e.g., 4K file).
Referring to fig. 3B, before the memory storage device 100 is abnormally powered off, the last page index value of the block 20 recorded by the management block is, for example, 10 (corresponding to page 10). After power is restarted, the memory controller 110 looks for a virtual page with the smallest page index value (i.e., page 13, or referred to as the first page) and a valid page with the largest page index value (i.e., page 12, or referred to as the second page). When the memory controller 110 determines that the page 12 fails the ECC check operation, the number of valid pages of the block 20 is calculated, for example, the number of valid pages is equal to 11 (page 0 to page 10 sum).
Since the valid page 12 fails the ECC check operation, which indicates that an error may occur in the block 20, the memory controller 110 copies the valid pages (e.g., page 0 to page 10) of the block 20 to the new block 22, copies the old data 310 and the dummy data 320 to the page 13 of the block 22 according to the mapping information of the corresponding LBI ═ 3 recorded in the management block, and updates the number of valid pages of the block 22 to 11+ (3/8).
In summary, the memory management method and the memory storage device of the invention search for the first page with the smallest page index value in the virtual pages of the first block after the power of the memory storage device is restarted, and determine whether the valid page (i.e., the second page) with the largest page index value in the first block passes the ecc check operation. If the second page passes the error checking code checking operation, the memory controller calculates the number of valid pages of the first block and determines whether the last buffer index value is zero. And if the last buffering index value is not zero, copying the old data to the first page according to the mapping information corresponding to the last buffering index value. By the memory management method and the memory storage device, the recovery operation of the small file (such as a 4K file) can be performed after the abnormal power failure and the power supply restart through the last buffer index value and the mapping information of the management block, so that the reliability of the memory storage device is improved.
Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A memory management method is applied to a memory storage device, the memory storage device comprises a storage controller and a nonvolatile rewritable memory module, the nonvolatile rewritable memory module comprises a plurality of blocks, the plurality of blocks comprise a first block, and the memory management method comprises the following steps:
after a power cycling of the memory storage device, searching a first page in the first block, wherein the first page is a virtual page with a smallest page index value in the first block, and the virtual page is a page that is not programmed after the first block is erased;
judging whether a second page of the first block passes an error check code checking operation or not, wherein the second page is a valid page with the maximum page index value;
if the second page passes the error check code checking operation, calculating the number of effective pages of the first block;
judging whether the last buffer index value is zero or not; and
and if the last buffering index value is not zero, copying old data to the first page according to mapping information corresponding to the last buffering index value.
2. The memory management method of claim 1, wherein a maximum value of the last buffered index value corresponds to a number of sectors per page of the first block, and the last buffered index value is accumulated upon receipt of sector write data.
3. The memory management method of claim 1, further comprising: and updating the effective page quantity according to the last buffer index value.
4. The memory management method of claim 1, further comprising:
if the second page does not pass the error check code checking operation, calculating the number of effective pages of the first block;
judging whether the current storage mode is a single-order storage mode or not;
if the current storage mode is the single-order storage mode, changing a mapping table to enable the mapping table to accord with the single-order storage mode;
copying a valid page of the first block to a second block of the plurality of blocks; and
copying the old data to the second block according to the mapping information corresponding to the last buffered index value.
5. The memory management method of claim 4, further comprising:
if the current storage mode is not the single-level storage mode, copying the effective page of the first block to the second block; and
copying the old data to the second block according to the mapping information corresponding to the last buffered index value.
6. A memory storage device, comprising:
a storage controller; and
a nonvolatile rewritable memory module coupled to the memory controller, the nonvolatile rewritable memory module including multiple blocks including a first block
After the power of the memory storage device is restarted, the memory controller searches a first page in the first block, wherein the first page is a virtual page with the smallest page index value in the first block, and the virtual page is a page which is not programmed after the first block is erased;
the memory controller determines whether a second page of the first block passes an error checking code checking operation, wherein the second page is a valid page having a maximum page index value;
if the second page passes the error check code checking operation, the memory controller calculates the number of valid pages of the first block;
the storage controller judges whether the last buffer index value is zero or not; and
and if the last buffering index value is not zero, copying old data to the first page by the storage controller according to mapping information corresponding to the last buffering index value.
7. The memory storage device of claim 6, wherein a maximum value of the last buffered index value corresponds to a number of sectors per page of the first block, and the last buffered index value is accumulated upon receipt of sector write data.
8. The memory storage device of claim 6, wherein the storage controller updates the number of valid pages according to the last buffered index value.
9. The memory storage device of claim 6, wherein the memory controller calculates the number of valid pages of the first block if the second page fails the error check code check operation,
the memory controller determines whether the current memory mode is a single-rank memory mode,
if the current storage mode is the single-level storage mode, the storage controller changes a mapping table to enable the mapping table to conform to the single-level storage mode,
the memory controller copies valid pages of the first block to a second block of the plurality of blocks,
the storage controller copies the old data to the second block according to the mapping information corresponding to the last buffered index value.
10. The memory storage device of claim 9, wherein the storage controller copies valid pages of the first block to the second block if the current storage mode is not the single-level storage mode,
the storage controller copies the old data to the second block according to the mapping information corresponding to the last buffered index value.
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| TW108109640A TWI732192B (en) | 2019-03-20 | 2019-03-20 | Memory management method and memory storage device |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101644996A (en) * | 2009-09-25 | 2010-02-10 | 杭州华三通信技术有限公司 | Storage method of index data and storage control device |
| KR101077904B1 (en) * | 2010-07-12 | 2011-10-31 | (주)이더블유비엠코리아 | Apparatus and method for managing flash memory using page level mapping algorithm |
| US20120005557A1 (en) * | 2010-06-30 | 2012-01-05 | Eitan Mardiks | Virtual copy and virtual write of data in a storage device |
| US20140269053A1 (en) * | 2013-03-14 | 2014-09-18 | Lsi Corporation | Nonvolatile memory data recovery after power failure |
| CN106708754A (en) * | 2015-11-13 | 2017-05-24 | 慧荣科技股份有限公司 | Data storage device and data maintenance method thereof |
| CN108062259A (en) * | 2017-11-01 | 2018-05-22 | 联创汽车电子有限公司 | MCU internal data store ECC processing systems and its processing method |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8688894B2 (en) * | 2009-09-03 | 2014-04-01 | Pioneer Chip Technology Ltd. | Page based management of flash storage |
| TWI533308B (en) * | 2014-03-21 | 2016-05-11 | 群聯電子股份有限公司 | Method for managing memory, memory storage device and memory control circuit unit |
| TWI554886B (en) * | 2015-08-19 | 2016-10-21 | 群聯電子股份有限公司 | Data protecting method, memory contorl circuit unit and memory storage apparatus |
-
2019
- 2019-03-20 TW TW108109640A patent/TWI732192B/en active
- 2019-04-28 CN CN201910348308.8A patent/CN111722789B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101644996A (en) * | 2009-09-25 | 2010-02-10 | 杭州华三通信技术有限公司 | Storage method of index data and storage control device |
| US20120005557A1 (en) * | 2010-06-30 | 2012-01-05 | Eitan Mardiks | Virtual copy and virtual write of data in a storage device |
| KR101077904B1 (en) * | 2010-07-12 | 2011-10-31 | (주)이더블유비엠코리아 | Apparatus and method for managing flash memory using page level mapping algorithm |
| US20140269053A1 (en) * | 2013-03-14 | 2014-09-18 | Lsi Corporation | Nonvolatile memory data recovery after power failure |
| CN106708754A (en) * | 2015-11-13 | 2017-05-24 | 慧荣科技股份有限公司 | Data storage device and data maintenance method thereof |
| CN108062259A (en) * | 2017-11-01 | 2018-05-22 | 联创汽车电子有限公司 | MCU internal data store ECC processing systems and its processing method |
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| TWI732192B (en) | 2021-07-01 |
| CN111722789B (en) | 2024-01-23 |
| TW202036291A (en) | 2020-10-01 |
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