CN111679969A - Delay testing method and system in high-frequency transaction process - Google Patents
Delay testing method and system in high-frequency transaction process Download PDFInfo
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- CN111679969A CN111679969A CN202010376283.5A CN202010376283A CN111679969A CN 111679969 A CN111679969 A CN 111679969A CN 202010376283 A CN202010376283 A CN 202010376283A CN 111679969 A CN111679969 A CN 111679969A
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- G06—COMPUTING; CALCULATING OR COUNTING
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- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
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Abstract
The invention discloses a delay testing method and system in a high-frequency transaction process, and belongs to the technical field of high-frequency transactions. The method is characterized in that a bypass is arranged to copy data related to a transaction process, a time stamp is printed on the copied data, the time stamp of the copied data is analyzed to count the specific distribution condition of delay, and the delay of the transaction process is monitored in real time. The data of each link of the high-frequency transaction is subjected to bypass mode analysis, the analyzed data is copied by the mirror image port, an original data packet cannot be tampered, and the data has non-repudiation performance.
Description
Technical Field
The invention belongs to the technical field of high-frequency transaction, and particularly relates to a delay testing method and system in a high-frequency transaction process.
Background
In high frequency real operations and maintenance, customer complaints of increased delays occur. Since each link of the transaction may cause delay, if the delay of each link cannot be comprehensively grasped, it is difficult to define the reason and clarify responsibility, and thus it is difficult to actually solve the problem.
The high-frequency transaction speed is improved, new technical products come into the market every year, and an accurate delay detection system is very needed if the technical upgrading can meet the requirements. However, existing commercial delay detection devices are unable to resolve futures data exchange protocols and to perform delay analysis for specific invoices.
Disclosure of Invention
1. Technical problem to be solved by the invention
The invention aims to solve the problem that the conventional commercial delay detection equipment is difficult to effectively monitor and analyze the delay of each link of high-frequency transaction.
2. Technical scheme
In order to achieve the purpose, the technical scheme provided by the invention is as follows:
the delay testing method in the high-frequency transaction process comprises the steps of setting a bypass to copy data related to the transaction process, stamping a time stamp on the copied data, analyzing the time stamp of the copied data to count the specific distribution condition of delay, and monitoring the delay of the transaction process in real time.
Preferably, the method specifically comprises the following steps:
s100, establishing a delay test system;
s200, acquiring data of each link through a bypass technology and stamping a time stamp;
and S300, analyzing the time stamp of the data of each link to obtain the specific distribution condition of the delay.
Preferably, in step S200, the data of each link obtained by the bypass technology is specifically copied through a mirror image port, the time stamping probes are uniformly stamped, and the probe precision is 5 ns.
Preferably, in step S200, the time precision of the data packet of the data of each link acquired by the bypass technology is 1 nanosecond.
Preferably, the analyzing in step S300 specifically includes comparing timestamps of the links to obtain delay time of the links, and further monitoring and recording delay of each link.
The delay test system in the high-frequency transaction process comprises a data acquisition module, a data processing module and a data analysis module, wherein the data acquisition module is used for acquiring data of a high-frequency transaction loop, the data processing module is used for decrypting, copying and stamping a time stamp on the data acquired by the data acquisition module, and the data analysis module is used for carrying out delay analysis on the data stamped with the time stamp.
Preferably, the data acquisition module includes a switch, the switch is provided with at least 4 acquisition ports, the switch is simultaneously communicated with a client port, a business machine downlink port, a business machine uplink port and a trading exchange uplink port, and the switch copies data.
Preferably, the data processing module comprises a probe for time stamping the data copied by the switch.
Preferably, the data analysis module is a processor.
3. Advantageous effects
Compared with the prior art, the technical scheme provided by the invention has the following beneficial effects:
the method comprises the steps of setting a bypass, copying data related to a transaction process, stamping a time stamp on the copied data, analyzing the time stamp of the copied data to count the specific distribution condition of delay, and monitoring the delay of the transaction process in real time. The data of each link of the high-frequency transaction is subjected to bypass mode analysis, the analyzed data is copied by the mirror image port, an original data packet cannot be tampered, and the data has non-repudiation performance.
Drawings
Fig. 1 is a flow chart of a delay testing method in a high frequency transaction process according to the present invention.
Detailed Description
In order to facilitate an understanding of the invention, the invention will now be described more fully hereinafter with reference to the accompanying drawings, in which several embodiments of the invention are shown, but which may be embodied in many different forms and are not limited to the embodiments described herein, but rather are provided for the purpose of providing a more thorough disclosure of the invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present; when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present; the terms "vertical," "horizontal," "left," "right," and the like as used herein are for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs; the terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention; as used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
Example 1
Referring to fig. 1, in the method for testing delay in a high-frequency transaction process and the system thereof according to the present embodiment, a bypass is set to copy data related to the transaction process, a timestamp is applied to the copied data, the timestamp of the copied data is analyzed to count the specific distribution of delay, and the delay in the transaction process is monitored in real time. The data of each link of the high-frequency transaction is subjected to bypass mode analysis, the analyzed data is copied by the mirror image port, an original data packet cannot be tampered, and the data has non-repudiation performance.
The delay detection of the whole transaction loop without dead angles can be carried out on nanosecond precision, real-time monitoring can be achieved, the delay data of the whole loop of a single certain order can be rapidly detected in the order peak period or the transaction congestion condition, the delay data can be seen in the office, the operation and maintenance difficulty is greatly reduced, and the problem of positioning between a future company and a client due to delay is perfectly solved. When the client uses the method, the client can accurately count the part where the delay appears, and the problem section can be accurately solved, so that the transaction rate is increased linearly. Real-time delay detection makes the entire transaction loop for the customer faster and faster.
The method specifically comprises the following steps:
s100, establishing a delay test system;
s200, acquiring data of each link through a bypass technology and stamping a time stamp;
and S300, analyzing the time stamp of the data of each link to obtain the specific distribution condition of the delay.
In step S200, the data of each link obtained by the bypass technology is specifically copied through a mirror image port, the timestamped probes are uniformly stamped, and the probe precision is 5 ns.
In step S200, the time precision of the bypass technique for acquiring the data packet of the data of each link is 1 nanosecond.
The analysis in step S300 is specifically to compare the timestamps of the links to obtain the delay time of the links, and further monitor and record the delay of each link.
The delay test system in the high-frequency transaction process comprises a data acquisition module, a data processing module and a data analysis module, wherein the data acquisition module is used for acquiring data of a high-frequency transaction loop, the data processing module is used for decrypting, copying and stamping a time stamp on the data acquired by the data acquisition module, and the data analysis module is used for carrying out delay analysis on the data stamped with the time stamp.
The data acquisition module comprises a switch, the switch is provided with at least 4 acquisition ports, the switch is simultaneously communicated with a client port, a business machine lower connection port, a business machine upper connection port and a trading exchange upper connection port, and the switch copies data. The data processing module includes a probe for time stamping data copied by the switch. The data analysis module is a processor. The switch acquires data of each link of high-frequency transaction, stamps a timestamp through the probe, and compares and analyzes the timestamp of each link through the processor, so that the detailed delay condition of each link can be known. Meanwhile, the timestamps of the data packets are uniformly timed by the capture network card, and even if the port forwarding delay of 30-50ns exists in the SPAN process, the delay calculation of the relative timestamp of the probe to the data packets cannot be influenced.
The above-mentioned embodiments only express a certain implementation mode of the present invention, and the description thereof is specific and detailed, but not construed as limiting the scope of the present invention; it should be noted that, for those skilled in the art, without departing from the concept of the present invention, several variations and modifications can be made, which are within the protection scope of the present invention; therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A delay test method in a high-frequency transaction process is characterized in that: and setting a bypass to copy the data related to the transaction process, stamping a time stamp on the copied data, analyzing the time stamp of the copied data to count the specific distribution condition of delay, and monitoring the delay of the transaction process in real time.
2. The method for testing the delay in the high-frequency transaction process according to claim 1, wherein the method specifically comprises the following steps:
s100, establishing a delay test system;
s200, acquiring data of each link through a bypass technology and stamping a time stamp;
and S300, analyzing the time stamp of the data of each link to obtain the specific distribution condition of the delay.
3. A method for delay testing during high frequency transactions according to claim 2, wherein: in the step S200, the data of each link obtained by the bypass technology is specifically copied through a mirror image port, the time stamping probes are uniformly stamped, and the probe precision is 5 ns.
4. A method for delay testing during high frequency transactions according to claim 2, wherein: in step S200, the time precision of the data packet of the data of each link obtained by the bypass technique is 1 nanosecond.
5. A method for delay testing during high frequency transactions according to claim 2, wherein: the analysis in step S300 is specifically to compare the timestamps of the links to obtain the delay time of each link, and further monitor and record the delay of each link.
6. A delay test system in a high frequency transaction process, characterized by: the high-frequency transaction system comprises a data acquisition module, a data processing module and a data analysis module, wherein the data acquisition module is used for acquiring data of a high-frequency transaction loop, the data processing module is used for decrypting, copying and stamping a time stamp on the data acquired by the data acquisition module, and the data analysis module is used for carrying out delay analysis on the data stamped with the time stamp.
7. A delay test system during high frequency transaction according to claim 6, wherein: the data acquisition module comprises a switch, the switch is provided with at least 4 acquisition ports, the switch is simultaneously communicated with a client port, a business machine downlink port, a business machine uplink port and a trading exchange uplink port, and the switch copies data.
8. A delay test system during high frequency transaction according to claim 6, wherein: the data processing module comprises a probe for time stamping data copied by the switch.
9. A delay test system during high frequency transaction according to claim 6, wherein: the data analysis module is a processor.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115865759A (en) * | 2023-02-27 | 2023-03-28 | 科来网络技术股份有限公司 | Network equipment time delay obtaining method and system based on flow mirror protocol |
| CN117806887A (en) * | 2023-12-28 | 2024-04-02 | 上海翱坤航空科技有限公司 | Airplane ground test mode control method and system based on stm32 chip |
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