CN111653197B - Display panel and display device - Google Patents
Display panel and display device Download PDFInfo
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- CN111653197B CN111653197B CN202010547737.0A CN202010547737A CN111653197B CN 111653197 B CN111653197 B CN 111653197B CN 202010547737 A CN202010547737 A CN 202010547737A CN 111653197 B CN111653197 B CN 111653197B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
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Abstract
The invention discloses a display panel and a display device, which are characterized by comprising: the circuit comprises a substrate, a plurality of common voltage signal lines, a plurality of common electrode blocks and a plurality of bridge-spanning structures, wherein the common voltage signal lines are positioned on one side of the substrate, the common electrode blocks are positioned on one side of the common voltage signal lines far away from the substrate, and the bridge-spanning structures are positioned on one side of the common electrode blocks far away from the substrate; the common voltage signal line is electrically connected with the corresponding common electrode block through a bridge-spanning structure; the common electrode block is provided with a first opening structure, and the bridge-spanning structure is electrically connected with the common voltage signal line through the first opening structure; the common voltage signal line includes a first section having an orthographic projection on a plane of the substrate base plate covering an orthographic projection of the first opening structure on the substrate base plate. The display panel can shield the grid driving signal and prevent electromagnetic interference.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a display device.
Background
In the prior art, in order to realize a normal connection relationship, an opening may be formed in a common electrode of a display panel, but an opening in a common electrode of a general display panel is relatively large, and a common voltage signal line cannot completely shield the opening in the common electrode, so that electromagnetic interference signals generated by other signals cannot be shielded, normal display of the display panel is affected, or interference is generated on other devices, and normal use of the display panel is affected.
Disclosure of Invention
The invention provides a display panel and a display device, which are used for shielding a grid driving signal and preventing electromagnetic interference.
In a first aspect, an embodiment of the present invention provides a display panel device, including a substrate, a plurality of common voltage signal lines, a plurality of common electrode blocks, and a plurality of bridge structures, where the common voltage signal lines are located above the substrate, the common electrode blocks are located on a side of the common voltage signal lines away from the substrate, and the bridge structures are located on a side of the common electrode blocks away from the substrate; the common voltage signal line is electrically connected with the corresponding common electrode block through the bridge spanning structure;
the common electrode block is provided with a first opening structure, and the bridge-spanning structure is electrically connected with the common voltage signal line through the first opening structure;
the common voltage signal line comprises a first subsection, and an orthographic projection of the first subsection on a plane of the substrate base plate covers an orthographic projection of the first opening structure on the substrate base plate.
In a second aspect, an embodiment of the present invention provides a display device, including any one of the display panels provided in the first aspect.
According to the technical scheme provided by the embodiment of the invention, the first subsection is arranged on the common voltage signal line, the orthographic projection of the first subsection on the plane of the substrate base plate covers the orthographic projection of the first opening structure on the substrate base plate, namely, the first subsection in the common voltage signal line can completely shield the first opening structure on the common electrode block, so that the grid driving signal cannot be transmitted to a film layer on the common electrode block or to the outside of the display panel through the first opening structure, namely, the first subsection in the common voltage signal line plays a role in shielding the grid driving signal, the grid driving signal is prevented from generating electromagnetic interference on the film layer on the common electrode block or on modules outside the display panel, and the display panel is prevented from generating electromagnetic interference signals.
Drawings
In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, a brief description is given below of the drawings used in describing the embodiments. It should be clear that the described figures are only views of some of the embodiments of the invention to be described, not all, and that for a person skilled in the art, other figures can be derived from these figures without inventive effort.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
FIG. 2 is a cross-sectional view of the display panel shown in FIG. 1 along a section line AA';
FIG. 3 is a schematic cross-sectional view of the display panel shown in FIG. 1 along a section line BB';
fig. 4 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of the display panel shown in FIG. 4 along a section line CC';
fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
FIG. 9 is a cross-sectional view of the display panel shown in FIG. 8 along the section line DD';
fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present application will be described in further detail with reference to the following drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the application and are not limiting of the application. It should be further noted that, for the convenience of description, only some of the structures related to the present application are shown in the drawings, not all of the structures.
Fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention, fig. 2 is a schematic structural diagram of a cross section of the display panel shown in fig. 1 along a section line AA ', and fig. 3 is a schematic structural diagram of a cross section of the display panel shown in fig. 1 along a section line BB'. With reference to fig. 1 to 3, the display panel 100 includes a substrate 110, a plurality of common voltage signal lines 120, a plurality of common electrode blocks 130, and a plurality of bridge structures 140, wherein the common voltage signal lines 120 are located on one side of the substrate 110, the common electrode blocks 130 are located on one side of the common voltage signal lines 120 away from the substrate 110, the bridge structures 140 are located on one side of the common electrode blocks 130 away from the substrate 110, and the common voltage signal lines 120 are electrically connected to the corresponding common electrode blocks 130 through the bridge structures 140.
The common electrode block 130 is provided with a first opening structure 131, and the bridge structure 140 is electrically connected to the common voltage signal line 120 through the first opening structure 131.
The common voltage signal line 120 includes a first section 121, and an orthographic projection of the first section 121 on the plane of the substrate 110 covers an orthographic projection of the first opening structure 131 on the substrate 110.
Specifically, as shown in fig. 1 to 3, the common voltage signal line 120 is connected to a driving chip (not shown), and a common voltage signal generated by the driving chip is transmitted to the common electrode block 130 through the common voltage signal line 120 and the bridge structure 140. The bridge structure 140 may be understood as a conductive structure that is not disposed on the same layer as the common electrode block 130 and the common electrode signal line 120 and serves as a connection bridge between the common electrode block 130 and the common electrode signal line 120, and is made of a conductive material, such as copper, tungsten alloy, and the like, so that the bridge structure 140 has a conductive function, and the bridge structure 140 is electrically connected to the common voltage signal line 120 through the first opening structure 131, so that the common voltage signal line 120 can be electrically connected to the corresponding common electrode block 130.
In the prior art, the orthographic projection of the common voltage signal line 120, which is directly opposite to the first opening structure 131, on the plane of the substrate cannot completely cover the orthographic projection of the first opening structure 131 on the plane of the substrate 110, a scan line (not shown in the figure) is located on one side, which is close to the substrate 110, of the common voltage signal line 120, and is used for transmitting a high-frequency gate driving signal, and the gate driving signal is transmitted to a film layer on the common electrode block or transmitted to the outside of the display panel through an area, which is not covered by the common voltage signal line 120, of the first opening structure, and may generate electromagnetic interference on signals transmitted in the film layer on the common electrode block or other electronic modules near the display panel.
The display panel provided by the embodiment of the invention has the advantages that the first branch part 121 is arranged on the common voltage signal line 120, the orthographic projection of the first branch part 121 on the plane of the substrate 110 covers the orthographic projection of the first opening structure 131 on the substrate 110, that is, the first sub-section 121 can completely block the first opening structure 131 on the common electrode block 130, the gate driving signal cannot be transmitted to a film layer on the common electrode block or to the outside of the display panel 100 through the first opening structure 131, therefore, the first subsection 121 of the common voltage signal line 120 functions to shield the gate driving signal, prevent the gate driving signal from generating electromagnetic interference to a film layer over the common electrode block or to a module outside the display panel 100, namely, the display panel 100 is prevented from generating electromagnetic interference signals, and the film layer on the common electrode block of the display panel or the module outside the display panel 100 is protected from electromagnetic interference.
It should be noted that the orthographic projection of the first sub-portion 121 on the plane of the substrate 110 covers the orthographic projection of the first opening structure 131 on the substrate 110, and may be that the orthographic projection of the first sub-portion 121 on the plane of the substrate 110 completely coincides with the orthographic projection of the first opening structure 131 on the substrate 110, or may be that the orthographic projection of the first sub-portion 121 on the plane of the substrate 110 is slightly larger than the orthographic projection of the first opening structure 131 on the substrate 110.
It should be further noted that the display panel provided in the embodiment of the present invention includes a plurality of common voltage signal lines 120, a plurality of common electrode blocks 130, and a plurality of bridge structures 140, and fig. 1, fig. 2, and fig. 3 only exemplarily illustrate one common voltage signal line 120, one common electrode block 130, and one bridge structure 140 for clearly and simply describing the technical solution of the embodiment of the present invention. When the display panel includes a plurality of common voltage signal lines 120, a plurality of common electrode blocks 130, and a plurality of bridge structures 140, the plurality of common voltage signal lines 120 may be arranged in parallel, the plurality of common electrode blocks 130 may be arranged in a matrix, and the plurality of bridge structures 140 may be arranged in a matrix, but the arrangement manner of the plurality of common voltage signal lines 120, the plurality of common electrode blocks 130, and the plurality of bridge structures 140 is not limited in the embodiment of the present invention.
To sum up, according to the display panel provided by the embodiment of the invention, the first sub-portion is disposed on the common voltage signal line, and an orthographic projection of the first sub-portion on the plane of the substrate base plate covers an orthographic projection of the first opening structure on the substrate base plate, that is, the first sub-portion in the common voltage signal line can completely block the first opening structure on the common electrode block, so that the gate driving signal cannot be coupled to the outside of the display panel through the first opening structure, that is, the first sub-portion in the common voltage signal line plays a role in shielding the gate driving signal, and the gate driving signal is prevented from generating electromagnetic interference on modules outside the display panel, that is, the display panel is prevented from generating electromagnetic interference signals.
Optionally, with continued reference to fig. 3, the display panel 100 further includes a first insulating layer 151 between the common voltage signal line 120 and the common electrode block 130, and a second insulating layer 152 between the common electrode block 130 and the bridge structure 140.
A first via 161 is arranged in each of the first insulating layer 151 and the second insulating layer 152, and an orthographic projection of the first via 161 on the plane of the substrate 110 at least partially overlaps with an orthographic projection of the first opening structure 131 on the plane of the substrate 110; the bridge structure 140 is electrically connected to the common voltage signal line 120 and the common electrode block 130 through the first opening structure 131 and the first via 161.
Exemplarily, as shown in fig. 3, an orthographic projection of the first via 1611 in the first insulating layer 151 on the plane of the substrate base plate 110 completely overlaps with an orthographic projection of the first via 1612 in the second insulating layer 152 on the plane of the substrate base plate 110, and the orthographic projections of the first via 1611 in the first insulating layer 151 and the first via 1612 in the second insulating layer 152 on the plane of the substrate base plate 110 at least partially overlap with an orthographic projection of the first opening structure 131 on the plane of the substrate base plate 110, and fig. 3 illustrates an example that the orthographic projections of the first via 1611 in the first insulating layer 151 and the first via 1612 in the second insulating layer 152 on the plane of the substrate base plate 110 partially overlap with an orthographic projection of the first opening structure 131 on the plane of the substrate base plate 110. Since the first via 161 is located at an edge of the first opening structure 131, the bridge spanning structure 140 may be electrically connected to the common voltage signal line 120 through the first opening structure 131, the first via 1611 of the first insulating layer 151, and the first via 1612 of the second insulating layer 152, and the bridge spanning structure 140 may be electrically connected to the common electrode block 130 through the first via 1611 of the first insulating layer 151, thereby electrically connecting the common voltage signal line 120 to the corresponding common electrode block 130. The electrical connection between the common voltage signal line 120 and the corresponding common electrode block 130 can be realized through fewer openings, and the process for realizing the electrical connection between the common voltage signal line 120 and the corresponding common electrode block 130 is simple.
It should be noted that, in other embodiments, an orthographic projection of the first via 1611 in the first insulating layer 151 and the first opening structure 131 on the plane of the substrate 110 may completely overlap, and an orthographic projection of the first via 1612 in the second insulating layer 152 on the plane of the substrate 110 and an orthographic projection of the first opening structure 131 on the plane of the substrate 110 partially overlap, which is not particularly limited in the embodiment of the present invention.
Optionally, fig. 4 is a schematic structural diagram of another display panel provided in an embodiment of the present invention, and fig. 5 is a schematic structural diagram of a cross section of the display panel shown in fig. 4 along a section line CC'. Referring to fig. 4 and 5, the display surface 100 further includes a first insulating layer 151 between the common voltage signal line 120 and the common electrode block 130 and a second insulating layer 152 between the common electrode block 130 and the bridge structure 140.
A first via 161 is arranged in each of the first insulating layer 151 and the second insulating layer 152, and an orthographic projection of the first via 161 on the plane of the substrate 110 at least partially overlaps with an orthographic projection of the first opening structure 131 on the plane of the substrate 110; the bridge structure 140 is electrically connected to the common voltage signal line 120 through the first opening structure 131 and the first via 161.
The second insulating layer 152 is further provided with a second via 162, and an orthographic projection of the second via 162 on the plane of the substrate base plate 110 is not overlapped with an orthographic projection of the first opening structure 131 on the plane of the substrate base plate 110; the bridge spanning structure 140 is electrically connected to the common electrode block 130 through the second via 162.
Illustratively, as shown in fig. 4 and 5, the first via 161 is disposed in each of the first insulating layer 151 and the second insulating layer 152, and an orthographic projection of the first via 161 on the plane of the substrate 110 at least partially overlaps an orthographic projection of the first opening structure 131 on the plane of the substrate 110, so that the bridge structure 140 is electrically connected to the common voltage signal line 120 through the first opening structure 131 and the first via 161. Meanwhile, a second via hole 162 is further formed in the second insulating layer 152, an orthographic projection of the second via hole 162 on the plane of the substrate base plate 110 does not overlap with an orthographic projection of the first opening structure 131 on the plane of the substrate base plate 110, and the bridge spanning structure 140 is electrically connected with the common electrode block 130 through the second via hole 162, so that the common voltage signal line 120 is electrically connected with the corresponding common electrode block 130. The bridge spanning structure 140 is electrically connected with the common voltage signal line 120 through the first opening structure 131 and the first via hole 161, and is electrically connected with the common electrode block 130 through the second via hole 162, so that the position of the first via hole does not need to be strictly set, the requirement on the position setting of the first via hole and the second via hole is ensured to be low, and the requirement on the preparation process of the first via hole and the second via hole is favorably reduced.
Optionally, with continued reference to fig. 4, the common voltage signal line 120 further includes a second subsection 122 electrically connected to the first subsection 121.
The orthographic projection of the second subsection 122 on the plane of the substrate base 110 covers the orthographic projection of the second via 162 on the substrate base 110.
For example, as shown in fig. 4, an orthographic projection of the second subsection 122 on the plane of the substrate 110 covers an orthographic projection of the second via 162 on the substrate 110, that is, the second subsection 122 can completely block the second via 162, and the gate driving signal cannot be transmitted to the film layer above the common electrode block or to the outside of the display panel 100 through the second via 162, so the second subsection 122 in the common voltage signal line 120 also plays a role of shielding the gate driving signal, and further prevents the gate driving signal from generating electromagnetic interference on the film layer above the common electrode block or on modules outside the display panel 100, that is, prevents the display panel 100 from generating electromagnetic interference signals.
Optionally, with continued reference to fig. 4, the extended width W1 of the first subsection 121 is greater than the extended width W2 of the second subsection 122 along a first direction, which is perpendicular to the direction in which the center of the first via 161 points to the center 162 of the second via.
Illustratively, as shown in fig. 4, along the first direction (the direction indicated by the arrow in the figure), the extension width of the first branch 121 is W1, the extension width of the second branch 122 is W2, the arrangement direction of the first via 161 and the second via 162 is parallel to the extension direction of the common voltage signal line 120, and is perpendicular to the first direction, that is, the connecting line of the center points of the first via 161 and the second via 162 is perpendicular to the first direction. In practical applications, the size of the first opening structure 131 is larger than that of the second via 162, and the extension width W1 of the first subsection 111 is set to be larger than the extension width W2 of the second subsection 122, so that the influence on the aperture ratio can be reduced as much as possible while shielding the gate driving signal. Fig. 6 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and in other embodiments, a connection line between center points of the first via 161 and the second via 162 may be perpendicular to an extending direction of the common voltage signal line 120, as shown in fig. 6; or may form any angle (not shown) with the extending direction of the common voltage signal line 120, which is not limited in this embodiment of the present invention.
Optionally, with continued reference to fig. 4, the common voltage signal line 120 further includes a trace subsection 123; the trace section 123 is electrically connected to the first section 121 and the second section 122.
Specifically, as shown in fig. 4, the routing subsection 123 is directly electrically connected to the first subsection 121, the second subsection 122 is directly electrically connected to the first subsection 121, and the routing subsection 123 is further directly electrically connected to the second subsection 122, so as to ensure that the common voltage signal can be smoothly transmitted to the corresponding common electrode block 130 through the common voltage signal line 120. In another embodiment, the trace branch 123 may be directly electrically connected to the first branch 121 or the second branch 122, and the second branch 122 may be directly electrically connected to the first branch 121, as shown in fig. 6, which can also achieve the purpose of ensuring that the common voltage signal can be smoothly transmitted to the corresponding common electrode block 130 through the common voltage signal line 120.
Optionally, with continued reference to fig. 4, when the extending direction of the routing subsection 123 is parallel to the direction in which the center of the first via 161 points to the center of the second via 162, the routing subsection 123 is electrically connected to the first subsection 121 and the second subsection 122, respectively.
The line width D of the trace branch 123 is smaller than the extending width W2 of the second branch 122 along the direction perpendicular to the extending direction of the trace branch 123.
Specifically, as shown in fig. 4, a direction in which the center of the first via 161 points to the center of the second via 162 is parallel to the extending direction of the trace subsection 123, and in practical applications, along the perpendicular direction of the extending direction of the trace subsection 123, the line width D of the trace subsection 123 is smaller than the size of the second via 162, so as to ensure that the influence on the aperture ratio is reduced as much as possible. Further, by disposing the orthographic projection of the second branch 122 on the plane of the substrate 110 to cover the orthographic projection of the second via 162 on the substrate 110, that is, along the direction perpendicular to the extending direction of the routing branch 123, the width W2 of the second branch 122 is larger than the size of the second via 162, so as to further shield the gate driving signal.
Optionally, fig. 7 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 7, the display panel 100 further includes a light-shielding layer 170; the light shielding layer 170 is located on a side of the bridge spanning structure 140 away from the substrate 110; the orthographic projection of the light shielding layer 170 on the plane of the substrate 110 covers the orthographic projection of the common voltage signal line 120 on the plane of the substrate 110.
Specifically, as shown in fig. 7, the light shielding layer 170 is located on a side of the bridge spanning structure 140 away from the substrate 110, and an orthogonal projection of the light shielding layer 170 on a plane of the substrate 110 covers an orthogonal projection of the common voltage signal line 120 on the plane of the substrate 110, so that a light beam reflected by the common voltage signal line 120 is shielded by the light shielding layer 170, and the light beam is prevented from exiting the display panel 100, and metal in the display panel 100 is prevented from being visible.
Furthermore, the light shielding layer 170 can reuse a black matrix structure in the display panel, so that the number of mask plates in the preparation process of the display panel can be reduced, and the preparation process of the light shielding layer 170 structure is simplified; meanwhile, the structure of the film layer of the display panel is simple, and the light and thin design of the display panel is facilitated.
Optionally, fig. 8 is a schematic structural diagram of another display panel according to an embodiment of the present invention, and fig. 9 is a schematic structural diagram of a cross section of the display panel shown in fig. 8 along a section line DD'. As shown in fig. 8 and 9, the display panel 100 further includes a plurality of virtual common voltage signal lines 180, and the virtual common voltage signal lines 180 are insulated from the driving chips.
The orthographic projection of the virtual common voltage signal line 180 on the plane of the substrate base plate 110 is overlapped with the orthographic projection of the common electrode block group 210 on the plane of the substrate base plate 110, and the common electrode block group 210 comprises a plurality of common electrode blocks 130; at least one common electrode 130 of the common electrode block group 210 is provided with a first opening structure 131 and a second opening structure 132.
The bridge structure 140 includes a first bridge structure 141 and a second bridge structure 142, the first bridge structure 141 is electrically connected to the common voltage signal line 120 through the first opening structure 131; the second bridge structure 142 is electrically connected to the virtual common voltage signal line 180 through the second opening structure 132.
The virtual common voltage signal line 180 includes a third branch 181, and an orthographic projection of the third branch 181 on the plane of the substrate 110 covers an orthographic projection of the second opening structure 132 on the substrate 110.
For example, the number of the common electrode blocks 130 in the edge region of the special-shaped display panel is smaller than that in the middle region, so that the number of the common voltage signal lines 120 directly facing one common electrode block 130 in the edge region is smaller, and the voltage in the edge region is different from that in the middle region due to the different numbers of the common voltage signal lines 120, thereby causing the display to have difference. In order to improve the difference between the edge area display and the middle area display, the virtual common voltage signal lines 180 are arranged in the edge area, so that the number of the common voltage signal lines 120 opposite to one common electrode block 130 in the edge area is the same as that of the common voltage signal lines 120 opposite to one common electrode block 130 in the middle area, the voltage on the common electrode block 130 in the edge area is the same as that on the common electrode block 130 in the middle area, and the display effect in the edge area is improved. Further, the virtual common voltage signal line 180 is insulated from the driving chip, and in order to avoid unstable influence of the suspended virtual common voltage signal line 180 on display, the virtual common voltage signal line 180 needs to be electrically connected with the common electrode block 130, so as to ensure stable potential of the virtual common voltage signal line 180. In summary, the common electrode block group 210 is the common electrode block 130 whose orthographic projection on the plane of the substrate 110 overlaps with the orthographic projection of the virtual common voltage signal line 180 on the plane of the substrate 110. As shown in fig. 8 and 9, an orthographic projection of the third part 181 of the virtual common voltage signal line 180 on the plane of the substrate 110 covers an orthographic projection of the second opening structure 132 on the substrate 110, so that the third part 181 can completely shield the second opening structure 132 on the common electrode block 130, the gate driving signal cannot be transmitted to the film layer above the common electrode block or to the outside of the display panel 100 through the second opening structure 132, and the gate driving signal is shielded, so as to prevent the gate driving signal from generating electromagnetic interference on the film layer above the common electrode block or on modules outside the display panel 100, that is, prevent the display panel 100 from generating electromagnetic interference signals.
Optionally, fig. 10 is a schematic structural diagram of another display panel according to an embodiment of the present invention. As shown in fig. 10, the virtual common voltage signal line 180 includes a plurality of sub virtual voltage signal lines 181, and an orthographic projection of each sub virtual voltage signal line 181 on the plane of the substrate base plate 110 overlaps with an orthographic projection of one common electrode block 130 on the plane of the substrate base plate 110; each common electrode block 130 in the common electrode block group 210 is provided with a second opening structure 132.
For example, fig. 10 illustrates that the display panel 100 includes three columns of common electrode blocks 130, and the orthographic projections of the first and third columns of common electrode blocks 130 on the plane of the substrate 110 overlap with the orthographic projection of the virtual common voltage signal line 180 on the plane of the substrate 110. As shown in fig. 10, the common electrode block group 210 includes a first column of the common electrode block 130 and a third column of the common electrode block 130. The virtual common voltage signal line 180 includes four sub virtual voltage signal lines 181, the four sub virtual voltage signal lines 181 are insulated from each other, for each sub virtual voltage signal line 181, there is a common electrode block 130 capable of covering itself, that is, an orthographic projection of each sub virtual voltage signal line 181 on the plane of the substrate 110 overlaps with an orthographic projection of one common electrode block 130 on the plane of the substrate 110, each common electrode block 130 in the common electrode block group 210 is electrically connected to the sub virtual voltage signal line 181, and each common electrode block 130 in the common electrode block group 210 is provided with a second opening structure 132, so that while the display effect of the edge area is improved, the potential of each sub virtual voltage signal line 181 is ensured to be stable, and the display quality of the display panel is ensured to be good.
Optionally, with continued reference to fig. 1, the display panel 100 further includes a touch electrode block 230 and a touch trace 220. The common electrode block 130 is reused as the touch electrode block 230; the common voltage signal line 120 is multiplexed as a touch trace 220.
Specifically, as shown in fig. 1, the common electrode block 130 is reused as the touch electrode block 230, the common voltage signal line 120 is reused as the touch trace 220, and a mask plate does not need to be separately manufactured for the touch electrode block 230 and the touch trace 220, so that the process is simplified, and the cost is saved; meanwhile, the structure of the film layer of the display panel is simple, and the light and thin design of the display panel is facilitated.
Based on the same inventive concept, the embodiment of the invention further provides a display device, which comprises any one of the display panels provided in the embodiment of the invention.
Fig. 11 is a schematic structural diagram of a display device according to an embodiment of the present invention. As shown in fig. 11, the display device 200 includes a display panel 100.
The display device provided by the embodiment of the invention has the beneficial effects of the display panel in the embodiment, and the description is omitted here. The display device provided in the embodiment of the present invention may be a mobile phone, a tablet computer, a notebook computer, a television, a display area, a digital photo frame, a navigator, an intelligent wearable display device, or any product or component with a display function in specific implementation, which is not particularly limited in the embodiment of the present invention.
The foregoing is directed to the preferred embodiment of the present invention and the technical principles thereof. The present invention is not limited to the specific embodiments herein, and it will be apparent to those skilled in the art that various changes, rearrangements, and substitutions can be made without departing from the scope of the invention. Therefore, although the present invention has been described in more detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the claims.
Claims (12)
1. A display panel is characterized by comprising a substrate base plate, a plurality of public voltage signal lines, a plurality of public electrode blocks and a plurality of bridge-spanning structures, wherein the public voltage signal lines are positioned above the substrate base plate, the public electrode blocks are positioned on one sides of the public voltage signal lines far away from the substrate base plate, and the bridge-spanning structures are positioned on one sides of the public electrode blocks far away from the substrate base plate; the common voltage signal line is electrically connected with the corresponding common electrode block through the bridge spanning structure;
the common electrode block is provided with a first opening structure, and the bridge-spanning structure is electrically connected with the common voltage signal line through the first opening structure;
the common voltage signal line comprises a first subsection, and the orthographic projection of the first subsection on the plane of the substrate base plate covers the orthographic projection of the first opening structure on the substrate base plate;
the display panel further comprises a scanning line, and the scanning line is located on one side, close to the substrate, of the common voltage signal line.
2. The display panel according to claim 1, further comprising a first insulating layer between the common voltage signal line and the common electrode block and a second insulating layer between the common electrode block and the bridge structure;
a first through hole is formed in each of the first insulating layer and the second insulating layer, and an orthographic projection of the first through hole on a plane where the substrate base plate is located is at least partially overlapped with an orthographic projection of the first opening structure on the plane where the substrate base plate is located; the bridge spanning structure is electrically connected with the common voltage signal line and the common electrode block through the first opening structure and the first via hole.
3. The display panel according to claim 1, wherein the display panel further comprises a first insulating layer between the common voltage signal line and the common electrode block and a second insulating layer between the common electrode block and the bridge structure;
a first through hole is formed in each of the first insulating layer and the second insulating layer, and an orthographic projection of the first through hole on a plane where the substrate base plate is located is at least partially overlapped with an orthographic projection of the first opening structure on the plane where the substrate base plate is located; the bridge spanning structure is electrically connected with the common voltage signal line through the first opening structure and the first via hole;
a second through hole is further formed in the second insulating layer, and the orthographic projection of the second through hole on the plane of the substrate base plate is not overlapped with the orthographic projection of the first opening structure on the plane of the substrate base plate; the bridge spanning structure is electrically connected with the common electrode block through the second via hole.
4. The display panel according to claim 3, wherein the common voltage signal line further includes a second section electrically connected to the first section;
and the orthographic projection of the second part on the plane of the substrate base plate covers the orthographic projection of the second through hole on the substrate base plate.
5. The display panel according to claim 4, wherein an extended width of the first section is larger than an extended width of the second section along a first direction perpendicular to a direction in which the first via center points to the second via center.
6. The display panel of claim 5, wherein the common voltage signal line further comprises a trace subsection; the routing subsection is electrically connected with the first subsection and/or the second subsection.
7. The display panel according to claim 6, wherein when the extending direction of the trace subsection is parallel to the direction of the first via center pointing to the second via center, the trace subsection is electrically connected to the first subsection and the second subsection respectively;
and along the vertical direction of the extension direction of the routing subsection, the line width of the routing subsection is smaller than the extension width of the second subsection.
8. The display panel according to claim 1, further comprising a light-shielding layer;
the light shielding layer is positioned on one side of the bridge spanning structure, which is far away from the substrate; the orthographic projection of the light shielding layer on the plane of the substrate base plate covers the orthographic projection of the common voltage signal line on the plane of the substrate base plate.
9. The display panel according to claim 1, further comprising a plurality of virtual common voltage signal lines insulated from the driving chip;
the orthographic projection of the virtual common voltage signal line on the plane of the substrate base plate is overlapped with the orthographic projection of a common electrode block group on the plane of the substrate base plate, and the common electrode block group comprises a plurality of common electrode blocks; at least one common electrode block of the common electrode block group is provided with the first opening structure and the second opening structure;
the bridge spanning structure comprises a first bridge spanning structure and a second bridge spanning structure, and the first bridge spanning structure is electrically connected with the common voltage signal line through the first opening structure; the second bridge structure is electrically connected with the virtual common voltage signal line through the second opening structure;
the virtual common voltage signal line comprises a third subsection, and the orthographic projection of the third subsection on the plane of the substrate base plate covers the orthographic projection of the second opening structure on the substrate base plate.
10. The display panel according to claim 9, wherein the virtual common voltage signal line includes a plurality of sub-virtual voltage signal lines, and an orthogonal projection of each of the sub-virtual voltage signal lines on the plane of the substrate base overlaps an orthogonal projection of one of the common electrode blocks on the plane of the substrate base; and each common electrode block in the common electrode block group is provided with the second opening structure.
11. The display panel of claim 1, wherein the display panel further comprises touch electrode blocks and touch traces;
the common electrode block is reused as the touch electrode block; and the common voltage signal line is multiplexed as the touch control wiring.
12. A display device characterized by comprising the display panel according to any one of claims 1 to 11.
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| CN202010547737.0A CN111653197B (en) | 2020-06-16 | 2020-06-16 | Display panel and display device |
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| CN114171574B (en) * | 2021-12-08 | 2023-05-09 | 武汉华星光电半导体显示技术有限公司 | Display panel |
| CN114690496B (en) * | 2022-03-25 | 2023-08-22 | Tcl华星光电技术有限公司 | Display panel, array substrate and manufacturing method thereof |
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| CN203894515U (en) * | 2014-06-13 | 2014-10-22 | 京东方科技集团股份有限公司 | Array substrate and display device |
| CN104460163B (en) * | 2014-12-25 | 2017-07-28 | 上海天马微电子有限公司 | Array substrate, manufacturing method thereof and display device |
| CN104597670B (en) * | 2014-12-29 | 2017-10-10 | 上海天马微电子有限公司 | Array substrate, manufacturing method thereof and display device |
| CN206479966U (en) * | 2017-02-28 | 2017-09-08 | 厦门天马微电子有限公司 | A kind of touch-control display panel and display device |
| CN107179637B (en) * | 2017-06-16 | 2020-05-12 | 厦门天马微电子有限公司 | Array substrate, liquid crystal display panel and liquid crystal display device |
| CN107170364B (en) * | 2017-07-04 | 2019-08-20 | 厦门天马微电子有限公司 | A kind of abnormal shape display panel and display device |
| CN107526227B (en) * | 2017-09-11 | 2021-04-30 | 上海天马微电子有限公司 | Display panel and display device |
| CN108269505B (en) * | 2018-01-17 | 2020-08-25 | 天马微电子股份有限公司 | Display panel and display device |
| WO2019187121A1 (en) * | 2018-03-30 | 2019-10-03 | シャープ株式会社 | Display device |
| CN109445646B (en) * | 2018-12-29 | 2022-07-05 | 上海中航光电子有限公司 | Touch display panel and touch display device |
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