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CN111525868B - Phase shifting method and system for three-phase inverter and readable storage medium - Google Patents

Phase shifting method and system for three-phase inverter and readable storage medium Download PDF

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Publication number
CN111525868B
CN111525868B CN202010386767.8A CN202010386767A CN111525868B CN 111525868 B CN111525868 B CN 111525868B CN 202010386767 A CN202010386767 A CN 202010386767A CN 111525868 B CN111525868 B CN 111525868B
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phase
sampling time
pwm signal
shifting
shifted
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CN111525868A (en
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苏俊
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Guangdong Changjincheng Intelligent Manufacturing Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
    • H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
    • H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
    • H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
    • H02P27/085—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P23/00—Arrangements or methods for the control of AC motors characterised by a control method other than vector control
    • H02P23/28—Controlling the motor by varying the switching frequency of switches connected to a DC supply and the motor phases
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
    • H02P2209/00—Indexing scheme relating to controlling arrangements characterised by the waveform of the supplied voltage or current
    • H02P2209/05—Polyphase motors supplied from a single-phase power supply or a DC power supply

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a phase shifting method and a phase shifting system of a three-phase inverter and a readable storage medium. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, and the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, so that the cost and the circuit area are effectively reduced.

Description

Phase shifting method and system for three-phase inverter and readable storage medium
Technical Field
The invention belongs to the field of power electronics, and particularly relates to a phase shifting method and system for a three-phase inverter and a readable storage medium.
Background
With the development of automation and consumption upgrading, three-phase motors (three-phase asynchronous motors and three-phase synchronous motors) are more and more widely applied. In the inverter of the three-phase motor, whether the three-phase current detection of the motor is accurate or not directly affects the motor control. In the current phase current detection method for a three-phase inverter, a medium-power and low-power three-phase motor mainly adopts a low-cost resistance sampling mode, and resistance sampling is divided into three topologies, namely three-resistance sampling, double-resistance sampling and single-resistance sampling, please refer to fig. 1 to 3, fig. 1 is a circuit topology diagram of three-resistance sampling, fig. 2 is a circuit topology diagram of double-resistance sampling, and fig. 3 is a circuit topology diagram of single-resistance sampling.
Please refer to fig. 4 and 5 for waveforms of sampling timings of triple resistance sampling, double resistance sampling, and single resistance sampling, where fig. 4 is a waveform diagram of sampling timings of triple resistance sampling and double resistance sampling, and fig. 5 is a waveform diagram of sampling timings of single resistance sampling. When the lower tubes of the three inverters are connected, the three-resistor sampling is carried out, and the voltage on the sampling resistor is detected at the same time, so that three-phase current can be obtained; when the three lower tubes are conducted, the voltage on the sampling resistor is detected simultaneously by double-resistor sampling to obtain two-phase current, and the third-phase current can be converted by a formula of Ia + Ib + Ic being 0; in the single-resistor sampling, a first path of current is sampled (called as sampling time t1) at the moment when one upper tube opens the other two lower tubes, a second path of current is sampled at the moment when the other upper tube opens the other lower tubes (called as sampling time t2), and finally a third path of current is converted through a formula of Ia + Ib + Ic being 0.
In terms of hardware cost, the single-resistor sampling only needs one sampling resistor and one operational amplifier, so that the cost is the lowest, the circuit area is the smallest, and the cost and the circuit area of the double-resistor sampling and the three-resistor sampling become higher in sequence. However, since single-resistor sampling has high algorithm requirements and has some problems to be solved, double-resistor and triple-resistor sampling topologies are mostly adopted in the market. The problems to be solved by single-resistor sampling mainly include: when the two-phase duty ratio or the three-phase duty ratio is relatively close, the above-mentioned sampling time t1 or t2 is very small, and the wave generated by the operational amplifier and the MOS transistor brings sampling noise, so that a certain sampling time must be ensured to ensure that the detected signal is an accurate current signal. If the sampling time t1 or t2 is less than the required minimum sampling time, the correct current signal cannot be detected. Referring to fig. 6 and 7, fig. 6 shows a PWM waveform with sufficient sampling time, and fig. 7 shows a PWM waveform with insufficient sampling time t 2. Because single-resistor sampling has the advantages of low cost and low area, some solutions have been proposed in the prior art to the above problems, one of which is called phase-shifting method, and the specific steps are as follows:
1. judging the duty ratio of the three-phase PWM signal (assuming PWMA > PWMB > PWMC)
2. If PWMA-PWMB < tmin (tmin is the minimum sample time), then PWMA is phase shifted to the left or PWMB is phase shifted to the right to construct a sample time t1 of sufficient size.
3. If PWMB-PWMC < tmin, then PWMB is phase shifted to the right to construct a sample time t2 of sufficient size.
Referring to fig. 8, the phase shift method can solve the problem of insufficient sampling time t2 in fig. 7. The phase shift method proposed in the prior art can detect an accurate current waveform without changing the PWM duty ratio, but actually, noise occurs when the driving motor rotates, and the following reasons mainly exist:
referring to fig. 9, assuming that also PWMA > PWMB > PWMC, the sampling time t1 is sufficient, as the motor rotates, PWMB gradually decreases causing PWMB to be closer to PWMC so that the sampling time t2 is insufficient. Therefore, after phase shifting by using the phase shifting method in the prior art, the three-phase inverter emits waves in the following way:
PWMA is unchanged and PWMB is unchanged, PWMC is phase shifted to the right to shift out sample time t 2. Then, as the motor rotates, the PWMB duty ratio is continuously reduced, the size relation of the duty ratios of PWMA, PWMB and PWMC is changed into PWMA > PWMC > PWMB, and the three-phase inverter generates waves according to the following modes:
PWMA is unchanged and PWMC is unchanged, PWMB is shifted to the right to shift out sample time t 2. It can be seen that in two adjacent periods when the PWMB > PWMC is switched to the PWMC > PWMB, sudden changes occur in the wave of the PWMB and the PWMC, the PWMB is changed from the constant state to the right phase shift, and the PWMC is changed from the right phase shift to the constant state, and the sudden changes bring noise to the operation of the motor.
Therefore, it is necessary to provide a three-phase inverter phase shifting method that can achieve smooth switching of duty ratio and can always maintain sufficient current sampling time.
It is noted that the information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.
Disclosure of Invention
The invention aims to provide a phase shifting method and system of a three-phase inverter and a readable storage medium, which are used for solving the problem that noise occurs when a motor is driven to rotate by using the phase shifting method in the prior art.
In order to solve the technical problem, the invention provides a phase shifting method of a three-phase inverter, which is used for detecting phase current of a three-phase motor, wherein the three-phase inverter is used for outputting three-phase PWM signals, and the three-phase PWM signals are respectively a first PWM signal, a second PWM signal and a third PWM signal;
in one PWM period, the continuous time of one and only one high level in the three-phase PWM signals is a first sampling time;
in one PWM period, the continuous time of one and only one of the three-phase PWM signals which is low level is the second sampling time; the phase shifting method of the three-phase inverter comprises the following steps:
acquiring duty ratio information of the first PWM signal, the second PWM signal and the third PWM signal in a PWM period;
judging whether the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, if so, entering a non-phase-shifting stage, and if not, entering a phase-shifting stage;
based on the judgment result, setting the first PWM signal, the second PWM signal and the third PWM signal with the central duty ratio as the phase-shifting PWM signal when the phase-shifting stage is switched to the phase-shifting stage, wherein the PWM signal is always the phase-shifting PWM signal before the phase-shifting stage is switched back to the non-phase-shifting stage;
the phase-shifting stage is to perform phase-shifting processing on the phase-shifted PWM signal to make the first sampling time or the second sampling time greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not to perform any processing.
Optionally, the phase-shifting the phase-shifted PWM signal includes:
and performing left phase shift or right phase shift on the phase-shifted PWM signal.
Optionally, if the first sampling time is less than the minimum sampling time, the phase-shifted PWM signal is shifted rightward so that the first sampling time is greater than or equal to the minimum sampling time, and in the process of shifting the phase-shifted PWM signal rightward, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the first sampling time is set on the side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is the maximum, the first sampling time is set on the side of a falling edge.
Optionally, if the second sampling time is less than the minimum sampling time, the phase-shifted PWM signal is shifted to the left so that the second sampling time is greater than or equal to the minimum sampling time, and in the process of shifting the phase-shifted PWM signal to the left, for the second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the second sampling time is placed on the rising edge side, and when the duty ratio of the phase-shifted PWM signal is the minimum, the second sampling time is placed on the falling edge side.
Based on the same inventive concept, the invention also provides a three-phase inverter phase shifting system, which utilizes the three-phase inverter phase shifting method in any one of the above characteristic descriptions, and the three-phase inverter phase shifting system comprises:
a duty ratio information obtaining module configured to obtain duty ratio information of the first PWM signal, the second PWM signal, and the third PWM signal within one PWM period;
a determining module configured to determine a duty ratio relationship among the first PWM signal, the second PWM signal, and the third PWM signal, and to determine whether the first sampling time or the second sampling time is less than a minimum sampling time;
a setting module configured to set, based on the determination result, a middle duty ratio of the first PWM signal, the second PWM signal, and the third PWM signal to be a phase-shifted PWM signal when switching from the non-phase-shift stage to the phase-shift stage, and the PWM signal is always the phase-shifted PWM signal before switching back to the non-phase-shift stage;
a phase shift module configured to, when the first sample time or the second sample time is less than a minimum sample time, phase-shift the phase-shifted PWM signal such that the first sample time or the second sample time is greater than or equal to the minimum sample time;
if the phase-shifting stage is yes, the phase-shifting PWM signal is subjected to phase-shifting processing so that the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not subjected to any processing.
Optionally, the phase-shifting module performs phase-shifting processing on the phase-shifted PWM signal, including:
and performing left phase shift or right phase shift on the phase-shifted PWM signal.
Optionally, the phase shifting module is configured to, when the first sampling time is less than a minimum sampling time, shift the phase of the phase-shifted PWM signal to the right to make the first sampling time be greater than or equal to the minimum sampling time, and in the process of shifting the phase of the phase-shifted PWM signal to the right, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is centered, set the first sampling time on a side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is the maximum, set the first sampling time on a side of a falling edge.
Optionally, the phase shift module is further configured to, when the second sampling time is less than a minimum sampling time, shift the phase-shifted PWM signal to the left so that the second sampling time is greater than or equal to the minimum sampling time, and during the phase-shifting of the phase-shifted PWM signal to the left,
for a second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the second sampling time is placed on one side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is minimum, the second sampling time is placed on one side of a falling edge.
Based on the same inventive concept, the present invention further proposes a readable storage medium, on which a computer program is stored, which, when being executed by a processor, is capable of implementing the three-phase inverter phase shifting method according to any one of the above-mentioned features.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
the invention provides a phase shifting method and system of a three-phase inverter and a readable storage medium, which are characterized in that duty ratio information of three-phase PWM signals of the three-phase inverter in a PWM period is firstly obtained, then the relation between two sampling time and the minimum sampling time is judged, whether the phase shifting stage is started or not is selected based on the judgment result, if the phase shifting stage is started, the phase shifting PWM signals are set, and the phase shifting processing is carried out on the phase shifting PWM signals. In the prior art, the first sampling time and the second sampling time are mostly set only on the rising edge side of the PWM signal, in the technical scheme provided by the present invention, after the first sampling time and the second sampling time are judged to be less than the minimum sampling time, in the phase shift process, it is judged whether the sampling time is greater than or equal to the minimum sampling time on the rising edge side or the falling edge side of the phase-shifted PWM signal, if so, the sampling time is set on the side. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, and the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, so that the cost and the circuit area are effectively reduced.
Drawings
FIG. 1 is a prior art circuit topology diagram of three-resistor sampling;
FIG. 2 is a circuit topology diagram of dual resistor sampling in the prior art;
FIG. 3 is a prior art circuit topology for single resistor sampling;
FIG. 4 is a waveform diagram of sampling timings of three-resistor sampling and two-resistor sampling in the prior art;
FIG. 5 is a prior art waveform of the sampling time of a single resistance sample;
FIG. 6 is a prior art PWM waveform with both sample times sufficient;
FIG. 7 is a PWM waveform of the prior art with insufficient sample time t 2;
FIG. 8 is a prior art PWM waveform processed by phase shifting;
FIG. 9 is a PWM waveform showing a technical problem in the phase shift method in the prior art;
fig. 10 is a schematic flow chart of a phase shifting method for a three-phase inverter according to an embodiment of the present invention;
FIG. 11 is a waveform diagram illustrating a first step of phase shifting performed when the first sampling time is less than the minimum sampling time in an embodiment of the present invention;
FIG. 12 is a waveform diagram after further phase shifting in an embodiment of the present invention;
FIG. 13 is a waveform diagram after phase shifting is completed in an embodiment of the present invention;
FIG. 14 is a waveform diagram illustrating the second sampling time being less than the minimum sampling time and the first phase shifting according to an embodiment of the present invention;
FIG. 15 is a waveform illustrating a further phase shift in an embodiment of the present invention;
FIG. 16 is a waveform illustrating a further phase shift in an embodiment of the present invention;
FIG. 17 is a waveform diagram after phase shifting is completed in an embodiment of the present invention;
FIG. 18 is a schematic structural diagram of a three-phase inverter phase shifting system according to another embodiment of the present invention;
among them, in fig. 18: the phase-shifting system comprises a 10-three-phase inverter, a 100-duty ratio information acquisition module, a 101-judgment module, a 102-setting module and a 103-phase-shifting module.
Detailed Description
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
In the description of the present invention, it is to be understood that the terms "center", "upper", "lower", "left", "right", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
Referring to fig. 10, an embodiment of the invention provides a phase shifting method for a three-phase inverter, which is used to detect phase currents of a three-phase motor, where the three-phase inverter is used to output three-phase PWM signals, and the three-phase PWM signals are a first PWM signal, a second PWM signal, and a third PWM signal, respectively. In one PWM period, the continuous time of one and only one high level in the three-phase PWM signals is a first sampling time; and in one PWM period, the continuous time of one and only one of the three-phase PWM signals which is low level is the second sampling time. The phase shifting method of the three-phase inverter comprises the following steps:
s1: acquiring duty ratio information of the first PWM signal, the second PWM signal and the third PWM signal in a PWM period;
s2: judging whether the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, if so, entering a non-phase-shifting stage, and if not, entering a phase-shifting stage;
s3: based on the judgment result, setting the first PWM signal, the second PWM signal and the third PWM signal with the central duty ratio as the phase-shifting PWM signal when the phase-shifting stage is switched to the phase-shifting stage, wherein the PWM signal is always the phase-shifting PWM signal before the phase-shifting stage is switched back to the non-phase-shifting stage;
the phase-shifting stage is to perform phase-shifting processing on the phase-shifted PWM signal to make the first sampling time or the second sampling time greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not to perform any processing.
Firstly, judging whether the first sampling time or the second sampling time is less than the minimum sampling time, if so, performing phase shifting processing on the phase-shifted PWM signal to enable the first sampling time or the second sampling time to be more than or equal to the minimum sampling time; if any one of the first sampling time or the second sampling time is less than the minimum sampling time, judging whether the sampling time is greater than or equal to the minimum sampling time on the side of the rising edge or the side of the falling edge of the phase-shift PWM signal or not in the phase-shift processing process of the phase-shift PWM signal, and if so, setting the sampling time on the side.
The method is different from the prior art in that duty ratio information of three-phase PWM signals of a three-phase inverter in a PWM period is obtained firstly, then the relation between two sampling time and the minimum sampling time is judged, whether a phase shifting stage is entered or not is selected based on the judgment result, if the phase shifting stage is entered, the phase shifting PWM signals are set, and the phase shifting PWM signals are subjected to phase shifting processing. In the prior art, the first sampling time and the second sampling time are mostly set only on the rising edge side of the PWM signal, in the technical scheme provided by the present invention, after the first sampling time and the second sampling time are judged to be less than the minimum sampling time, in the phase shift process, it is judged whether the sampling time is greater than or equal to the minimum sampling time on the rising edge side or the falling edge side of the phase-shifted PWM signal, if so, the sampling time is set on the side. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, and the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, so that the cost and the circuit area are effectively reduced. It should be noted that the step of performing phase shift processing on the phase-shifted PWM signal may include: and performing left phase shift or right phase shift on the phase-shifted PWM signal. The phase shift to the left or the phase shift to the right mentioned here is similar to the phase shift method of the prior art, and means that the phase of the three-phase PWM signal is shifted to the left or the right with respect to the waveform diagram of the three-phase PWM signal in one cycle.
Further, determining whether the first sampling time or the second sampling time is less than a minimum sampling time, if so, performing phase shift processing on the phase-shifted PWM signal to make the first sampling time or the second sampling time greater than or equal to the minimum sampling time includes the following steps:
if the first sampling time is less than the minimum sampling time, the phase-shifted PWM signal is shifted to the right so that the first sampling time is greater than or equal to the minimum sampling time, in the process of shifting the phase-shifted PWM signal to the right, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the first sampling time is set on one side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is the maximum, the first sampling time is set on one side of a falling edge.
For convenience of explanation, it is assumed that the first PWM signal, the second PWM signal and the third PWM signal are PWMA, PWMB and PWMC, respectively, please refer to fig. 11, and initial duty ratios of the three PWM signals are: PWMA > PWMB > PWMC, assuming that the second sampling time t2 is sufficient, as the electrical angle changes, PWMB gradually increases and PWMA gradually decreases, which causes PWMB to be closer to PWMA, so that it can be seen that the first sampling time t1 gradually decreases to be less than the minimum sampling time, at this time, the proposed technical solution according to the embodiment of the present invention can perform the following processing on the three-phase PWM signal:
1. before the sizes of PWMB and PWMA are mutually exchanged (conditions are that PWMA is more than or equal to PWMB, PWMA-PWMB is less than tmin, and tmin is the minimum sampling time), the phase-shifting processing is as follows:
PWMA and PWMC are not phase shifted, PWMB is phase shifted to the right to shift out sample time t1 on the left.
Referring to fig. 11, according to the above wave-shaping rule, we can calculate that when PWMB is gradually increased and PWMA is gradually decreased to PWMB — PWMC, there is also a time at the right side of the PWM waveform with time t — tmin.
2. The PWMB is continuously increased, the PWMA is continuously decreased, and in the process of mutually exchanging the sizes of the PWMB and the PWMA (conditions: PWMB > PWMA, PWMB-PWMA < tmin), the phase shift processing is as follows:
referring to FIG. 12, PWMA and PWMC are not phase shifted, PWMB is phase shifted by an amount of: PWMB is time shifted from PWMA by t tmin on the right side, and the first sampling time t1 is placed there, and the second sampling time t2 is placed on either the left or right side.
3. PWMB continues to increase and PWMA continues to decrease, after PWMB and PWMA have completely switched sizes (condition: PWMB > PWMA, PWMB-PWMA ≧ tmin), the first sampling time t1 and the second sampling time t2 are both sufficiently greater than tmin to thereby resume the initial wave-emitting form, with the sampling times either left or right, i.e.:
PWMA, PWMB, PWMC are not phase shifted, see FIG. 13.
It should be noted that, in addition to being applicable to the above-mentioned wave-sending waveform, a person skilled in the art can understand that the technical solution of the present application can also be applied to a case opposite to the above-mentioned wave-sending waveform, for example, refer to PWM1L, PWM2L, and PWM3L in fig. 4, since the wave-sending waveform of the lower tube of the inverter is exactly opposite to the wave-sending waveform of the upper tube of the inverter, the phase-shifting process at this time is opposite to the phase-shifting process of the above-mentioned wave-sending waveform, specifically: if the first sampling time is less than the minimum sampling time, the phase-shifted PWM signal is shifted to the left so that the first sampling time is greater than or equal to the minimum sampling time, in the process of shifting the phase-shifted PWM signal to the left, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is in the middle, the first sampling time is set on one side of a falling edge, and when the duty ratio of the phase-shifted PWM signal is the maximum, the first sampling time is set on one side of a rising edge.
Optionally, determining whether the first sampling time or the second sampling time is less than a minimum sampling time, if so, performing phase shift processing on the phase-shifted PWM signal to make the first sampling time or the second sampling time greater than or equal to the minimum sampling time further includes:
if the second sampling time is less than the minimum sampling time, the phase-shifted PWM signal is shifted to the left so that the second sampling time is greater than or equal to the minimum sampling time, in the process of shifting the phase-shifted PWM signal to the left, for the second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the second sampling time is placed on the side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is the minimum, the second sampling time is placed on the side of a falling edge.
Similarly to the above description, for convenience of explanation, it is assumed that the first PWM signal, the second PWM signal and the third PWM signal are still PWMA, PWMB and PWMC respectively, please refer to fig. 14, and the initial duty ratio relationships of these three PWM signals are: PWMA > PWMB > PWMC, the first sampling time t1 is sufficient, and as the electrical angle changes, PWMB gradually decreases and PWMC gradually increases to cause PWMB to be closer to PWMC, so that it can be seen that the second sampling time t2 gradually decreases to be less than the minimum sampling time. At this time, according to the technical scheme provided by the embodiment of the invention, the following processing can be performed on the three-phase PWM signal:
1. before the sizes of PWMB and PWMC are mutually exchanged (the conditions are that PWMB is more than or equal to PWMC, and PWMB-PWMC is less than tmin), the phase-shifting treatment comprises the following steps:
PWMA and PWMC are not phase shifted and PWMB is phase shifted to the left to shift out sample time t2, see fig. 14.
Referring to fig. 15, according to the above phase shift processing, it can be calculated that when PWMB is gradually decreased and PWMC is gradually increased to PWMB ═ PWMC, there is also a time with a time size t ═ tmin on the right side.
2. The PWMB is continuously reduced, the PWMC is continuously increased, and in the process of mutually exchanging the sizes of the PWMB and the PWMC (conditions: PWMC > PWMB, PWMC-PWMB < tmin), the phase shifting processing is as follows:
PWMA and PWMC do not shift phase, PWMB shifts phase, and the amplitude of the shift phase is: PWMB is shifted from PWMC by t tmin on the right side, and the sampling time t2 is placed here, and the sampling time t1 can be placed on the left side or the right side, please refer to fig. 16.
3. PWMB continues to decrease and PWMC continues to increase, after PWMB and PWMC have completely switched in size (conditions: PWMC > PWMB, PWMC-PWMB ≧ tmin), sample times t1 and t2 are both sufficiently greater than tmin to thereby resume the initial wave-shaping, with sample times either left or right, i.e.:
PWMA, PWMB, PWMC are not phase shifted, see FIG. 17.
Similar to the foregoing, in addition to being applicable to the above-mentioned wave-sending waveform, a person skilled in the art can understand that the technical solution of the present application can also be applied to the case of reversing the above-mentioned wave-sending waveform, for example, referring to PWM1L, PWM2L, and PWM3L in fig. 4 as well, since the wave-sending waveform of the lower tube of the inverter is just reverse to the wave-sending waveform of the upper tube of the inverter, the phase-shifting process at this time is reverse to the phase-shifting process of the above-mentioned wave-sending waveform, specifically: if the second sampling time is less than the minimum sampling time, performing right phase shifting on the phase-shifted PWM signal to enable the second sampling time to be greater than or equal to the minimum sampling time, in the process of performing right phase shifting on the phase-shifted PWM signal, for the second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, placing the second sampling time on one side of a falling edge, and when the duty ratio of the phase-shifted PWM signal is minimum, setting the second sampling time on one side of a rising edge. It can be seen from the above phase shift processing process that in the whole switching process, both PWMA and PWMC are not phase-shifted, and are always phase-shifted by PWMB, and the phase shift process of PWMB is also in smooth transition, a sampling time is initially fixed between the left side of PWMB and the left side of PWMC, the right side of PWMB is adjusted, when PWMB is not greater than PWMC and PWMC-PWMB is less than tmin, a sampling time is fixed between the right side of PWMB and the right side of PWMC, the left side of PWMB is adjusted until PWMC-PWMB is not less than tmin, and the whole process does not have wave-making abrupt change. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, so that the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, and the cost and the circuit area are effectively reduced.
Still further, the method comprises the following steps:
judging whether the difference value between the maximum value and the minimum value in the duty ratios of the first PWM signal, the second PWM signal and the third PWM signal is smaller than ts, if yes, sequentially shifting the phases of the first PWM signal, the second PWM signal and the third PWM signal to the left or the right so as to enable the first sampling time or the second sampling time to be larger than or equal to the minimum sampling time;
wherein ts is equal to or greater than the minimum sampling time.
Based on the same inventive concept, another embodiment of the present invention further provides a three-phase inverter phase shifting system 10, which utilizes any one of the above-mentioned features to perform the three-phase inverter phase shifting method, and referring to fig. 18, the three-phase inverter phase shifting system 10 includes: a duty ratio information obtaining module 100 configured to obtain duty ratio information of the first PWM signal, the second PWM signal, and the third PWM signal in one PWM period. A determining module 101 configured to determine a duty ratio relationship among the first PWM signal, the second PWM signal, and the third PWM signal, and determine whether the first sampling time or the second sampling time is less than a minimum sampling time. A setting module 102 configured to set, based on the determination result, one of the first PWM signal, the second PWM signal, and the third PWM signal, which has a central duty ratio when switched from the non-phase-shifting phase to the phase-shifting phase, as the phase-shifting PWM signal, and the PWM signal is always the phase-shifting PWM signal before switched back to the non-phase-shifting phase. A phase shift module 103 configured to perform phase shift processing on the phase-shifted PWM signal to make the first sample time or the second sample time greater than or equal to a minimum sample time when the first sample time or the second sample time is less than the minimum sample time. If the phase-shifting stage is yes, the phase-shifting PWM signal is subjected to phase-shifting processing so that the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not subjected to any processing.
Firstly, the duty ratio information obtaining module 100 is used for obtaining the duty ratio information of three-phase PWM signals of a three-phase inverter in a PWM period, finding out the duty ratio in the three-phase PWM signals that is in the middle, the setting module 102 is used for setting the duty ratio as a phase-shifted PWM signal, then the judging module 101 is used for judging whether the first sampling time or the second sampling time is less than the minimum sampling time, and if so, the phase-shifting module 103 is used for performing phase-shifting processing on the phase-shifted PWM signal. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, and the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, so that the cost and the circuit area are effectively reduced.
Optionally, the phase-shifting module 103 performs phase-shifting processing on the phase-shifted PWM signal, including:
and performing left phase shift or right phase shift on the phase-shifted PWM signal.
Optionally, the phase shift module 103 is configured to shift the phase of the phase-shifted PWM signal to the right when the first sampling time is less than a minimum sampling time, so that the first sampling time is greater than or equal to the minimum sampling time.
Optionally, the phase shift module 103 is configured to, when the second sampling time is less than a minimum sampling time, shift the phase-shifted PWM signal to the left so that the second sampling time is greater than or equal to the minimum sampling time.
Optionally, the determining module 101 is further configured to determine whether a difference between a maximum value and a minimum value in duty ratios of the first PWM signal, the second PWM signal, and the third PWM signal is less than ts;
the phase shifting module 103 is further configured to, when a difference between a maximum value and a minimum value in duty cycles of the first PWM signal, the second PWM signal, and the third PWM signal is smaller than ts, sequentially shift the first PWM signal, the second PWM signal, and the third PWM signal to the left or to the right so that the first sampling time or the second sampling time is greater than or equal to the minimum sampling time;
wherein ts is equal to or greater than the minimum sampling time.
It is understood that the duty ratio information obtaining module 100, the judging module 101, the setting module 102, and the phase shifting module 103 may be combined in one device, or any one of them may be split into multiple sub-modules, or at least part of the functions of one or more of the duty ratio information obtaining module 100, the judging module 101, the setting module 102, and the phase shifting module 103 may be combined with at least part of the functions of other modules and implemented in one functional module. According to an embodiment of the present invention, at least one of the duty cycle information obtaining module 100, the setting module 102, and the phase shifting module 103 may be at least partially implemented as a hardware circuit, such as a Field Programmable Gate Array (FPGA), a Programmable Logic Array (PLA), a system on a chip, a system on a substrate, a system on a package, an Application Specific Integrated Circuit (ASIC), or may be implemented in hardware or firmware in any other reasonable manner of integrating or packaging a circuit, or implemented in a suitable combination of three implementations of software, hardware, and firmware. Alternatively, at least one of the duty ratio information obtaining module 100, the determining module 101, the setting module 102, and the phase shifting module 103 may be at least partially implemented as a computer program module, and when the program is executed by a computer, the function of the corresponding module may be executed.
Based on the same inventive concept, a readable storage medium is further proposed in another embodiment of the present invention, on which a computer program is stored, which when executed by a processor can implement the three-phase inverter phase shifting method described in any of the above-mentioned features. The readable storage medium may be a tangible device that can hold and store instructions for use by an instruction execution device, such as, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. The computer programs described herein may be downloaded from a readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives the computer program from the network and forwards the computer program for storage in a readable storage medium in the respective computing/processing device. Computer programs for carrying out operations of the present invention may be assembly instructions, Instruction Set Architecture (ISA) instructions, machine related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer program may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, the electronic circuitry, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA), can execute computer-readable program instructions to implement various aspects of the present invention by utilizing state information of a computer program to personalize the electronic circuitry.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, systems and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer programs. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the programs, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. Such a computer program may also be stored in a readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the readable storage medium storing the computer program comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the computer program which executes on the computer, other programmable apparatus or other devices implements the functions/acts specified in the flowchart and/or block diagram block or blocks.
In summary, according to the phase shifting method and system for the three-phase inverter and the readable storage medium provided by the present invention, duty ratio information of three-phase PWM signals of the three-phase inverter in one PWM period is first obtained, then a relationship between two sampling times and a minimum sampling time is determined, whether a phase shifting stage is to be entered is selected based on a determination result, and if the phase shifting stage is entered, the phase shifting PWM signals are set, and the phase shifting processing is performed on the phase shifting PWM signals. In the prior art, the first sampling time and the second sampling time are mostly set only on the rising edge side of the PWM signal, in the technical scheme provided by the present invention, after the first sampling time and the second sampling time are judged to be less than the minimum sampling time, in the phase shift process, it is judged whether the sampling time is greater than or equal to the minimum sampling time on the rising edge side or the falling edge side of the phase-shifted PWM signal, if so, the sampling time is set on the side. According to the technical scheme provided by the invention, two sampling times can be ensured at any time, so that the three-phase current of the three-phase motor can be converted, and the smooth transition of a switching link can be ensured due to the fact that only one path of PWM signal is subjected to phase shifting, and the condition of duty ratio mutation can not occur. The running noise of the motor is reduced, and the single-resistor sampling can be utilized by utilizing the technical scheme of the invention, so that the cost and the circuit area are effectively reduced.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example" or "a specific example" or the like are intended to mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The above description is only a preferred embodiment of the present invention, and does not limit the present invention in any way. It will be understood by those skilled in the art that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (9)

1. A three-phase inverter phase-shifting method is used for detecting phase current of a three-phase motor, and is characterized in that the three-phase inverter is used for outputting three-phase PWM signals which are respectively a first PWM signal, a second PWM signal and a third PWM signal;
in one PWM period, the continuous time of one and only one high level in the three-phase PWM signals is a first sampling time;
in one PWM period, the continuous time of one and only one of the three-phase PWM signals which is low level is the second sampling time; the phase shifting method of the three-phase inverter comprises the following steps:
acquiring duty ratio information of the first PWM signal, the second PWM signal and the third PWM signal in a PWM period;
judging whether the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, if so, entering a non-phase-shifting stage, and if not, entering a phase-shifting stage;
setting the first PWM signal, the second PWM signal and the third PWM signal with the central duty ratio to be phase-shifted PWM signals when the non-phase-shifting stage is switched to the phase-shifting stage based on the judgment result, wherein the PWM signals are always phase-shifted PWM signals before the non-phase-shifting stage is switched back;
the phase-shifting stage is to perform phase-shifting processing on the phase-shifted PWM signal to make the first sampling time or the second sampling time greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not to perform any processing.
2. The phase shifting method for the three-phase inverter according to claim 1, wherein the phase shifting the phase-shifted PWM signal comprises:
and performing left phase shift or right phase shift on the phase-shifted PWM signal.
3. The phase shifting method for the three-phase inverter according to claim 2, wherein if the first sampling time is less than the minimum sampling time, the phase-shifted PWM signal is phase-shifted to the right so that the first sampling time is greater than or equal to the minimum sampling time, and during the phase-shifting of the phase-shifted PWM signal to the right, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the first sampling time is set on the side of the rising edge, and when the duty ratio of the phase-shifted PWM signal is the maximum, the first sampling time is set on the side of the falling edge.
4. The phase shifting method for the three-phase inverter according to claim 3, wherein if the second sampling time is less than the minimum sampling time, the phase-shifted PWM signal is phase-shifted to the left so that the second sampling time is greater than or equal to the minimum sampling time, and during the phase-shifting of the phase-shifted PWM signal to the left, for the second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the second sampling time is placed on the rising edge side, and when the duty ratio of the phase-shifted PWM signal is minimum, the second sampling time is placed on the falling edge side.
5. A three-phase inverter phase shifting system, wherein the three-phase inverter phase shifting method according to any one of claims 1 to 4 is used, and the three-phase inverter phase shifting system comprises:
a duty ratio information obtaining module configured to obtain duty ratio information of the first PWM signal, the second PWM signal, and the third PWM signal within one PWM period;
a determining module configured to determine a duty ratio relationship among the first PWM signal, the second PWM signal, and the third PWM signal, and to determine whether the first sampling time or the second sampling time is less than a minimum sampling time;
a setting module configured to set, based on the determination result, a middle duty ratio of the first PWM signal, the second PWM signal, and the third PWM signal to be a phase-shifted PWM signal when switching from the non-phase-shift stage to the phase-shift stage, and the PWM signal is always the phase-shifted PWM signal before switching back to the non-phase-shift stage;
a phase shift module configured to, when the first sample time or the second sample time is less than a minimum sample time, phase-shift the phase-shifted PWM signal such that the first sample time or the second sample time is greater than or equal to the minimum sample time;
if the phase-shifting stage is yes, the phase-shifting PWM signal is subjected to phase-shifting processing so that the first sampling time or the second sampling time is greater than or equal to the minimum sampling time, and the non-phase-shifting stage is not subjected to any processing.
6. The phase shifting system of claim 5, wherein the phase shifting module performs phase shifting on the phase-shifted PWM signal comprises:
and performing left phase shift or right phase shift on the phase-shifted PWM signal.
7. The phase shifting system of claim 6, wherein the phase shifting module is configured to shift the phase of the phase-shifted PWM signal to the right when the first sampling time is smaller than the minimum sampling time, so that the first sampling time is greater than or equal to the minimum sampling time, and during the phase shifting of the phase-shifted PWM signal to the right, for the first sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the first sampling time is set on the side of the rising edge, and when the duty ratio of the phase-shifted PWM signal is maximum, the first sampling time is set on the side of the falling edge.
8. The phase shifting system for three-phase inverter of claim 7, wherein the phase shifting module is further configured to, when the second sampling time is less than the minimum sampling time, shift the phase of the phase-shifted PWM signal to the left such that the second sampling time is greater than or equal to the minimum sampling time, and during the shift of the phase-shifted PWM signal to the left,
for a second sampling time, when the duty ratio of the phase-shifted PWM signal is centered, the second sampling time is placed on one side of a rising edge, and when the duty ratio of the phase-shifted PWM signal is minimum, the second sampling time is placed on one side of a falling edge.
9. A readable storage medium, on which a computer program is stored, which, when being executed by a processor, is able to carry out the three-phase inverter phase shifting method according to any one of claims 1 to 4.
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