CN111313919B - Multifunctional receiver - Google Patents
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- CN111313919B CN111313919B CN202010088966.0A CN202010088966A CN111313919B CN 111313919 B CN111313919 B CN 111313919B CN 202010088966 A CN202010088966 A CN 202010088966A CN 111313919 B CN111313919 B CN 111313919B
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Abstract
The invention relates to the technical field of communication, and discloses a multifunctional receiver which can be used as a normal signal receiver access and can be multiplexed as a monitoring receiver to correct the transmitting power and key performance of a transmitter. The system comprises a first switch, a second switch, a transmitting link and a receiving link. The switch disconnects and closes the attenuation/amplification module, the low-noise amplifier is opened, and the receiving link is in a normal receiving mode. The switch closes and opens the attenuation/amplification module, the low noise amplifier is closed, and the receiving link is in a monitoring receiver mode; the receiving link receives the signal transmitted by the transmitting link, attenuates/amplifies the signal and sends the signal to the digital power detection module, the digital power detection module calculates the signal power and generates a corresponding feedback value to the digital gain control module of the transmitting link according to the calculation result, and the digital gain control module adjusts the transmitting power according to the feedback value.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a multifunctional receiver.
Background
Radio Frequency (RF) transmitters need to meet industry standards for compatibility with other devices to facilitate desired communication and avoid undesirable interference. To ensure its compatibility, industry standards typically include provisions for transmitter power levels.
At present, the transmission power of a transmitter of the same radio frequency chip can have large changes due to the deviation of a manufacturing process, the transmission power must be detected and calibrated in order to meet the industry standard, an existing calibration circuit is mostly an independent calibration module, the structural complexity of calibration precision, calibration range and the calibration module is compromised, and the structural complexity can increase the design cost and area.
Therefore, how to improve the calibration accuracy, the dynamic range and the simple structure of the transmit power calibration circuit becomes a technical problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a multifunctional receiver with high calibration accuracy, high dynamic range and simple structure, aiming at the above-mentioned defect of compromise between calibration accuracy, calibration range and calibration module structure complexity in the prior art.
The technical scheme adopted by the invention for solving the technical problems is as follows: constructing a multifunctional receiver comprising:
the transmitting link comprises a digital gain control module for adjusting signal transmitting power, a transmitting signal processing module, a preamplifier, a power amplifier, a power divider and a transmitting antenna;
the signal input end of the preamplifier is coupled to the signal output end of the digital gain control module through the transmitting signal processing module and is used for receiving and amplifying an external signal subjected to gain control by the digital gain control module;
the signal input end of the power amplifier is connected with the signal output end of the preamplifier;
the signal input end of the power divider is coupled to the signal output end of the power amplifier;
the signal input end of the transmitting antenna is coupled with the signal output end of the power divider;
a receiving chain circuit which comprises a digital power detection module, an attenuation/amplification module, a receiving signal processing module, a first low noise amplification and receiving antenna,
the signal input end of the digital power detection module is connected with the signal output end of the first low-noise amplifier through the received signal processing module;
the signal output end of the attenuation/amplification module is coupled to the output end of the first low-noise amplifier; and
at least one switch including a first switch and a second switch,
one end of the first switch is connected with the signal output end of the preamplifier, and the other end of the first switch is coupled to the signal input end of the attenuation/amplification module;
one end of the second switch is connected with a signal output end of the power divider, and the other end of the second switch is coupled to a signal input end of the attenuation/amplification module;
when the circuit is in a normal receiving mode, the first switch, the second switch and the attenuation/amplification module are switched off, and the receiving antenna is used for receiving carrier signals transmitted by other mechanism frames;
when the circuit is in a monitoring receiver mode, closing the first switch or the second switch and opening the attenuation/amplification module so that the digital gain control module outputs signal power to the attenuation/amplification module, wherein the signal power is attenuated by the attenuation/amplification module and then is output to the digital power detection module; the digital power detection module processes the signal power and feeds the signal power back to the digital gain control module, and the digital gain control module adjusts the transmitting power according to the feedback value.
In some embodiments, the first switch and the second switch are used to control the signal power output or turn off.
In some embodiments, the attenuation/amplification module includes an R-2R network, a multiplexer, and a second low noise amplifier,
the signal input end of the R-2R network is respectively connected with the other ends of the first switch and the second switch in common and is used for attenuating the signal power input by the first switch and the second switch;
the signal input end of the multiplexer is coupled with the signal output end of the R-2R network;
the signal input end of the second low noise amplifier is coupled to the signal output end of the multiplexer.
In some embodiments, the R-2R network includes a first voltage divider, a second voltage divider, a third voltage divider, and a fourth voltage divider,
the first voltage divider, the second voltage divider, the third voltage divider and the fourth voltage divider are connected in parallel and are used for attenuating the signal power;
after being attenuated by the voltage divider, the signal power is respectively input to the multiplexers.
In some embodiments, the first voltage divider includes a first resistor,
the second voltage divider comprises a second resistor and a third resistor,
the third voltage divider comprises a fourth resistor and a fifth resistor,
the fourth voltage divider comprises a sixth resistor and a seventh resistor,
one end of the first switch and one end of the second switch are respectively and jointly connected with one end of the first resistor, one end of the second resistor and the first signal input end of the multiplexer;
the second resistor, the fourth resistor and the sixth resistor are connected in sequence;
one end of the second resistor is respectively connected with one end of the third resistor and the second signal input end of the multiplexer;
one end of the fourth resistor is connected with one end of the fifth resistor and the third signal input end of the multiplexer respectively;
one end of the sixth resistor is connected with one end of the seventh resistor and the fourth signal input end of the multiplexer.
In some embodiments, the third resistor, the fifth resistor, and the seventh resistor may be set to fixed value resistors or adjustable resistors.
In some embodiments, the received signal processing module further comprises a down-mixer, a down-filter, and an analog-to-digital converter,
the signal input end of the down mixer is coupled with the signal output end of the first low-noise amplifier;
the signal input end of the lower filter is coupled to the signal output end of the lower mixer;
the signal input end of the analog-to-digital converter is coupled with the signal output end of the lower filter;
and the signal output end of the analog-to-digital converter is connected with the signal input end of the digital power detection module.
In some embodiments, the transmit signal processing module further comprises a digital-to-analog converter, an up-filter, and an up-mixer,
the signal input end of the digital-to-analog converter is coupled with the signal output end of the digital gain control module;
the signal input end of the upper filter is coupled with the signal output end of the digital-to-analog converter;
and the signal input end of the upper frequency mixer is connected with the signal output end of the upper filter.
In some embodiments, the transmit chain and the receive chain use the same carrier frequency.
In some embodiments, the power divider, the transmitting antenna, and the receiving antenna are provided as off-chip independent devices.
In the multifunctional receiver, an integrated radio frequency transceiving integrated circuit is arranged, when the circuit is in a receiver monitoring mode, a switch is closed, and an attenuation/amplification module is opened, so that a digital gain control module outputs signal power to the attenuation/amplification module, and the signal power is attenuated by the attenuation/amplification module and then is output to a digital power detection module; the digital power detection module processes the signal power and feeds the signal power back to the digital gain control module, and the digital gain control module adjusts the transmitting power according to the feedback value. The technical scheme can effectively solve the problems that an independent calibration module is needed in the prior art, and the calibration precision, the calibration range and the calibration module structure complexity are compromised and the structure is complex.
The scheme can multiplex most receiver links on the basis of the existing signal channel receiver to be used as monitoring links for transmitting signals, can be used for factory calibration and startup calibration, can be used for real-time calibration of transmitter links in a TDD mode, and has the characteristics of high precision, high dynamic range, simple structure, low cost and the like.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a schematic block diagram of an embodiment of a receiver of the present invention providing multiple functions;
fig. 2 is a schematic structural diagram of an embodiment of an attenuation/amplification module provided in the present invention.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic block diagram of an embodiment of a receiver of the present invention providing multiple functions; fig. 2 is a schematic structural diagram of an embodiment of an attenuation/amplification module provided in the present invention. As shown in fig. 1 and fig. 2, in the first embodiment of the multifunctional receiver of the present invention, the multifunctional receiver mainly includes a transmitting link 100, a receiving link 200, and at least one switch (S1, S2).
When the transmission link 100 transmits information, it modulates transmission baseband information (external signal) processed by the logic circuit into a transmission intermediate frequency signal, converts the transmission intermediate frequency signal into a high frequency signal by a transmission voltage-controlled oscillator, and converts the high frequency signal into electromagnetic waves to be radiated by a transmission antenna after amplification.
When the receiving link 200 receives information, the receiving antenna converts electromagnetic waves transmitted from the base station into weak alternating current signals, and after filtering and high-frequency amplification, the signals are sent to a demodulator for demodulation to obtain receiving baseband information, and then the receiving baseband information is sent to a logic audio circuit for further processing.
The transmission link 100 includes a digital gain control module 101, a transmission signal processing module, a preamplifier 105, a power amplifier 106, a power divider 107, and a transmission antenna;
the digital gain control module 101 is used for adjusting the signal transmission power and further adjusting the strength of the external signal to ensure that the output is still stable under the condition that the power of the input signal changes greatly, so that the gain of each variable gain module in the receiver can be adjusted to achieve the effect of stable output.
The preamplifier 105 is provided with at least one gain control for controlling and amplifying the signal output by the digital gain control module 101, thereby improving the spectral purity of the amplifier output signal and reducing adjacent channel interference.
The power amplifier 106 is used to amplify the power of the output signal.
The power divider 107 has the function of dividing one input signal energy into two or more paths of equal or unequal energy.
The transmitting antenna is used for performing a transmitting operation on the signal subjected to the gain control by the digital gain control module 101, and specifically, the transmitting antenna receives the modulated high-frequency oscillation current (or the high-frequency signal) generated by the transmitting link 100 and converts the high-frequency signal or the guided wave into a radio wave to be radiated to the surrounding space.
Specifically, a signal input end of the transmitting antenna is connected to a signal output end of the digital gain control module 101 through a line, and is configured to receive and transmit the carrier signal modulated by the transmitting link 100.
Specifically, the signal input terminal of the preamplifier 105 is connected to the signal output terminal of the digital gain control module 101 through the transmission signal processing module, and is configured to receive and amplify the signal power (external signal) output after being gain-controlled by the digital gain control module 101.
The signal input end of the power amplifier 106 is connected to the signal output end of the preamplifier 105, and the signal output end of the power amplifier 106 is coupled to the signal input end of the power divider 107, amplifies the radio frequency signal, outputs the amplified radio frequency signal to the power divider 107, and loads the amplified radio frequency signal to a transmitting antenna through the power divider 107 to be transmitted.
The receiving chain 200 includes a receiving antenna, a first low noise amplifier 201, an attenuation/amplification module 202, a receiving signal processing module, and a digital power detection module 206.
The receiving antenna is used for receiving carrier wave signals (electromagnetic wave signals) transmitted by other mechanism frames and converting the electromagnetic wave signals into high-frequency current.
The first low noise amplifier 201 may amplify an input analog signal for processing by a circuit of a subsequent stage.
The attenuator in the attenuation/amplification module 202 has the functions of adjusting the magnitude of the input signal, obtaining the attenuation value of the network under test, and improving impedance matching.
The amplifying module in the attenuating/amplifying module 202 is used for amplifying the signal processed by the attenuator, and can control the signal to be in a low noise and low distortion state while amplifying the signal.
The digital power detection module 206 is configured to receive the signal power (or the high-frequency signal) fed back by the attenuation/amplification module 202 through the received signal processing module, and perform gain calculation on the high-frequency signal in a digital domain.
Specifically, the signal input terminal of the first low noise amplifier 201 is coupled to the signal input terminal of the receiving antenna, and is configured to receive the high frequency signal input by the receiving antenna, amplify the high frequency signal, and output the amplified high frequency signal to the digital power detecting module 206 (in the normal receiving mode) through the receiving signal processing module.
The signal input end of the digital power detection module 206 is connected to the signal output end of the attenuation/amplification module 202 through the line received signal processing module, and is configured to receive the signal power attenuated/amplified by the attenuation/amplification module 202, and feed back the signal power to the digital gain control module 101 (when serving as a monitoring receiver).
The switches are respectively provided as a first switch S1 and a second switch S2, which are used to control (i.e., open or close) the signal power of the input attenuating/amplifying module 202.
The first switch S1 and the second switch S2 are respectively disposed at different nodes in the transmission chain 100 to obtain signal powers (or sampling frequencies) output by the different nodes.
Specifically, one end of the first switch S1 is connected to the signal output end of the preamplifier 105, and the other end of the first switch S1 is coupled to the signal input end of the attenuation/amplification module 202, so as to control the signal power output by the preamplifier 105 through the open or closed state of the first switch S1.
One end of the second switch S2 is connected to a signal output end of the power divider 107, and the other end of the second switch S2 is coupled to the signal input end of the attenuation/amplification module 202, so as to control the signal power output by the power divider 107 through the open or close state of the second switch S2.
When the circuit is in the normal receiving mode (i.e. the receiving antenna is in the receiving mode for receiving the carrier signal transmitted by the transmitting antenna of the other chassis), the switch (S1, S2) and the attenuation/amplification module 202 are simultaneously turned off, and the receiving antenna receives the carrier signal transmitted by the transmitting antenna.
When the circuit is in the listening receiver mode, the switches (S1, S2) should be closed and the attenuation/amplification module 202 should be opened, so that the signal power output by the digital gain control module 101 is input to the attenuation/amplification module 202 after passing through the switches (S1, S2).
One of the first switch S1 and the second switch S2 is guaranteed to be in a closed state and the attenuation/amplification module 202 is turned on.
One end of the first switch S1 and one end of the second switch S2 are connected to different nodes of the transmission link 100, so that the frequency strength of the signal power (sampling frequency) flowing through the first switch S1 or the second switch S2 is not consistent, the gain variation of the power amplifier can be calibrated together through the first switch S1 and the second switch S2, and the on-chip loopback calibration can be directly performed, so that the cost of the board level is reduced, and the application is flexible.
The signal power (or sampling frequency) of different nodes is attenuated/amplified by the attenuation/amplification module 202 via the first switch S1 and the second switch S2, and then output to the digital power detection module 206.
The digital power detection module 206 performs gain calculation on the input signal power in a digital domain, and then feeds back the processed signal power (digital signal) to the digital gain control module 101, and the digital gain control module 101 adjusts the transmission power according to the feedback value.
For example, when the chip operates in a TDD (time division duplex) mode or calibrates an ATE (automatic test equipment) chip, the signal power generated by the digital gain control module 101 enters a voltage controlled oscillator for modulation after digital-to-analog conversion, filtering, up-mixer and amplification adjustment.
The signal power is input to the attenuation/amplification module 202 through the switch (S1, S2) for processing, the low-frequency signal obtained after frequency discrimination is received, a part of the low-frequency signal is amplified by the low-noise amplifier and then sent to the down-mixer and the filter for filtering and shaping, the low-frequency signal is input to the digital power detection module 206, the digital power detection module 206 performs gain calculation in a digital domain and then feeds back the gain calculation to the digital gain control module 101, the digital gain control module 101 compares a feedback value with a preset value, and the digital gain control module 101 can control the transmission power to be adjusted and output according to the feedback value according to the comparison result. That is, if the input digital signal is within the range of the preset value, the transmission power does not need to be adjusted; if the input digital signal is not within the range of the preset value, the digital gain control module 101 adjusts according to the feedback value, and further performs factory calibration, startup calibration and real-time calibration on the transmitter link.
By using the technical scheme, the problems that an independent calibration module is needed in the prior art, the calibration precision, the calibration range and the calibration module structure complexity are compromised, and the structure is complex can be effectively solved. According to the scheme, most of the receiver links 200 can be reused on the basis of the existing signal channel receiver to serve as monitoring links for transmitting signals, and in the mode, the method can be used for factory calibration and startup calibration; on the other hand, the method can be used for real-time correction of a transmitter link in a TDD (time division duplex) mode, and has the characteristics of high precision, high dynamic range, simple structure, low cost and the like.
It should be noted that the same carrier frequency is used for the transmission chain 100 and the reception chain 200.
In some embodiments, to increase the acceptable input signal range of the attenuation/amplification module 202, an R-2R network 202a, a multiplexer 202b, and a second low noise amplifier 202c may be provided in the attenuation/amplification module 202.
The R-2R network 202a is used to attenuate the signal power (sampling frequency) input through the first switch S1 and the second switch S2.
The multiplexer 202b can select a signal from a plurality of input analog signals and forward the selected signal, and output different selected signals to the same output line.
The second low noise amplifier 202c is used to amplify the analog signal inputted by the multiplexer 202b for processing by the circuit of the subsequent stage.
Specifically, the signal input terminal of the R-2R network 202a is commonly connected to the other ends of the first switch S1 and the second switch S2, respectively, and is configured to attenuate the signal power input through the first switch S1 and the second switch S2, and divide the signal power into a plurality of analog signals to be output to the multiplexer 202 b.
The signal input terminal of the multiplexer 202b is connected to the signal output terminal of the R-2R network 202a, and is configured to receive a plurality of signal powers output by the R-2R network 202a, and output the signal powers to the second low noise amplifier 202c after processing.
The signal input terminal of the second low noise amplifier 202c is coupled to the signal output terminal of the multiplexer 202b, and is used for receiving and amplifying the signal power inputted by the multiplexer 202b, and outputting the signal power to the next stage (into the down mixer 203).
In some embodiments, to obtain multiple analog signals, a first voltage divider a1, a second voltage divider a2, a third voltage divider A3, and a fourth voltage divider a4 may be provided in the R-2R network 202 a.
The first voltage divider a1, the second voltage divider a2, the third voltage divider A3 and the fourth voltage divider a4 are connected in parallel, the voltage dividers connected in parallel are used for attenuating signal power, and the signal power attenuated by the voltage dividers (a 1-a 4) is respectively input to the multiplexer 202 b.
In some embodiments, in order to improve the accuracy of the input signal, a first resistor R1 may be provided in the first voltage divider a1, a second resistor R2 and a third resistor R3 may be provided in the second voltage divider a2, a fourth resistor R4 and a fifth resistor R5 may be provided in the third voltage divider A3, and a sixth resistor R6 and a seventh resistor R7 may be provided in the fourth voltage divider a 4.
The second resistor R2, the fourth resistor R4 and the sixth resistor R6 are connected in series, and the resistance values thereof are set according to specific circuit requirements. In the present embodiment, the resistances of the second resistor R2, the fourth resistor R4 and the sixth resistor R6 are all 50 ohms.
Specifically, one end of the first switch S1 and one end of the second switch S2 are respectively connected to one end of the first resistor R1 and the second resistor R2, and the first signal input end (corresponding to b1) of the multiplexer 202b, that is, the signal power input through the first switch S1 and the second switch S2 is divided into two paths for output, and one path is attenuated by the first voltage divider a1 and then input to the first signal input end (corresponding to b1) of the multiplexer 202 b; the other input is the second voltage divider a 2.
One end of the second resistor R2 is connected to one end of the third resistor R3 and a second signal input end (corresponding to b2, not shown in the figure) of the multiplexer 202b, respectively, the input signal power is divided into two paths to be output through the second voltage divider a2, and one path is attenuated by the second voltage divider a2 and then input to the second signal input end of the multiplexer 202 b; the other input is the third voltage divider a 3.
Furthermore, one end of the fourth resistor R4 is connected to one end of the fifth resistor R5 and a third signal input end (corresponding to b3, not shown in the figure) of the multiplexer 202b, respectively, the input signal power is divided into two paths to be output through the third voltage divider A3, and one path is attenuated by the third voltage divider A3 and then input to the third signal input end of the multiplexer 202 b; the other input is to a fourth voltage divider a 4.
One end of the sixth resistor R6 is connected to one end of the seventh resistor R7 and the fourth signal input end (corresponding to b4) of the multiplexer 202b, and the input signal power is processed by the fourth voltage divider a4 and then output to the fourth signal input end of the multiplexer 202 b.
For example, when the input signal power is Ui, the frequency or power strength of the signal power Ui decreases step by step after each path of voltage divider of the signal power Ui, and a larger input signal range can be obtained after the processing of the voltage divider (a 1-a 4). Through the attenuation of the R-2R in the chip, the circuit structure is simple and easy to realize, and the on-chip matching can be directly realized, so that the cost of an off-chip matching device is reduced.
Of course, the third resistor R3, the fifth resistor R5, and the seventh resistor R7 may be set as adjustable resistors, and by adjusting the resistance values of the adjustable resistors, a more flexible signal range may be obtained.
In some embodiments, to ensure the accuracy of the signal power data, the received signal processing module may include a down mixer 203, a down filter 204, and an analog-to-digital converter 205.
Specifically, the signal input terminal of the first low noise amplifier 201 is coupled to one terminal of the receiving antenna, and is used for processing the high frequency signal input by the receiving antenna, amplifying the high frequency signal without distortion, and outputting the amplified high frequency signal to the down mixer 203.
The signal input terminal of the down mixer 203 is coupled to the signal output terminal of the first low noise amplifier 201, which is used to ensure that the receiver obtains a high sensitivity, so that the receiver has a sufficient amplification amount and a proper passband.
That is, the down mixer 203 converts the high frequency signal into an intermediate frequency signal, and outputs the intermediate frequency signal to the down filter 204.
The signal input terminal of the lower filter 204 is coupled to the signal output terminal of the lower mixer 203, and is used for passing a specific frequency component of the intermediate frequency signal, and greatly attenuating other frequency components, so as to effectively filter the interference noise.
A signal input terminal of the analog-to-digital converter 205 and a signal output terminal of the lower filter 204 are configured to convert an input analog signal into a digital signal and output the digital signal to the digital power detection module 206.
In some embodiments, the received signal processing module includes a digital-to-analog converter 102, an upper filter 103, and an upper mixer 104.
Specifically, a signal input end of the digital-to-analog converter 102 is coupled to a signal output end of the digital gain control module 101, and is configured to receive a signal power of the digital gain control module 101 and convert the signal power into an analog signal.
The signal input terminal of the upper filter 103 is connected to the signal output terminal of the digital-to-analog converter 102, and is configured to process the analog signal output by the digital-to-analog converter 102.
The signal input of the upper mixer 104 is connected to the signal output of the upper filter 103 for receiving and processing the analog signal (signal power), i.e. converting the analog signal of low frequency to the analog signal of intermediate frequency.
It should be noted that the power amplifier 106 may be implemented on-chip, and the power divider 107, the transmitting antenna and the receiving antenna may be implemented as independent devices off-chip.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A multifunctional receiver, comprising:
the transmitting link comprises a digital gain control module for adjusting signal transmitting power, a transmitting signal processing module, a preamplifier, a power amplifier, a power divider and a transmitting antenna;
the signal input end of the preamplifier is coupled to the signal output end of the digital gain control module through the transmitting signal processing module and is used for receiving and amplifying an external signal subjected to gain control by the digital gain control module;
the signal input end of the power amplifier is connected with the signal output end of the preamplifier;
the signal input end of the power divider is coupled to the signal output end of the power amplifier;
the signal input end of the transmitting antenna is coupled with the signal output end of the power divider;
a receiving chain circuit which comprises a digital power detection module, an attenuation/amplification module, a receiving signal processing module, a first low noise amplification and receiving antenna,
the signal input end of the digital power detection module is connected with the signal output end of the first low-noise amplifier through the received signal processing module;
the signal output end of the attenuation/amplification module is coupled to the output end of the first low-noise amplifier; the attenuator in the attenuation/amplification module has the functions of adjusting the size of an input signal, acquiring an attenuation value of a network to be tested and improving impedance matching, and the amplification module in the attenuation/amplification module is used for amplifying a signal processed by the attenuator and controlling the signal in a low-noise and small-distortion state while amplifying the signal; and
at least one switch including a first switch and a second switch,
one end of the first switch is connected with the signal output end of the preamplifier, and the other end of the first switch is coupled to the signal input end of the attenuation/amplification module;
one end of the second switch is connected with a signal output end of the power divider, and the other end of the second switch is coupled to a signal input end of the attenuation/amplification module;
when the circuit is in a normal receiving mode, the first switch, the second switch and the attenuation/amplification module are switched off, and the receiving antenna is used for receiving carrier signals transmitted by other mechanism frames;
when the circuit is in a monitoring receiver mode, closing the first switch or the second switch and opening the attenuation/amplification module so that the digital gain control module outputs signal power to the attenuation/amplification module, wherein the signal power is attenuated by the attenuation/amplification module and then is output to the digital power detection module; the digital power detection module processes the signal power and feeds the signal power back to the digital gain control module, and the digital gain control module adjusts the transmitting power according to the feedback value;
when the first switch is closed, the on-chip loopback calibration is directly carried out; when the second switch is closed, the gain variation of the power amplifier is calibrated off-chip together.
2. The multifunctional receiver of claim 1,
the first switch and the second switch are used for controlling the signal power output or cut off.
3. The multifunctional receiver of claim 1,
the attenuation/amplification module comprises an R-2R network, a multiplexer and a second low-noise amplifier,
the signal input end of the R-2R network is respectively connected with the other ends of the first switch and the second switch in common and is used for attenuating the signal power input by the first switch and the second switch;
the signal input end of the multiplexer is coupled with the signal output end of the R-2R network;
the signal input end of the second low noise amplifier is coupled to the signal output end of the multiplexer.
4. The multifunctional receiver of claim 3,
the R-2R network includes a first voltage divider, a second voltage divider, a third voltage divider, and a fourth voltage divider,
the first voltage divider, the second voltage divider, the third voltage divider and the fourth voltage divider are connected in parallel and are used for attenuating the signal power;
after being attenuated by the voltage divider, the signal power is respectively input to the multiplexers.
5. The multifunctional receiver of claim 4,
the first voltage divider includes a first resistor,
the second voltage divider comprises a second resistor and a third resistor,
the third voltage divider comprises a fourth resistor and a fifth resistor,
the fourth voltage divider comprises a sixth resistor and a seventh resistor,
one end of the first switch and one end of the second switch are respectively and jointly connected with one end of the first resistor, one end of the second resistor and the first signal input end of the multiplexer;
the second resistor, the fourth resistor and the sixth resistor are connected in sequence;
one end of the second resistor is respectively connected with one end of the third resistor and the second signal input end of the multiplexer;
one end of the fourth resistor is connected with one end of the fifth resistor and the third signal input end of the multiplexer respectively;
one end of the sixth resistor is connected with one end of the seventh resistor and the fourth signal input end of the multiplexer.
6. The multifunctional receiver of claim 5,
the third resistor, the fifth resistor and the seventh resistor may be set to fixed value resistors or adjustable resistors.
7. The multifunctional receiver of claim 1,
the receiving signal processing module comprises a down mixer, a down filter and an analog-to-digital converter,
the signal input end of the down mixer is coupled with the signal output end of the first low-noise amplifier;
the signal input end of the lower filter is coupled to the signal output end of the lower mixer;
the signal input end of the analog-to-digital converter is coupled with the signal output end of the lower filter;
and the signal output end of the analog-to-digital converter is connected with the signal input end of the digital power detection module.
8. The multifunctional receiver of claim 1,
the transmitting signal processing module comprises a digital-to-analog converter, an upper filter and an upper mixer,
the signal input end of the digital-to-analog converter is coupled with the signal output end of the digital gain control module;
the signal input end of the upper filter is coupled with the signal output end of the digital-to-analog converter;
and the signal input end of the upper frequency mixer is connected with the signal output end of the upper filter.
9. The multifunctional receiver of claim 1,
the transmit chain and the receive chain use the same carrier frequency.
10. The multifunctional receiver of claim 9,
the power divider, the transmitting antenna and the receiving antenna are independent devices outside the chip.
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| CN101207366A (en) * | 2007-12-17 | 2008-06-25 | 华为技术有限公司 | High efficiency power amplifier |
| CN103166669A (en) * | 2011-12-14 | 2013-06-19 | 美国频顺通讯科技公司 | Cost-effective linearization for wireless communication |
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| CN101207366A (en) * | 2007-12-17 | 2008-06-25 | 华为技术有限公司 | High efficiency power amplifier |
| CN103166669A (en) * | 2011-12-14 | 2013-06-19 | 美国频顺通讯科技公司 | Cost-effective linearization for wireless communication |
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