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CN111274015A - Configuration method and device and data processing server - Google Patents

Configuration method and device and data processing server Download PDF

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Publication number
CN111274015A
CN111274015A CN202010061360.8A CN202010061360A CN111274015A CN 111274015 A CN111274015 A CN 111274015A CN 202010061360 A CN202010061360 A CN 202010061360A CN 111274015 A CN111274015 A CN 111274015A
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China
Prior art keywords
processor cores
data processing
threads
thread
operating system
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CN202010061360.8A
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Chinese (zh)
Inventor
单卫华
李嘉
熊林
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Huawei Cloud Computing Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN202010061360.8A priority Critical patent/CN111274015A/en
Publication of CN111274015A publication Critical patent/CN111274015A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5038Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the execution order of a plurality of tasks, e.g. taking priority or time dependency constraints into consideration
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • G06F9/45558Hypervisor-specific management and integration aspects
    • G06F2009/4557Distribution of virtual machine instances; Migration and load balancing
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/5018Thread allocation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/5021Priority

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)

Abstract

The invention provides a configuration method, which is applied to a data processing server comprising K processor cores and comprises the following steps: creating a management thread for the data processing process; selecting N processor cores from the K processor cores, and binding the management thread of the data processing process with the N processor cores; creating L working threads for the data processing process; and selecting L processor cores from the K processor cores, and binding L working threads of the data processing process and the L processor cores in a one-to-one mode. Correspondingly, the embodiment of the application also discloses a configuration device and a data processing server. The invention can reduce the time delay of data processing.

Description

Configuration method and device and data processing server
Technical Field
The present invention relates to the field of data processing, and in particular, to a configuration method and apparatus, and a data processing server.
Background
With the development of internet services and technologies, data explosion-type growth is brought, so that a big data processing industry is promoted, and big data processing generally meets 4 characteristics: scale, diversity, high speed and value. However, under the wave of mobile internet and internet of things, the data scale and generation speed are increased unprecedentedly, higher requirements are put on big data processing, and fast data processing appears. Fast data processing has stringent requirements in terms of latency and amount of concurrency, such as: in the financial field, small jitter in time delay may cause the anti-fraud detection to time out, thereby allowing fraudulent transactions to pass through, resulting in economic losses.
In the current industry, a part of fast data real-time Processing platforms solve the problem of time delay by deploying a multi-core processor and a large memory, but the effective utilization rate of a Central Processing Unit (CPU) is insufficient, the increase of the concurrency quantity also has a great influence on the time delay index, the advantages of the multi-core processor and the large memory of the server are not efficiently exerted, and the problem that the concurrency quantity influences the time delay index is not well solved.
Disclosure of Invention
The embodiment of the invention discloses a configuration method, a configuration device and a data processing server, which can reduce the time delay of data processing.
In a first aspect, the present application provides a configuration method, where a data processing server is configured to process data in real time, the data processing server has K processor cores, and K is an integer greater than 1. The operating system is configured to manage the number of processor cores monopolized by the threads to be N, wherein N is smaller than K and is an integer larger than 0; the operating system is configured to set the number of processor cores monopolized by the working threads to be L, wherein L is smaller than K and is an integer larger than 0. After the operating system is started, a data processing process may be created, which is an entity that executes a program of data processing tasks. After the data processing process is created, the operating system may create one or more management threads. The operating system selects N unbound processor cores from the K processor cores, binds the management thread of the data processing process with the selected N processors, the management thread and the N processor cores can be exclusively operated on the N processor cores after being bound, and other threads are not allowed to be operated on the N processor cores; the binding method can be as follows: after the management thread is created, the operating system allocates a thread id to the management thread, each processor core in the K processor cores is pre-allocated with a sequence number, for example, the sequence numbers are numbered from 0, the operating system acquires the thread id of the created management thread and the sequence numbers of the selected N processor cores, and binds the thread id of the management thread and the sequence numbers of the N processor cores. The operating system creates L working threads of the data processing process, selects L unbound processor cores from the K processor cores, binds the L working threads with the L processor cores, binds the 1 working thread with the 1 processing core, and each working thread exclusively runs on one bound processor core. The management thread is used for executing management and scheduling functions and carrying out data interaction with external equipment; for example: and receiving, sending and scheduling the service data or the execution codes, wherein the work threads are arranged in the execution codes or process the service data. The working threads are used for executing data processing tasks, the business data are processed according to the execution codes, and the L working threads can be executed in parallel.
In the embodiment, the number of the management threads of the data processing process and the number of the processing cores of the working threads are configured, and the management threads are bound to the processor cores with the preset number after the management threads are created, so that the management threads are exclusively run on the specified processor cores; after creating the worker threads, the worker threads are bound to an equal number of processor cores, with each worker thread monopolizing one processor core. Therefore, task waiting caused by the fact that a plurality of working threads compete for the CPU time slices can be avoided, a single processor core is occupied by a single working thread, the CPU time slices do not need to be shared with other working threads, and time delay of data processing is effectively reduced.
With reference to the first aspect, in a first possible implementation manner, before configuring the number of processor cores for managing threads to be N, the method further includes: the operating system is configured to be used for the operating system, the number of processor cores is M, M is smaller than K, and M is an integer larger than 0, then M unbound processor cores are selected from the K processor cores, and the operating system is enabled to run on the selected M processor cores. The binding method of the operating system and the M processor cores comprises two methods: 1. after configuring the number of processor cores for the operating system to be M, the operating system stores a configuration file including number information M in a non-volatile memory, for example: storing the configuration file in a mechanical disk or a solid state disk, executing a restart operation, triggering a BIOS to read the configuration file after the restart, selecting M processor cores from K processor cores according to quantity information M in the configuration file, and running an operating system on the M processor cores. 2. The operating system runs on one or more processor cores currently, the operating system selects M processor cores from the K processor cores after the number M of the processor cores used for the operating system is configured, and the operating system is migrated to the selected M processor cores from the one or more processor cores currently running. It should be noted that, except that the operating system needs to be bound to the M processor cores, other processes running in the process space except the data processing process need to be bound to the M processor cores. In the above embodiment, the operating system exclusively runs on the selected M processor cores, so that the waiting of the data processing task caused by the operating system preempting the CPU time slice of the working thread is avoided, and the time delay of data processing is further reduced.
With reference to the first aspect or the first possible implementation manner of the first aspect, in a second possible implementation manner, a Virtual Machine Monitor (VMM) selects K processor cores from a physical resource pool of a data processing server, allocates the K processor cores to Virtual machines, generates K Virtual processor cores in the Virtual machines, and performs one-to-one mapping between the K processor cores and the processor cores of the K Virtual machines by the VMM, where the Virtual machines including the K Virtual processor cores run operating systems.
According to the embodiment, the data processing is carried out in a mode of deploying the virtual machine on the data processing server, and the utilization rate of physical resources in the data processing server can be improved.
With reference to the first aspect or the first possible implementation manner of the first aspect, in a third possible implementation manner, the operating system obtains an interrupt number of the interrupt request and sequence numbers of the selected N processor cores, associates the sequence numbers of the N processor cores with the interrupt number of the interrupt request, and generates interrupt mapping information. After the above-mentioned interrupt binding is performed, the processing procedure of the interrupt request is as follows: and the operating system receives the interrupt request, acquires an interrupt number of the interrupt request, inquires N processor cores related to the interrupt request according to the interrupt mapping information, and informs the N processor cores to process the interrupt request. Therefore, all interrupt requests sent by the external equipment are processed by the N processor cores, the working thread does not need to process any interrupt request, the interrupt request is prevented from preempting the CPU time slice of the working thread, and the time delay of data processing is further reduced.
With reference to the second possible implementation manner of the first aspect, in a fourth possible implementation manner, the method further includes: and the operating system configures the scheduling types of the L working threads into real-time scheduling types according to preset scheduling type configuration information. By setting the scheduling type of the working thread as a real-time scheduling type, the working thread can always run on the corresponding processor core, the interruption of a data processing task is avoided, and the processing time delay is reduced.
With reference to any one of the first aspect to the third possible implementation manner of the first aspect, in a fifth possible implementation manner, the operating system sets the priorities of the L worker threads to be the highest priorities according to preset priority configuration information. The processor cores of the working threads are prevented from being preempted by the threads with higher priorities, so that the working threads are always operated on the corresponding processor cores, and the processing time delay of the working threads is reduced.
With reference to the first aspect, in a seventh possible implementation manner, the method further includes:
the management thread receives a new execution code or a service instruction sent by the client, the new execution code or the service instruction is put into the lock-free queue, the L working threads take out an execution code or service data from the lock-free queue for processing in a lock-free competition mode, and the management thread and the working threads communicate in the lock-free queue mode, so that resource competition of each working thread is avoided, and waiting time of the working threads for executing data processing tasks is reduced.
With reference to the first aspect, in an eighth possible implementation manner, the method further includes: the operating system allocates a private memory space for each of the L working threads according to preset memory mapping information, the private memory space is used for storing private data of the working threads, the working threads are prevented from seizing the memory space through a shared-nothing structure, and processing time is reduced.
With reference to the eighth possible implementation manner of the first aspect, in a ninth possible implementation manner, the method further includes: the operating system receives a memory access request sent by a working thread; the operating system judges whether the memory address is located in a private memory space associated with the working thread, if so, the operating system sends the memory access request to the associated private memory space for processing; if not, the operating system sends the memory access request to the shared memory space for processing.
With reference to the eighth or ninth possible implementation manner of the first aspect, in a tenth possible implementation manner, before creating the data processing process, the method further includes: the operating system configures memory mapping information; the memory mapping information indicates that all the working threads of the data processing process are respectively allocated with a private memory space.
A second aspect of the present application provides a configuration apparatus, comprising: a configuration module and a processing module;
the configuration module is used for configuring the number of the processor cores for managing the threads to be N and configuring the number of the processor cores for working threads to be L; wherein N is less than K and is an integer greater than 0, L is less than K and is an integer greater than 0; the processing module is used for creating a management thread for the data processing process, selecting N processor cores from the K processor cores and binding the management thread of the data processing process with the N processor cores; and creating L working threads for the data processing process, selecting L unbound processor cores from the K processor cores, and binding the L working threads of the data processing process and the L processor cores in a one-to-one manner.
In the embodiment, the number of the management threads of the data processing process and the number of the processing cores of the working threads are configured, and the management threads are bound to the processor cores with the preset number after the management threads are created, so that the management threads are exclusively run on the specified processor cores; after creating the worker threads, the worker threads are bound to an equal number of processor cores, with each worker thread monopolizing one processor core. Therefore, task waiting caused by the fact that a plurality of working threads compete for the CPU time slices can be avoided, a single processor core is occupied by a single working thread, the CPU time slices do not need to be shared with other working threads, and time delay of data processing is effectively reduced.
With reference to the second aspect, in a first possible implementation manner, the configuration module is further configured to configure the number of processor cores for the operating system to be M; wherein M is less than K and M is an integer greater than 0;
the processing module is further used for selecting M processor cores from the K processor cores and running an operating system on the M processor cores. In the above embodiment, the operating system exclusively runs on the selected M processor cores, so that the waiting of the data processing task caused by the operating system preempting the CPU time slice of the working thread is avoided, and the time delay of data processing is further reduced.
With reference to the second aspect, in a first possible implementation manner, the operating system runs in a virtual machine, the virtual machine includes processor cores of K virtual machines, and the K virtual processor cores and the K processor cores are in a one-to-one mapping relationship. According to the embodiment, the data processing is carried out in a virtual machine deployment mode, and the utilization rate of physical resources can be improved.
With reference to any one of the second aspect to any one of the second possible implementation manners of the second aspect, in a third possible implementation manner, the configuration module is further configured to associate the N processor cores with the interrupt request and then generate interrupt mapping information; the processing module is also used for receiving an interrupt request; inquiring N processor cores related to the interrupt request according to the interrupt mapping information; the N processor cores are notified to process the interrupt request. By setting the scheduling type of the working thread as a real-time scheduling type, the working thread can always run on the corresponding processor core, the interruption of a data processing task is avoided, and the processing time delay is reduced.
With reference to the second aspect, in a fourth possible implementation manner, the processing module is further configured to set the L work thread scheduling types to be real-time scheduling types according to preset scheduling type configuration information. The working thread can be always operated on the corresponding processor core, the interruption of the data processing task is avoided, and the processing time delay is reduced.
With reference to any one of the second aspect to the fourth possible implementation manner of the second aspect, in a fifth possible implementation manner, the processing module is further configured to set the priority of the L working threads to be the highest priority according to preset priority configuration information. The processor cores of the working threads are prevented from being preempted by the threads with higher priorities, so that the working threads are always operated on the corresponding processor cores, and the processing time delay of the working threads is reduced.
A third aspect of the present application provides a data processing server, including: k processor cores and memories; wherein the K processors call code in the memory for performing the following: configuring the number of processor cores for managing threads to be M; wherein M is less than K and M is an integer greater than 0; selecting M unbound processor cores from the K processor cores; the M processor cores call code in memory for performing the following: an operating system is run.
With reference to the third aspect, in a first possible implementation manner, the M processor cores are further configured to perform:
configuring the number of processor cores for managing threads to be N and configuring the number of processor cores for working threads to be L; wherein N is less than K and is an integer greater than 0, L is less than K and is an integer greater than 0;
the operating system runs exclusively behind the M processors, and the M processor cores are further used for executing:
creating a management thread for the data processing process, selecting N unbound processor cores from the K processor cores, and binding the management thread and the N processor cores;
creating L working threads, selecting unbound L processor cores from the K processor cores, and binding the L working threads and the L processor cores in a one-to-one manner;
after the management thread runs on the N processor cores, the N processor cores call code in the memory for performing the following operations: running a management thread;
after the L worker threads run on the L processor cores, the L processor cores call code in the memory for performing the following operations: and running one work thread bound respectively.
With reference to the third aspect or the first possible implementation manner of the third aspect, in a second possible implementation manner, a virtual machine is deployed in the data processing server, the operating system is installed in the virtual machine, the virtual machine includes K virtual processor cores, and the K virtual processor cores and the K processor cores are in a one-to-one mapping relationship.
With reference to any one of the third aspect to the second possible implementation manner of the third aspect, in a third possible implementation manner, the M processor cores are further configured to perform: associating the N processor cores with the interrupt request to generate interrupt mapping information;
the N processor cores are further configured to perform:
receiving an interrupt request to be processed;
and processing the interrupt request to be processed according to the interrupt mapping information.
With reference to the second possible implementation manner of the third aspect, in a third possible implementation manner, the M processor cores are further configured to perform:
and setting the scheduling types of the L working threads as real-time scheduling types according to preset scheduling type configuration information.
With reference to any one of the third to third possible implementation manners of the third aspect, in a fourth possible implementation manner, the M processor cores are further configured to perform:
and setting the priority of the L working threads as the highest priority according to the preset priority configuration information.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a block diagram of a data processing system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a data processing server according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another data processing server according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of another data processing server according to an embodiment of the present invention;
FIG. 5 is a flow chart illustrating a configuration method according to an embodiment of the present invention;
FIG. 6 is a flow chart illustrating another configuration method according to an embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a configuration device according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another data processing server according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It is to be understood that the terminology used in the embodiments of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. In addition, the terms "first," "second," "third," and "fourth," etc. in the description and claims of the invention and the above-described drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Referring to fig. 1, fig. 1 is a network structure diagram of a data processing system according to an embodiment of the present invention, in the embodiment of the present invention, the data processing system includes a client cluster 10 and a data processing server cluster 11, where the client cluster 10 includes a plurality of clients: client 101, clients 102, … …, client 10n, data service cluster 11 includes a plurality of data processing servers: data processing server 111, data processing server 112, data processing servers 113, … … data processing server 11 n. When a client needs to perform a task of data processing, the client cluster 10 may equally distribute the data processing task to the data processing servers in the data processing server cluster 11 according to a load balancing algorithm. For example: and a certain client side of the n client sides generates data to be processed, the client side performs hash operation on the data to be processed by adopting a hash algorithm to obtain a hash value, the obtained hash value and m are subjected to remainder calculation, m is the number of data processing servers in the data processing server cluster 10, each data processing server in the data processing server cluster 10 is provided with a serial number in advance, the remainder obtained by the remainder calculation is used as the serial number of a target data processing server, and the client side sends the data to be processed to the target data processing server to perform corresponding data processing. The data processing server runs a data processing process, an operating system and other processes except the data processing process, and the data processing process comprises a management thread and a working thread. The data processing server comprises a processor core resource pool, the processor core resource pool comprises a plurality of processor cores, the data processing server performs relevant configuration and binding before data processing, and the configuration and binding process comprises the following steps: the number of processor cores configured for an operating system, the number of processor cores configured for a management thread of a data processing process, and the number of processor cores configured for a worker thread of the data processing process; selecting an unbound processor core from the processor core resource pool according to a preset number, and binding the selected processor core with an operating system, wherein the operating system exclusively runs on the selected processor core; the method comprises the steps that an operating system creates a data processing process, the operating system creates a management thread of the data processing process, the operating system selects an unbound processor core from a processor core resource pool according to a preset number, and binds the selected processor core with the management thread to enable the management thread to run exclusively on the selected processor core; the operating system creates working threads according to the preset quantity, selects unbound processor cores from the processor core resource pool according to the preset quantity, binds the selected processor cores with the created working threads, and binds one processor core to each working thread.
In the present application, the data processing server includes three architectures, which are a bare machine architecture, a virtual machine architecture and a container architecture.
Referring to fig. 2, fig. 2 is a data processing server of bare metal architecture, the data processing server 2 includes a processor core resource pool 22, the processor core resource pool 22 includes K processor cores, the data processing server 2 configures the number of processor cores for an operating system to be M, the number of processor cores configured for managing threads to be N, and the number of processor cores configured for working threads to be L, where the configuration method may be: the operating system performs the configuration process described above after booting. After configuration is completed, binding of the operating system and the processor core may be: the operating system can select M unbound processor cores from the K processor cores, and the operating system migrates one or more currently running processor cores to the selected M processor cores; or after the configuration of the operating system is completed, executing a restarting operation, and in the restarting process, reading a configuration file stored in a nonvolatile memory by the BIOS, wherein the configuration file comprises the number of processor cores used for the operating system, selecting M processor cores from the K processor cores by the BIOS, and running the operating system on the selected M processor cores. After the operating system runs exclusively on M processor cores, the operating system creates the data processing process 20, and the operating system creates the management threads 200 according to the number N, where the number of created management threads 200 may be one or more, for example, 1 in fig. 2. The operating system selects N unbound processor cores from the K processor cores, binds the N processor cores with the created management thread 200, and the management thread 200 runs exclusively on the N processor cores. The operating system creates L working threads according to the quantity L, selects L unbound processor cores from the K processor cores, binds the L processor cores and the L working threads, and each working thread runs exclusively on one processor core.
Optionally, the data processing server 2 further includes a memory resource pool 23, where the memory resource pool 23 includes a plurality of memories, the operating system 21 selects a memory space from the memory resource pool, and binds the selected memory space with the operating system, and meanwhile, the operating system allocates a segment of independent memory interval for the management thread and each working thread, and the memory spaces of the operating system, the management thread and each working thread are independent of each other.
Referring to fig. 3, fig. 3 is a data processing server of a virtual machine architecture, the data processing server 3 includes a processor core resource pool 33, and the processor core resource pool 33 includes a plurality of processor cores. One or more virtual machines are deployed in the data processing server 3, and 3 virtual machines are taken as an example in fig. 3. A VMM (Virtual Machine Monitor, abbreviated as VMM) allocates certain hardware resources to a Virtual Machine when the Virtual Machine is created, where the hardware resources include CPU resources, memory resources, IO resources, and the like, and the VMM provides the Virtual Machine with the capability of accessing the hardware resources of the data processing server. The VMM must satisfy the following conditions when allocating CPU resources for the virtual machine: the virtual processor core of each virtual machine maps 1 physical processor core. Each virtual machine runs a data processing process, an operating system and other processes, and the data processing process comprises a management thread and a working thread. The configuration method of the present application will be described below with respect to the virtual machine 30: the VMM selects K processor cores from the virtual machine resource pool to allocate to the virtual machine 30, virtualizes the allocated K processor cores, so that each virtual processor core in the virtual machine 30 maps to a physical processor core, and the processor core owned by the virtual machine 30 is a physical processor core, and hereinafter, the physical processor core and the virtual processor core are not distinguished, which are collectively referred to as processor cores. The operating system 302 configures the number M of processor cores for the operating system, configures the number N of processor cores for the management threads, and configures the number L of processor cores for the working threads; the operating system 302 selects M unbound processor cores from the K processor cores, and the operating system 302 is migrated from one or more currently running processor cores to the selected M processor cores; the operating system 302 creates management threads according to the number N, for example, the number of the management threads is equal to N, the operating system 302 selects N unbound processor cores from the K processor cores, and binds the created management threads with the N processor cores; the management operating system 302 selects L unbound processor cores from the K processor cores, and binds the L processor cores with L worker threads, each worker thread binding 1 processor core. Optionally, the data processing server 3 further includes: and a memory resource pool 44, where the memory resource pool includes one or more memories, and for each virtual machine, 1 independent memory space is allocated to an operating system, a management thread, and each working thread included in the virtual machine.
Referring to fig. 4, fig. 4 is a data processing server of a container architecture, where the data processing server 4 includes a processor core resource pool, and the processor core resource pool includes K processor cores. One or more containers are deployed in the data processing server 4, and each container runs one data processing process, so that a plurality of data processing processes can run on one data processing server through the isolation of the containers. An operating system and other processes run on the data processing server. The data processing process includes a management thread and a worker thread. In each container, the management threads run exclusively on a preset number of processor cores, the working threads run on a preset number of processor cores, and each working thread runs exclusively on 1 processor core. The following is a description of the configuration process of the container 40: the operating system 42 configures the number M of processor cores for the operating system, configures the number N of management threads and configures the number L of working threads, selects unbound M processor cores from K processor cores, migrates the operating system from one or more currently running processor cores to the M processor cores, creates 1 data processing process in the container 40, creates a management thread according to the number N, selects unbound N processor cores from the K processor cores, binds the N processor cores with the management threads, and exclusively runs on the N processor cores; the operating system creates L working threads according to the quantity L, selects L unbound processor cores from the K processor cores, binds the L processor cores and the L working threads by the data processing process, and each working thread runs exclusively on 1 processor core. Optionally, the data processing server 4 further includes a memory resource pool 44, where the memory resource pool 44 includes one or more memories, and for each container, an independent memory space is allocated to each of the management thread and each of the working threads, and an independent memory space is also allocated to the operating system and other processes.
In the embodiment, the number of the management threads of the data processing process and the number of the processing cores of the working threads are configured, and the management threads are bound to the processor cores with the preset number when the management threads are created, so that the management threads are exclusively run on the processor cores; and binding the worker threads on an equal number of processor cores when creating the worker threads, so that each worker thread monopolizes one processor core. Therefore, task waiting caused by the fact that a plurality of working threads compete for the CPU time slices can be avoided, a single processor core is occupied by a single working thread, the CPU time slices do not need to be shared with other working threads, and time delay of data processing is effectively reduced.
Referring to fig. 5, fig. 5 is a schematic flow chart of a configuration method according to an embodiment of the present invention, which includes, but is not limited to, the following steps.
S501, the number of the processor cores configured for managing the threads is N.
Specifically, the management thread is used for managing a working thread, scheduling the working thread, and performing data interaction with an external device; the worker thread is used to perform data processing tasks. The data processing process comprises a management thread and a working thread, and the operating system and the data processing process are operated on the data processing server. The data processing server can comprise 1 processor core resource pool, the number of the processor cores in the processor core resource pool is K, wherein an operating system can maintain a state information table, entries for recording the state of each processor core are stored in the state information table, the state of the processor cores is divided into a binding state and an unbound state, the binding state represents that the processor cores are exclusively bound by threads or processes, other processes or threads cannot use the processor cores, and otherwise, the unbound state represents that the processor cores can be occupied by any or threads; when the state of any processor core in the processor core resource pool is changed, the operating system updates the table entry of the processor core in the state record table. The operating system may configure the number of processor cores for managing threads after reboot to be N, N being less than K and both N and K being positive integers.
S502, configuring the data of the processor core for the working thread to be L.
Specifically, the number of processor cores configured for exclusive ownership of the working threads by the operating system is L, wherein L is smaller than K and L is a positive integer.
S503, creating a management thread for the data processing process.
Specifically, the operating system creates one or more management threads for the data processing process according to the preset number N, wherein, in the case that a plurality of management threads need to be created, after the operating system creates a first management thread, the operating system can create the remaining management threads from the first management thread. Preferably, the number of created management threads may be equal to N, so that each management thread occupies 1 processor core, and the utilization rate of the processor cores is improved.
S504, selecting N processor cores from the K processor cores, and binding the management thread of the data processing process with the N processor cores.
Specifically, the operating system selects N unbound processor cores from the K processor cores, and exclusively binds all the management threads created in S503 to the N processor cores, and the binding method may be: and the operating system acquires the thread id of the created management thread and the serial numbers of the selected N processor cores, binds the thread id of the created management thread and the serial numbers of the N processor cores, and the management thread runs exclusively on the N processor cores after the binding.
And S505, creating L working threads for the data processing process.
Specifically, after the management threads run on the N processor cores, the operating system creates L working threads of equal number according to the number L set in S502.
S506, selecting L unbound processor cores from the K processor cores, and binding L working threads of the data processing process and the L processor cores in a one-to-one mode.
Specifically, the operating system selects L unbound processor cores from the K processor cores, and binds the created L worker threads to the L processor cores, and the binding method may be: and the operating system acquires the thread ids of the created L working threads and the sequence numbers of the selected L processor cores, one-to-one binding is carried out on the thread ids of the L working threads and the sequence numbers of the L processor cores, and each working thread runs exclusively on 1 processor core.
In the method described in fig. 1, the management thread of the data processing process exclusively runs on the bound processor core, each working thread runs on the bound processor core independently, and the working thread does not need to contend for the CPU time slice with other threads, thereby reducing the time delay of data processing.
Referring to fig. 6, fig. 6 is a schematic flow chart of another configuration method according to an embodiment of the present invention, which includes, but is not limited to, the following steps.
S601, the number of the processor cores configured for the operating system is M.
Specifically, the data processing server includes K processor cores, each of the K processor cores is a physical processor core, the operating system may maintain a state record table, and the state record table stores entries of states of each processor core, the states of the processor cores include a bound state and an unbound state, and when a state of a certain processor core of the K processor cores is changed, the operating system updates an entry of the processor core in the state record table. The data processing process comprises a management thread and a working thread, wherein the management thread is used for managing and scheduling the working thread and carrying out data or instruction interaction with external equipment; the worker thread is used to perform data processing tasks. The operating system configures a number M of processor cores for the operating system, M being less than K and M being an integer. For example: k100, the number of processor cores the data processing server is configured with for the operating system is 4.
S602, the number of the processor cores configured for managing the threads is N.
Specifically, the data processing server is configured to manage the number of processor cores of the thread to be N. For example, the operating system configures the data of the processor core for managing the thread to be 4.
S603, the number of the processor cores configured for the working threads is L.
Specifically, the operating system configures the number of processor cores for the worker thread to be L, for example: the operating system configures the number of processor cores for a worker thread to be 10.
S604, selecting M processor cores from the K processor cores, and running an operating system on the M processor cores.
In one possible implementation, after the operating system is started, the operating system currently runs on one or more processor cores, when the operating system needs to bind the processor cores, the operating system selects M processor cores from the K processor cores, and the operating system is migrated from 1 or more currently running processor cores to the selected M processor cores.
In another possible embodiment, after configuring the number M of processor cores used for the operating system, the operating system generates a configuration file, the configuration file is stored in a non-volatile memory (e.g., a mechanical hard disk, a solid state disk), after the configuration is completed, the operating system executes a restart operation, during the restart, the BIOS reads the pre-stored configuration file, selects M processor cores from the K processor cores according to the number M in the configuration file, during the start, the states of the K processor cores are all unbound states, binds the selected M processor cores with the operating system, and runs the operating system on the selected M processor cores. The operating system may also be considered as a process in the boot state.
It should be noted that, except for the operating system, other processes except the data processing process in the process space need to be bound to the selected N processor cores, so that the CPU time slice of the working thread is prevented from being preempted by the other processes.
For example, in a linux operating system, an operating system may bind a process or a thread to one or more specific processor cores using a system call of int scheduled _ response (pid _ tpid, signaled int cpusetsize, cpusetset _ t mask). The 1 st parameter pid _ t pid in the function represents the thread id or process id of the binding information needing to be set or obtained, and if the first parameter is 0, the setting of the currently called thread is represented; the 2 nd parameter cpusetsize is generally set to sizeof (cpu _ set _ t) and is used for indicating the size of the memory structure object pointed by the 3 rd parameter; the 3 rd parameter mask points to a pointer of a type of a cpu _ set _ t object, and is used for setting or acquiring a processor core list bound by a specified thread or process.
For example, in a linux operating system, a process may be bound to one or more specific CPU cores using a taskset command. The command format is "taskset-pc 321184", "21184" indicates process ID or process ID, and "3" indicates the sequence number of the processor core, and the command indicates that the process with ID 21184 runs exclusively on the 4 th processor core (the sequence number of the first processor core is 0).
For example, in a data processing server of the Docker container architecture, a process may be bound to one or more specific processor cores using a "— cpu set-cpu ═ process id" command. "cpu set" denotes a bound processor core, e.g., 0-3 or split by commas, e.g., 0,3,4(0 is the sequence number of the first processor core); the process id represents the id of the process.
For example, in a linux operating system, an init process is an ancestor of all processes, the affinity of the init process may be set to achieve the purpose of setting the affinity of all processes, and then the specified process is bound to the target processor core. For example: sysinit adds "/bin/bind 11" to/etc/rc, and binds the init process to processor core 0.
S605, selecting N processor cores from the K processor cores, and binding the management thread of the data processing process with the N processor cores.
Specifically, the operating system creates a management thread of the data processing process, selects N unbound processor cores from the K processor cores, and binds the selected N processor cores with the management thread. The binding of the thread and the processor core can refer to the example of S604, and is not described here.
S606, creating L working threads for the data processing process.
Specifically, the operating system creates L work threads for the data processing process according to the preconfigured number L.
S607, selecting L unbound processor cores from the K processor cores, and binding L working threads of the data processing process with the L processor cores.
Specifically, the operating system selects L unbound processor cores from the K processor cores, binds L working threads of the data processing process with the L processor cores, and uniquely binds one processor core to each working thread. The binding of the worker thread and the processor core can be performed in S604, which is not described herein.
S608, the operating system associates the N processor cores with the interrupt request and then generates interrupt mapping information.
Specifically, the operating system acquires an interrupt number on the system, different interrupt requests correspond to different interrupt numbers, and the operating system binds the acquired interrupt number with the N processor cores to generate interrupt mapping information. After the interrupt request is bound with the N processor cores, the interrupt requests received by the subsequent operating system are all processed by the N processor cores, the working thread does not process any interrupt request, the working thread is prevented from being interrupted when executing a data processing task, and the processing time delay is reduced.
For example, in the linux operating system, the operating system executes the cat/proc/interrupts command and checks the interrupt number of the interrupt request. The operating system sets the binding relationship between the interrupt request and the processor core by modifying/proc/irq/{ irq _ number }/smp _ affinity configuration file.
For example: echo 3>/proc/irq/20/smp _ affinity denotes an interrupt request with an interrupt number of 20 assigned to a processor core with a sequence number of 3.
And S609, receiving an interrupt request.
S610, inquiring N processor cores related to the interrupt request according to the interrupt mapping information.
S611, informing the N processor cores to process the interrupt request.
Specifically, after receiving the interrupt request, the operating system queries N processor cores associated with the interrupt request according to preset interrupt mapping information, notifies the N processor cores to process the interrupt request, and processes the interrupt request through a specific processor core, and the processor core bound by the working thread does not need to perform any interrupt processing, thereby avoiding the interrupt of the data processing task and reducing the processing delay.
And S612, setting the scheduling types of the L working threads as real-time scheduling types according to preset scheduling type configuration information.
For example, the following steps are carried out: in the linux operating system, the system call of pthread _ attr _ setschedpolicy is used for setting the scheduling type of the thread, and the operating system can set L working threads to be the real-time scheduling type of the sched _ fifo first-come-first-serve. Once a certain worker thread occupies a certain processor core, the data processing task is always executed until a task with higher priority arrives or gives up by itself.
S613, setting the priority of the L working threads as the highest priority according to the preset priority configuration information.
Specifically, the operating system sets the priority of the L working threads to the highest priority according to the preset priority configuration information, so that the working threads are prevented from running tasks with higher priority than the data processing tasks, and the time delay of the data processing tasks is reduced.
For example, in a linux system, the operating system uses a pthread _ attr _ setschedparam system call to set the priority of a worker thread.
Optionally, after receiving the new execution code, the management thread writes the new execution code into the lock-free queue, and notifies L work threads in a lock-free manner, and after the work thread completes each operation before and after executing each operation, the work thread detects a notification state of the lock-free queue, and after finding that the new execution code needs to be reloaded, the work thread loads the new execution code to run the data processing task.
The operating system mainly realizes the lock-free queue through atomic operations such as CAS or FAA and the like and the Retry-Loop technology or realizes the message transmission between the management thread and the working thread through a sharing mode.
The management thread receives new execution codes or service data;
the management thread puts the new execution code or the service data into a lock-free queue;
and when any one of the L working threads is in an idle state, the working thread in the idle state takes out an execution code or service data from the lock-free queue for data processing.
Optionally, the method further includes:
and the operating system allocates a private memory space for each working thread in the L working threads according to preset memory mapping information.
For example, in the linux operating system, the operating system uses TLS (Thread Local Storage) to associate memory space with a given Thread being executed.
Optionally, when a virtual machine is deployed in the data processing server, the K processor cores are allocated to a virtual machine, the virtual machine includes the K virtual processor cores, the K processor cores and the K virtual processor cores are in a one-to-one mapping relationship, and the operating system is installed in the virtual machine. Through the deployment scheme of the virtual machine, the utilization rate of resources can be improved.
Optionally, the method further includes:
the operating system receives a memory access request sent by a working thread; the memory access request carries a memory address, and the working thread is any one of the L working threads;
the operating system judges whether the memory address is in a private memory space associated with the working thread;
if so, the operating system sends the memory access request to the associated private memory space for processing;
if not, the operating system sends the memory access request to a shared memory space for processing.
Optionally, before creating the data processing process, the method further includes:
the operating system configures the memory mapping information; wherein the memory mapping information indicates that all the working threads created by the data processing process are respectively allocated with a private memory space.
In the embodiment, by setting the shared-nothing architecture, each working thread has a private memory space, so that the memory space is prevented from being preempted when a plurality of working threads store private data, and the time delay of the working threads for executing data processing tasks is reduced.
In the method described in fig. 2, through the binding of the processor core, the memory binding, the interrupt binding, and the setting of the priority and the scheduling type of the worker thread, the worker thread can use a dedicated hardware resource to execute a data processing task, thereby reducing the processing delay.
While the method of the embodiments of the present invention has been described in detail above, to facilitate a better understanding of the above-described aspects of the embodiments of the present invention, the following provides a corresponding apparatus of the embodiments of the present invention.
Referring to fig. 7, fig. 7 is a schematic structural diagram of a configuration apparatus according to an embodiment of the present invention, where the configuration apparatus may include a configuration module 701 and a processing module 702, where the configuration apparatus 7 may be implemented by an Application-Specific Integrated Circuit (ASIC) or a Programmable Logic Device (PLD). The PLD may be a Complex Programmable Logic Device (CPLD), an FPGA, a General Array Logic (GAL), or any combination thereof. The configuration means 7 is used to implement the configuration method shown in fig. 5. When the configuration method shown in fig. 5 is implemented by software, the configuration device 7 and each module thereof may be a software module. The detailed description of each module follows.
A configuration module 701, configured to configure the number of processor cores for managing threads as N and the number of processor cores for working threads as L; wherein N is less than K and N is an integer greater than 0, L is less than K and L is an integer greater than 0.
A processing module 702, configured to create a management thread for a data processing process, select N processor cores from the K processor cores, and bind the management thread of the data processing process with the N processor cores; and creating L working threads for the data processing process, selecting L unbound processor cores from the K processor cores, and binding the L working threads of the data processing process and the L processor cores in a one-to-one manner.
Optionally, the configuring module 701 is further configured to configure the number of processor cores used for the operating system to be M; wherein M is less than K and M is an integer greater than 0;
processing module 702 is further configured to select M processor cores from the K processor cores on which to run the operating system.
Optionally, the configuration module 701 is further configured to associate the N processor cores with an interrupt request and generate interrupt mapping information;
the processing module 702 is further configured to receive an interrupt request; querying the N processor cores associated with the interrupt request according to the interrupt mapping information; notifying the N processor cores to process the interrupt request.
Optionally, the operating system runs in a virtual machine, the virtual machine includes K virtual processor cores, and the K virtual processor cores and the K processor cores are in a one-to-one mapping relationship.
Optionally, the processing module 702 is further configured to set the scheduling types of the L work threads as real-time scheduling types according to preset scheduling type configuration information.
Optionally, the processing module 702 is further configured to set the priority of the L working threads to the highest priority according to preset priority configuration information.
In the above embodiment, the configuration module enables the worker thread to use a dedicated hardware resource to execute a data processing task by the binding of the processor core, the memory binding, the interrupt binding, and the setting of the worker thread priority and the scheduling type, thereby reducing the processing delay.
It should be noted that, in the embodiment of the present invention, the specific implementation of each module may also correspond to the corresponding description of the method embodiments shown in fig. 5 and fig. 6.
Referring to fig. 8, a schematic structural diagram of a data processing server according to an embodiment of the present invention is provided, in which the data processing server 8 includes a processor 801, a memory 802, and a communication interface 803. The communication interface 803 is used for data or instruction interaction with an external device. The number of processors 801 in the data processing server 8 may be one or more, and the processors 801 include K processor cores. In some embodiments of the present invention, the processor 801, the memory 802 and the communication interface 803 may be connected by a bus system or other methods, and the processor 801, the memory 802 and the communication interface 803 may be connected by wire or may communicate by other means such as wireless transmission. The data processing server 8 may be adapted to perform the method shown in fig. 5. With regard to the meaning and examples of the terms involved in the present embodiment, reference may be made to the embodiment corresponding to fig. 5. And will not be described in detail herein.
Wherein the memory 802 stores program code therein. The K processor cores in the processor 801 are used to call program code stored in the memory 802 for performing the following operations:
configuring the number of processor cores for an operating system to be M; wherein M is less than K and M is an integer greater than 0;
selecting M unbound processor cores from the K processor cores;
the M processor cores call code in the memory for performing the following operations:
and running the operating system.
Optionally, the M processor cores are further configured to perform:
configuring the number of processor cores for managing threads to be N and configuring the number of processor cores for working threads to be L; wherein N is less than K and is an integer greater than 0, L is less than K and is an integer greater than 0;
the M processor cores are further configured to perform:
creating a management thread for a data processing process, selecting N unbound processor cores from the K processor cores, and binding the management thread and the N processor cores;
creating L working threads, selecting unbound L processor cores from the K processor cores, and binding the L working threads and the L processor cores in a one-to-one manner;
the N processor cores call code in the memory for performing the following operations:
running the management thread;
the L processor cores call code in the memory for performing the following operations:
and running one work thread bound respectively.
Optionally, the M processor cores are further configured to perform:
associating the N processor cores with an interrupt request to generate interrupt mapping information;
the N processor cores are further configured to perform:
receiving an interrupt request to be processed;
and processing the interrupt request to be processed according to the interrupt mapping information.
Optionally, the operating system runs in a virtual machine, the virtual machine includes K virtual processor cores, and the K virtual processor cores and the K processor cores are in a one-to-one mapping relationship.
Optionally, the M processor cores are further configured to perform:
and setting the scheduling types of the L working threads as real-time scheduling types according to preset scheduling type configuration information.
Optionally, the M processor cores are further configured to perform:
and setting the priority of the L working threads as the highest priority according to preset priority configuration information.
In summary, by implementing the embodiment of the present invention, the management thread of the data processing process exclusively runs on the bound processor core, and each working thread independently runs on the bound processor core, so that the working thread does not need to contend for the CPU time slice with other threads, thereby reducing the time delay of data processing.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. And the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.
The above embodiments are only for illustrating the preferred embodiments of the present invention, and the scope of the present invention should not be limited thereby, and those skilled in the art can understand that all or part of the processes of the above embodiments can be implemented and equivalents thereof can be made according to the claims of the present invention, and still fall within the scope of the invention.

Claims (12)

1. A configuration method, applied to a data processing server comprising K processor cores, K being an integer greater than 0, comprising:
creating a management thread for the data processing process;
selecting N processor cores from the K processor cores, and binding a management thread with the N processor cores, wherein N is smaller than K and is an integer larger than 0;
creating a work thread for the data processing process;
and selecting L processor cores from the K processor cores, and binding a working thread with the L processor cores, wherein L is smaller than K and is an integer larger than 0.
2. The method of claim 1, wherein the L processor cores are L processor cores that are not bound to the management thread.
3. The method of claim 1 or 2, wherein the number of worker threads comprises L, and wherein the binding worker threads to the L processor cores comprises:
and performing one-to-one binding on the L working threads and the L processor cores.
4. The method according to any one of claims 1-3, further comprising:
and selecting M processor cores from the K processor cores, and running an operating system on the M processor cores, wherein M is smaller than K and is an integer larger than 0.
5. The method according to any one of claims 1 to 4,
the K processor cores are K virtual processor cores in a virtual machine in the data processing server, and the K virtual processor cores are in one-to-one correspondence with K physical processor cores in the data processing server.
6. A configuration method, applied to a data processing server comprising K processor cores, K being an integer greater than 0, comprising:
configuring the number of processor cores for managing threads to be N, so that the managing threads in the data processing process are processed by N processor cores in the K processor cores; wherein N is less than K and N is an integer greater than 0;
configuring the number of processor cores for working threads to be L, so that the working threads in the data processing process are processed by the L processor cores for the working threads in the K processor cores, and the data processing process; wherein L is less than K and L is an integer greater than 0.
7. The method of claim 6, wherein a management thread and a worker thread in the data processing process are processed by different ones of the K processor cores.
8. The method according to claim 6 or 7, wherein the number of the worker threads in the data processing process comprises L, and the L worker threads in the data processing process are processed by the L processor cores for the worker threads one by one.
9. A configuration device, comprising: a first processing module and a second processing module,
the first processing module is used for creating a management thread for the data processing process;
the second processing module is used for selecting N processor cores from K processor cores of the data processing server and binding the management thread with the N processor cores, wherein K is an integer larger than 0, N is smaller than K and N is an integer larger than 0;
the first processing module is further configured to create a work thread for the data processing process;
the second processing module is further configured to select L processor cores from the K processor cores, and bind a work thread with the L processor cores, where L is smaller than K and is an integer greater than 0.
10. A configuration apparatus, characterized in that the configuration apparatus comprises: a first configuration module and a second configuration module,
the first configuration module is configured to configure the number of processor cores for managing threads to be N, so that the management threads in the data processing process are processed by N processor cores of K processor cores of the data processing server, where K is an integer greater than 0, N is less than K and N is an integer greater than 0;
the second configuration module is configured to set the number of the processor cores for the working threads to be L, so that the working threads in the data processing process are processed by L of the K processor cores, where L is smaller than K and is an integer greater than 0.
11. A data processing server is characterized in that the data processing server comprises K processor cores and a memory, K is an integer larger than 0, any one or more processor cores in the K processor cores call codes stored in the memory, and the following operations are executed:
creating a management thread for the data processing process;
selecting N processor cores from the K processor cores, and binding a management thread with the N processor cores, wherein N is smaller than K and is an integer larger than 0;
creating a work thread for the data processing process;
and selecting L processor cores from the K processor cores, and binding a working thread with the L processor cores, wherein L is smaller than K and is an integer larger than 0.
12. A data processing server is characterized in that the data processing server comprises K processor cores and a memory, K is an integer larger than 0, any one or more processor cores in the K processor cores call codes stored in the memory, and the following operations are executed:
configuring the number of processor cores for managing threads to be N, so that the managing threads in the data processing process are processed by N processor cores in the K processor cores; wherein N is less than K and N is an integer greater than 0;
configuring the number of processor cores for working threads to be L, so that the working threads in the data processing process are processed by the L processor cores for the working threads in the K processor cores, and the data processing process; wherein L is less than K and L is an integer greater than 0.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112286687A (en) * 2020-10-30 2021-01-29 北京搜狗科技发展有限公司 Resource processing method and device
CN113672373A (en) * 2021-08-30 2021-11-19 浙江大华技术股份有限公司 Thread binding method and device and electronic equipment

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111274015A (en) * 2016-08-31 2020-06-12 华为技术有限公司 Configuration method and device and data processing server
CN109144681B (en) * 2017-06-27 2021-01-22 大唐移动通信设备有限公司 Control method and device
CN107479976A (en) * 2017-08-14 2017-12-15 郑州云海信息技术有限公司 A kind of multiprogram example runs lower cpu resource distribution method and device simultaneously
CN107832151B (en) * 2017-11-10 2020-09-25 东软集团股份有限公司 CPU resource allocation method, device and equipment
CN109871275A (en) * 2017-12-01 2019-06-11 晨星半导体股份有限公司 Multicomputer system and its processor management method
CN108804211A (en) * 2018-04-27 2018-11-13 西安华为技术有限公司 Thread scheduling method, device, electronic equipment and storage medium
CN110362402B (en) * 2019-06-25 2021-08-10 苏州浪潮智能科技有限公司 Load balancing method, device, equipment and readable storage medium
CN110442423B (en) * 2019-07-09 2022-04-26 苏州浪潮智能科技有限公司 Method and equipment for realizing CPU reservation of virtual machine by using control group
CN110825528B (en) * 2019-11-11 2022-02-01 聚好看科技股份有限公司 Resource management method, device and equipment
CN111831390B (en) * 2020-01-08 2024-04-16 北京嘀嘀无限科技发展有限公司 Resource management method and device of server and server
CN113301087B (en) * 2020-07-21 2024-04-02 阿里巴巴集团控股有限公司 Resource scheduling method, device, computing equipment and medium
CN112039963B (en) * 2020-08-21 2023-04-07 广州虎牙科技有限公司 Processor binding method and device, computer equipment and storage medium
CN114296865B (en) * 2021-12-15 2024-03-26 中汽创智科技有限公司 Scheduling method and device for virtual machine threads, electronic equipment and storage medium
CN115695334B (en) * 2022-10-11 2023-06-02 广州市玄武无线科技股份有限公司 Thread allocation control method for multiple service nodes
CN116431365A (en) * 2023-06-07 2023-07-14 北京集度科技有限公司 Monitoring system and method based on vehicle-mounted service guide framework and vehicle

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103365718A (en) * 2013-06-28 2013-10-23 贵阳朗玛信息技术股份有限公司 Thread scheduling method, thread scheduling device and multi-core processor system
CN103513932A (en) * 2012-06-28 2014-01-15 深圳市腾讯计算机系统有限公司 Method and device for data processing
US20140208072A1 (en) * 2013-01-18 2014-07-24 Nec Laboratories America, Inc. User-level manager to handle multi-processing on many-core coprocessor-based systems
CN104750543A (en) * 2013-12-26 2015-07-01 杭州华为数字技术有限公司 Thread creation method, business request processing method and associated device
CN105700949A (en) * 2014-11-24 2016-06-22 中兴通讯股份有限公司 Data processing method and device based on multi-core processor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101634953A (en) * 2008-07-22 2010-01-27 国际商业机器公司 Method and device for calculating search space, and method and system for self-adaptive thread scheduling
US8336051B2 (en) * 2010-11-04 2012-12-18 Electron Database Corporation Systems and methods for grouped request execution
CN102831011B (en) * 2012-08-10 2015-11-18 上海交通大学 A kind of method for scheduling task based on many core systems and device
CN103617071B (en) * 2013-12-02 2017-01-25 北京华胜天成科技股份有限公司 Method and device for improving calculating ability of virtual machine in resource monopolizing and exclusive mode
CN103838552B (en) * 2014-03-18 2016-06-22 北京邮电大学 The process system and method for 4G wide-band communication system multi-core parallel concurrent pipelined digital signal
CN104050036B (en) * 2014-05-29 2018-04-27 汉柏科技有限公司 The control system and method for the polycaryon processor network equipment
CN111274015A (en) * 2016-08-31 2020-06-12 华为技术有限公司 Configuration method and device and data processing server

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103513932A (en) * 2012-06-28 2014-01-15 深圳市腾讯计算机系统有限公司 Method and device for data processing
US20140208072A1 (en) * 2013-01-18 2014-07-24 Nec Laboratories America, Inc. User-level manager to handle multi-processing on many-core coprocessor-based systems
CN103365718A (en) * 2013-06-28 2013-10-23 贵阳朗玛信息技术股份有限公司 Thread scheduling method, thread scheduling device and multi-core processor system
CN104750543A (en) * 2013-12-26 2015-07-01 杭州华为数字技术有限公司 Thread creation method, business request processing method and associated device
CN105700949A (en) * 2014-11-24 2016-06-22 中兴通讯股份有限公司 Data processing method and device based on multi-core processor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112286687A (en) * 2020-10-30 2021-01-29 北京搜狗科技发展有限公司 Resource processing method and device
CN113672373A (en) * 2021-08-30 2021-11-19 浙江大华技术股份有限公司 Thread binding method and device and electronic equipment

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