CN111245230A - Half-bridge circuit assembly and switching type power supply - Google Patents
Half-bridge circuit assembly and switching type power supply Download PDFInfo
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- CN111245230A CN111245230A CN201811445221.4A CN201811445221A CN111245230A CN 111245230 A CN111245230 A CN 111245230A CN 201811445221 A CN201811445221 A CN 201811445221A CN 111245230 A CN111245230 A CN 111245230A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
- H02M3/1586—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel switched with a phase shift, i.e. interleaved
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
A half-bridge circuit assembly and a switching power supply are provided, the half-bridge circuit assembly comprises a main circuit board with a first transistor setting area and a second transistor setting area, a first transistor arranged in the first transistor setting area, a second transistor arranged in the second transistor setting area and electrically connected in series with the first transistor, and a bridge circuit board. A node forming a signal interference region is arranged between the first transistor and the second transistor. And the bridging circuit board bridges from the first transistor arrangement area to the second transistor arrangement area across the signal interference area. A control terminal of the first transistor receives a first driving signal. A control end of the second transistor receives a second driving signal which is opposite to the first driving signal through the bridging circuit board, so that the second driving signal is prevented from being interfered by a signal interference area.
Description
Technical Field
The present invention relates to a circuit assembly, and more particularly, to a half-bridge circuit assembly using a bridge circuit board.
Background
With the development of technology, electronic devices such as televisions, computer hosts, computer screens, refrigerators, sound boxes …, etc. have become more popular. Since most of the internal electronic components of the electronic device use a dc power source, a device is needed to convert the ac and fixed voltage mains into various dc voltages with different magnitudes, and supply the dc voltages to the internal electronic components to enable the internal electronic components to operate and perform their functions. And the device for converting alternating current into direct current is a power supply.
Generally, Power supplies are classified into Linear Power supplies (Linear Power supplies) and Switching Mode Power Supplies (SMPS), depending on their circuits. The linear power supply has the advantages of simple circuit, durability, high stability and quick transient response. However, the linear power supply has disadvantages of large size, heavy weight, low efficiency, narrow input voltage range, and short retention time, so that the linear power supply has been replaced by a switching power supply in recent years.
In order to cope with various output powers, the switching power supply has developed the following common circuit topologies (Topology), such as Flyback (Flyback), Forward (Forward), Full Bridge (Full Bridge), Half Bridge (Half Bridge), Push-Pull (Push-Pull), and so on.
Referring to fig. 1 and fig. 2, fig. 1 is a circuit diagram of a switching power supply of the prior art; fig. 2 is a schematic perspective view of a switching power supply of the prior art. As shown in fig. 1 and fig. 2, a switching power supply PA100 includes at least one circuit board, a first transistor PA12, a second transistor PA13, a driving signal source PA14, an inductor PA15, a capacitor PA16, and an input voltage source PA 17. In the present embodiment, the switching power supply PA100 includes two circuit boards PA11 and PA11 a.
The first transistor PA12, the second transistor PA13 and the driving signal source PA14 are disposed on the circuit board PA11, and the inductor PA15 and the capacitor PA16 are disposed on the circuit board PA11 a. However, the present invention is not limited thereto, and the components may be disposed on the same circuit board in the prior art. The input voltage source PA17 is electrically connected to the first transistor PA12 and the second transistor PA13 through the voltage connection terminals PAH2 and PAH 3.
The first Transistor PA12 and the second Transistor PA13 are Metal-Oxide-Semiconductor Field Effect transistors (MOSFETs), but not limited thereto. The first transistor PA12 has a Gate (Gate) PAG12, a Drain (Drain) PAD12 and a Source (Source) PAs12, and the second transistor PA13 has a Gate (Gate) PAG13, a Drain (Drain) PAD13 and a Source (Source) PAs 13. The first transistor PA12 and the second transistor PA13 are electrically connected to form a half bridge circuit, and more precisely, the source PAs12 of the first transistor PA12 is electrically connected to the drain PAD13 of the second transistor PA 13.
The gate PAG12 of the first transistor PA12 receives a first driving signal PAs1 from the driving signal source PA14, and the gate PAG13 of the second transistor PA13 receives a second driving signal PAs2 from the driving signal source PA14, wherein the first driving signal PAs1 and the second driving signal PAs2 are inverse signals to each other. That is, in the half-bridge circuit, when the first transistor PA12 is turned on, the second transistor PA13 is turned off; when the second transistor PA13 is turned on, the first transistor PA12 is turned off, so as to prevent the first transistor PA12 and the second transistor PA13 from being turned on at the same time, which may cause short circuit, and even burn out of the first transistor PA12 and the second transistor PA 13.
However, the source PAS12 and the drain PAD13 are electrically connected by a wiring PAL3, a node PAN is provided on the wiring PAL3, and the node PAN is electrically connected to the inductor PA15 through a wiring PAL1 and an inductor connection PAH 1. The capacitor PA16 is electrically connected to the inductor PA15 and electrically connected to the voltage connection terminal PAH3 by a wiring PAL2, wherein the wiring PAL1, the wiring PAL2 and the wiring PAL3 may be wires or traces on a printed circuit board. Because of the constantly switching relationship between the first transistor PA12 and the second transistor PA13, the node PAN and the wirings PAL1 and PAL3 passing through the node PAN form a signal interference source, and are expanded outward to form a signal interference area PAIR based on the node PAN and the wirings PAL1 and PAL 3. It should be noted that the signal interference region is not only a two-dimensional plane, but also a three-dimensional space, and the drawing is drawn to show a portion of the circuit board PA11 where the signal interference region is formed, and is labeled as a signal interference region PAIR. In addition, as long as there is a current flowing through a place, more or less interference will be generated, and since it is not the main cause of the signal interference region PAIR, it is not described in detail.
Here, the driving signal source PA14 is adjacent to the first transistor PA12, so that the transmitted first driving signal PAs1 does not PASs through the signal interference region PAIR. However, when the driving signal source PA14 transmits the second driving signal PAs2 to the second transistor PA13, the second driving signal PAs2 is disturbed due to the passing of the signal interference region PAIR. Even the second transistor PA13 that should be turned off may be turned on, so that the first transistor PA12 and the second transistor PA13 are turned on simultaneously, which may cause short circuit and burn out. If the driving signal source PA14 is adjacent to the second transistor PA13, the first driving signal PAs1 transmitted to the first transistor PA12 farther away from the driving signal source PA14 may be interfered via the signal interference region PAIR.
The prior art solution seeks to route the wiring (wires or traces on a printed circuit board) away from the signal interference region PAIR, as shown in fig. 2. However, this reduces the density of the circuit board PA11 or increases the area and volume of the circuit board PA11 to increase the space occupation, which is not suitable for the current society's demand for light weight or minimized volume. Moreover, if there are multiple sets of the first transistor PA12 and the second transistor PA13 on the circuit board PA11, the signal interference area PAIR will be increased accordingly, so the coverage area will be larger. The problem of reduced use density and increased space occupation is further exacerbated by the fact that the wiring is routed completely around the jammer area. In addition, as mentioned above, there is more or less interference where there is wiring, and thus, it is still possible that the wiring may be interfered with by other wiring on the circuit board PA11 by bypassing the signal interference region PAIR.
Disclosure of Invention
In view of the above, in the prior art, the node formed by the first transistor and the second transistor and the signal interference region formed by the node and the wiring passing through the node being extended outward may cause one of the first driving signal and the second driving signal passing through the signal interference region to be interfered by the signal interference region, which may cause the first transistor and the second transistor to be turned on simultaneously to cause a short circuit, even burn out the first transistor and the second transistor. The routing of the wires around the signal interference area will reduce the usage density of the circuit board or increase the space occupation of the circuit board, which is contrary to the current demand of light weight and minimized volume. It is a primary objective of the claimed invention to provide a half-bridge circuit assembly and a switching power supply, which are capable of preventing both the first driving signal and the second driving signal from passing through the signal interference region.
The present invention is directed to a half-bridge circuit assembly for receiving a first driving signal and a second driving signal opposite to the first driving signal, and includes a main circuit board, a first transistor, a second transistor, and a bridge circuit board.
The main circuit board is provided with a first transistor setting area and a second transistor setting area. The first transistor is arranged in the first transistor arrangement area. The second transistor is arranged in the second transistor arrangement area and is electrically connected in series with the first transistor, a node is arranged between the first transistor and the second transistor, and the node and the wiring of at least one connection node are used as the basis to extend outwards to define a signal interference area.
And the bridging circuit board bridges the signal interference area from the first transistor setting area to the second transistor setting area, wherein a control end of the first transistor receives the first driving signal, and a control end of the second transistor receives the second driving signal through the bridging circuit board, so that the second driving signal is prevented from being interfered by the signal interference area.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is to electrically connect a Source (Source) of the first transistor and a Drain (Drain) of the second transistor in the half-bridge circuit device, and form the node.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is that the half-bridge circuit assembly further includes a connector, and the connector electrically connects the main circuit board and the bridge circuit board.
Based on the above-mentioned technical solutions, an auxiliary technical solution derived from the present invention is that the half-bridge circuit further includes a third transistor disposed in the first transistor disposition region and electrically connected in series with the first transistor, and a control terminal of the third transistor receives the first driving signal.
Based on the above-mentioned technical solutions, an accessory technical solution derived from the present invention is that the half-bridge circuit further includes a fourth transistor disposed in the second transistor disposition region and electrically connected in series with the second transistor, and a control terminal of the fourth transistor receives the second driving signal through the bridge circuit board.
Based on the above-mentioned technical solutions, an auxiliary technical solution derived from the present invention is that the half-bridge circuit further includes a plurality of third transistors electrically connected in series with each other, the third transistors are disposed in the first transistor disposition region, a source of one of the third transistors closest to the first transistor is electrically connected to a drain of the first transistor, and a plurality of control terminals of the third transistors receive the first driving signal.
Based on the above-mentioned technical solutions, an accessory technical solution derived from the present invention is that the half-bridge circuit device further includes a plurality of fourth transistors, the fourth transistors are disposed in the second transistor disposition region, a drain of one of the fourth transistors closest to the second transistor is electrically connected to a source of the second transistor, and a plurality of control terminals of the fourth transistors receive the second driving signal through the bridge circuit board.
The present invention is directed to solve the problems of the prior art, and a necessary technical means is to provide a switching power supply, which includes at least one half bridge circuit element and a driving signal source. Each half-bridge circuit component comprises a main circuit board, a first transistor, a second transistor and a bridge circuit board.
The main circuit board is provided with a first transistor setting area and a second transistor setting area. The first transistor is arranged in the first transistor arrangement area. The second transistor is arranged in the second transistor setting area and is electrically connected in series with the first transistor, a node is arranged between the first transistor and the second transistor, and the node and at least one wiring passing through the node are used as the basis to extend outwards to define a signal interference area. And the bridging circuit board bridges from the first transistor arrangement area to the second transistor arrangement area across the signal interference area.
The driving signal source is arranged adjacent to the half-bridge circuit component, one control end of the first transistor receives a first driving signal from the driving signal source, and one control end of the second transistor receives a second driving signal which is opposite to the first driving signal from the driving signal source through the bridging circuit board.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is to electrically connect a source of the first transistor and a drain of the second transistor in the switching power supply to form the node.
Based on the above-mentioned necessary technical means, an accessory technical means derived from the present invention is that the switching power supply further includes a connector, and the connector electrically connects the main circuit board and the bridge circuit board.
In view of the above, the half-bridge circuit assembly provided by the present invention utilizes the bridge circuit board to bridge from the first transistor setting region to the second transistor setting region across the signal interference region, so that the control terminal of the second transistor receives the second driving signal through the bridge circuit board, thereby preventing the second driving signal from being interfered by the signal interference region.
The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.
Drawings
FIG. 1 is a circuit diagram of a switching power supply of the prior art;
FIG. 2 is a schematic perspective view of a switching power supply of the prior art;
FIG. 3 is a circuit diagram of a switching power supply according to a first preferred embodiment of the present invention;
fig. 4 is a schematic perspective view of a switching power supply according to a first preferred embodiment of the invention;
FIG. 5 is a circuit diagram of a switching power supply according to a second embodiment of the present invention;
fig. 6 is a schematic perspective view illustrating a switching power supply according to a second embodiment of the invention;
fig. 7 is a schematic perspective view illustrating a switching power supply according to a third embodiment of the invention; and
fig. 8 is a perspective view illustrating another perspective view of a switching power supply according to a third embodiment of the invention.
Wherein the reference numerals
PA100 switching type power supply
PA11 and PA11a circuit board
PA12 first transistor
PA13 second transistor
PA14 driving signal source
PA15 inductance
PA16 capacitor
PA17 input voltage source
PAD12, PAD13 drain
PAG12, PAG13 grid
PAS12 and PAS13 source
Inductive connecting terminal of PAH1
Voltage connection end of PAH2 and PAH3
PAIR signal interference region
PAL1, PAL2, PAL3 wiring
PAN node
PAS1 first drive signal
PAS2 second drive signal
100. 100a, 100b switching power supply
1. 1a, 1b, 1c, 1d, 1e, 1f half-bridge circuit assembly
11 main circuit board
12. 12b, 12c, 12d, 12e, 12f first transistors
13. 13b, 13c, 13d, 13e, 13f second transistors
14. 14b, 14c, 14d, 14e, 14f bridge circuit board
15 connector
16 third transistor
17 fourth transistor
2 drive signal source
3 inductance
4 capacitance
5 input voltage source
6 Circuit Board
7 drive signal connector
D12, D13, D16 and D17 drain electrodes
G12, G13, G16, G17 gates
S12, S13, S16, S17 source
H1, H1b inductance connection terminal
H2, H3, H2b, H3b voltage connection terminal
L1, L2, L3, L1a wiring
N node
R1 first transistor setting area
R2 second transistor setting region
RI, RIA signal interference area
S1 first drive signal
S2 second drive signal
Detailed Description
The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:
referring to fig. 3 and fig. 4, fig. 3 is a circuit diagram of a switching power supply according to a first preferred embodiment of the invention; fig. 4 is a schematic perspective view of a switching power supply according to a first preferred embodiment of the invention. As shown in the figure, a switching power supply 100 includes a half-bridge circuit assembly 1, a driving signal source 2, an inductor 3, a capacitor 4, an input voltage source 5 and a circuit board 6. The half-bridge circuit assembly 1 includes a main circuit board 11, a first transistor 12, a second transistor 13 and a bridge circuit board 14. In order to avoid the situation that the embodiment of the present invention is not clear due to too many lines in the drawings, the wirings (traces or wires of the printed circuit) in the drawings are only illustrated by lines for expressing the electrical connection relationship between the elements at the two ends of the lines.
The main circuit board 11 has a first transistor disposition region R1 and a second transistor disposition region R2. The first transistor 12 is disposed in the first transistor disposition region R1, and the second transistor 13 is disposed in the second transistor disposition region R2 and electrically connected in series with the first transistor 12. In order to avoid the lines from being too messy, the first transistor disposition region R1 and the second transistor disposition region R2 are only indicated by arrows, i.e., regions for the first transistor 12 and the second transistor 13. In the present embodiment, the first Transistor 12 and the second Transistor 13 are Metal-Oxide-Semiconductor Field Effect transistors (MOSFETs), but not limited thereto. The first Transistor 12 and the second Transistor 13 may be power transistors such as Bipolar Junction Transistors (BJTs) and Insulated Gate Bipolar Transistors (IGBTs).
The first transistor 12 has a Drain (Drain) D12, a Gate (Gate) G12, and a Source (Source) S12, and the second transistor 13 has a Drain (Drain) D13, a Gate (Gate) G13, and a Source (Source) S13. The input voltage source 5 is electrically connected to the drain D12 of the first transistor 12 and the source S13 of the second transistor 13 via the voltage connection terminals H2 and H3. The source S12 of the first transistor 12 is electrically connected in series with the drain D13 of the second transistor 13 to form a half bridge circuit, and the source S12 of the first transistor 12 and the drain D13 of the second transistor 13 have a node N.
The driving signal source 2 is connected to the main Circuit board 11 and transmits a first driving signal S1 and a second driving signal S2 through a driving Integrated Circuit (IC) (not shown), wherein the first driving signal S1 and the second driving signal S2 are inverse signals. A control terminal of the first transistor 12, which may be referred to as a gate G12, receives the first driving signal S1, and a control terminal of the second transistor 13, which may be referred to as a gate G13, receives the second driving signal S2. Since the first driving signal S1 and the second driving signal S2 are opposite phase signals, only one of the first transistor 12 and the second transistor 13 is turned on, and the other is turned off, thereby preventing the first transistor 12 and the second transistor 13 from being turned on simultaneously to cause a short circuit. Since the resistance of the first transistor 12 and the second transistor 13 are small, the simultaneous conduction may cause excessive current, even burning out the first transistor 12, the second transistor 13 or the main circuit board 11.
The node N is located on a wiring L3 electrically connecting the source S12 and the drain D13, and is electrically connected to the inductor 3 through an inductor connection terminal H1 by a wiring L1. Due to the on/off switching relationship between the first transistor 12 and the second transistor 13, the node N and the wirings L1 and L3 passing through the node N form a signal interference source, and a signal interference region RI is formed by extending the node N and the wirings L1 and L3. More specifically, the signal interference region is not only a two-dimensional plane, but also a three-dimensional space, and only a portion of the main circuit board 11 where the signal interference region is formed is drawn and labeled as a signal interference region RI. The shape range of the sir region RI is also only illustrated, and is increased or decreased according to the circuit specification actually implemented, but is expanded outward based on the node N and the wiring passing through the node N. The capacitor 4 is electrically connected to the input voltage source 5 through the voltage connection terminal H3 by a wiring L2, wherein the wirings L1, L2 and L3 may be wires or traces on the printed circuit board. In the embodiment, the inductor 3 and the capacitor 4 are disposed on the circuit board 6, but not limited thereto, the inductor 3 and the capacitor 4 may also be disposed on the main circuit board 11.
The bridge circuit board 14 is bridged from the first transistor disposition region R1 to the second transistor disposition region R2 across the signal interference region RI. In the present embodiment, the bridge circuit board 14 is electrically connected to the main circuit board 11 by a plurality of connectors 15 (only one of which is shown).
In the present embodiment, the driving signal source 2 is adjacent to the first transistor 12, and therefore, the driving signal source 2 transmits the first driving signal S1 to the first transistor 12 without passing through the signal interference region RI. The driving signal source 2 transmits the second driving signal S2 to the second transistor 13, and passes through the signal interference region RI. Therefore, the driving signal source 2 transmits the second driving signal S2 to the second transistor 13 through the bridge circuit board 14, so as to cross the signal interference region RI and prevent the second driving signal S2 from being interfered by the signal interference region RI. In addition, air is used as a barrier layer between the bridge circuit board 14 and the signal interference region RI on the main circuit board 11, so that the second driving signal S2 can be more effectively prevented from being interfered by the signal interference region RI than the prior art which uses a method of bypassing the signal interference region PAIR on the circuit board.
The circuit for transmitting the second driving signal S2 is instead disposed on the bridge circuit board 14, so that the space on the main circuit board 11 can be cleared and other circuits can be configured, the space utilization rate on the main circuit board 11 can be increased, and the space occupancy rate can be increased without increasing the area volume of the main circuit board 11.
Next, please refer to fig. 4 to fig. 6, wherein fig. 5 is a schematic circuit diagram of a switching power supply according to a second embodiment of the present invention; fig. 6 is a schematic perspective view illustrating a switching power supply according to a second embodiment of the invention. As shown, a switching power supply 100a is mostly the same as the switching power supply 100, and only differs from the half-bridge circuit assembly 1 a. In addition, the same parts of the inductor 3, the capacitor 4 and the circuit board 6 are omitted in this embodiment, and refer to fig. 4.
The half-bridge circuit assembly 1a includes the same main circuit board 11, first transistor 12, second transistor 13, bridge circuit board 14, and a third transistor 16 and a fourth transistor 17 as in the first embodiment. The third transistor 16 and the fourth transistor 17 are MOSFETs, and each has a source (S16, S17), a drain (D16, D17), and a gate (G16, G17). The third transistor 16 and the fourth transistor 17 may be BJT, IGBT, or the like.
The source S16 of the third transistor 16 is electrically connected to the drain D12 of the first transistor 12, and the drain D17 of the fourth transistor 17 is electrically connected to the source S13 of the second transistor 13. The gate G16 of the third transistor 16 receives the first driving signal S1 together with the first transistor 12, and the gate G17 of the fourth transistor 17 receives the second driving signal S2 together with the second transistor 13. Therefore, the third transistor 16 and the first transistor 12 are turned on or off together, and the on/off switching relationship between the first transistor 12 and the second transistor 13 does not occur, so that a signal interference region is not generated between the third transistor 16 and the first transistor 12. Similarly, the relationship between the fourth transistor 17 and the second transistor 13 is also the same.
The electrical connection between the first transistor 12 and the second transistor 13 still forms a node N, and the node N and the wiring passing through the node N, only the wiring L1a is shown here, and still forms a signal interference source, and further expands outwards to generate a signal interference area RIa, which is the same as the first embodiment, and therefore, the description thereof is omitted. While the bridge circuit board 14 still spans the signal interference area RIa.
In this embodiment, the number of transistors is increased compared to the first embodiment, so that the individual withstand voltage requirement of the transistors can be reduced. For example, the input voltage source 5 is 1000V, and in the first embodiment, when the first transistor 12 is turned on and the second transistor 13 is turned off, the voltage across the first transistor 12 is 1000V; when the first transistor 12 is turned off and the second transistor 13 is turned on, the voltage across the second transistor 13 is 1000V.
In the present embodiment, when the first transistor 12 and the third transistor 16 are turned on and the second transistor 13 and the fourth transistor 17 are turned off, the cross voltage of each of the first transistor 12 and the third transistor 16 is reduced to 500V; when the first transistor 12 and the third transistor 16 are turned off and the second transistor 13 and the fourth transistor 17 are turned on, the cross voltage of each of the second transistor 13 and the fourth transistor 17 is reduced to 500V. The larger the number of the third transistors 16 and the fourth transistors 17, the more the respective cross-voltages will be reduced, and the requirements for the individual withstand voltages of the transistors will be reduced accordingly.
In other embodiments of the present invention, the number of the third transistors and the number of the fourth transistors may be plural, and the electrical connection manner is: the third transistor (fourth transistor) closest to the first transistor (second transistor) is electrically connected in series with the drain of the first transistor (second transistor) by using the source of the third transistor (fourth transistor), and the other adjacent third transistors (fourth transistors) are electrically connected in series with the drains of the adjacent third transistors by using the sources. The input voltage source is electrically connected to the drain of the nearest third transistor and the source of the nearest fourth transistor. And all the third transistors (fourth transistors) receive the same first driving signal (second driving signal) as the first transistor (second transistor).
Finally, please refer to fig. 3, fig. 4, fig. 7 and fig. 8, wherein fig. 7 shows a perspective view of a switching power supply according to a third embodiment of the present invention; fig. 8 is a schematic perspective view illustrating another perspective view of a switching power supply according to a third embodiment of the invention. As shown, a switching power supply 100b includes a plurality of half- bridge circuit elements 1, 1b, 1c, 1d, 1e and 1f, voltage terminals H2b, H3b, an inductor terminal H1b and a driving signal connector 7.
The half-bridge circuit assembly 1 is similar to the first embodiment, and includes a main circuit board 11, a first transistor 12, a second transistor 13 and a bridge circuit board 14 (both labeled in fig. 3). The half- bridge circuit elements 1b, 1c, 1d, 1e, and 1f are substantially the same as the half-bridge circuit element 1, and include first transistors 12b, 12c, 12d, 12e, and 12f, second transistors 13b, 13c, 13d, 13e, and 13f, and bridge circuit boards 14b, 14c, 14d, 14e, and 14f, except that the main circuit board 11 is shared with the half-bridge circuit element 1.
The voltage connection terminals H2b and H3b and the inductor connection terminal H1b are the same as the voltage connection terminals H2 and H3 and the inductor connection terminal H1 in the first embodiment, and are still electrically connected to the input voltage source, the capacitor and the inductor, so that the description is omitted. The driving signal connector 7 is electrically connected to a driving signal generator (e.g., the driving signal source 2) for receiving and transmitting the first driving signal S1 and the second driving signal S2.
Most of the switching power supplies comprise a plurality of groups of first transistors and second transistors which are electrically connected in series, and a node and a signal interference area are formed by the group of first transistors and second transistors which are electrically connected in series, wherein the signal interference area is defined by outward expansion based on the node and wiring passing through the node. The groups form nodes and signal interference zones.
As shown in fig. 7 and 8, the half- bridge circuit elements 1, 1b, 1c, 1d, 1e and 1f have six pairs of first transistors and second transistors, which are connected in a butt joint manner, thereby forming six nodes (e.g., the node N in fig. 3 and 4) and accordingly six signal interference regions (e.g., the signal interference region RI in fig. 4). If the prior art solutions are used, the wiring is routed farther when there are more signal interference areas, the utilization on the circuit board is lower, or the area of the circuit board increases more.
In the present embodiment, each set of half-bridge circuit components respectively use its bridge circuit boards 14b, 14c, 14d, 14e, and 14f to cross over the signal interference region (such as the signal interference region RI in fig. 4), which not only can increase the use density of the main circuit board 11, but also can use the air between the bridge circuit board and the main circuit board 11 as a barrier layer to avoid the second driving signal from being interfered by the signal interference region, so as to solve various problems derived from the formation of the signal interference region in the prior art.
In the embodiment, the first transistors 12, 12b, 12c, 12d, 12e, and 12f are disposed on the same side adjacent to the driving signal connector 7, and the second transistors 13, 13b, 13c, 13d, 13e, and 13f are disposed on the other side away from the driving signal connector 7 with respect to the first transistors 12, 12b, 12c, 12d, 12e, and 12f, but not limited thereto.
The first transistors and the second transistors may be alternately arranged. Taking the reference symbols in this embodiment as an example, the first transistors 12, 12c, 12e and the second transistors 13b, 13d, 13f are disposed on the same side adjacent to the driving signal connector 7, and are sequentially arranged as a first transistor 12, a second transistor 13b, a first transistor 12c, a second transistor 13d, a first transistor 12e and a second transistor 13 f; similarly, the other side away from the driving signal connector 7 is sequentially arranged as a second transistor 13, a first transistor 12b, a second transistor 13c, a first transistor 12d, a second transistor 13e and a first transistor 12 f.
Generally, the transistors in the half-bridge circuit can be divided into a High-Side (High Side) transistor and a low-Side (LowSide) transistor. In the present embodiment, the first transistors 12, 12b, 12c, 12d, 12e, and 12f are high-side transistors, and the second transistors 13, 13b, 13c, 13d, 13e, and 13f are low-side transistors. Because the power losses of the high-side transistor and the low-side transistor are different, the heat generated by the high-side transistor and the low-side transistor is also different. The high-side transistors and the low-side transistors in each group of half-bridge circuits are arranged in a staggered mode, the high-side transistors in each group of half-bridge circuits are not located on the same side, heat energy generated by the half-bridge circuits can be effectively dispersed, and the situation that the temperature of the side is far higher than that of the other side where the low-side transistors are located due to the fact that the high-side transistors are located on the same side is avoided.
It should be noted that the arrangement of the first transistors 12, 12b, 12c, 12d, 12e, and 12f and the second transistors 13, 13b, 13c, 13d, 13e, and 13f is merely an example, and the arrangement is not limited thereto.
In summary, the switching power supply provided by the present invention utilizes the bridge circuit board in the half-bridge circuit assembly to cross over the signal interference area, and utilizes the air between the bridge circuit board and the main circuit board as the barrier to prevent the driving signal from being interfered by the signal interference area, so as to solve the various problems derived from the signal interference area in the prior art; in addition, the half-bridge circuit assembly of the present invention is not limited to be applied in a switching power supply, and all the half-bridge circuit assemblies of the present invention are within the scope of protection of the present invention.
The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A half-bridge circuit assembly for receiving a first driving signal and a second driving signal having an inverse phase with respect to the first driving signal, the half-bridge circuit comprising:
a main circuit board having a first transistor setting region and a second transistor setting region;
a first transistor disposed in the first transistor disposition region;
a second transistor, which is arranged in the second transistor setting area and is electrically connected in series with the first transistor, a node is arranged between the first transistor and the second transistor, and a signal interference area is defined by extending outwards based on the node and at least one wiring connected with the node; and
and the bridging circuit board bridges the first transistor setting area to the second transistor setting area from the first transistor setting area across the signal interference area, wherein a control end of the first transistor receives the first driving signal, and a control end of the second transistor receives the second driving signal through the bridging circuit board.
2. The half-bridge circuit assembly of claim 1, wherein a source of the first transistor is electrically connected to a drain of the second transistor and forms the node.
3. The half-bridge circuit assembly of claim 1, further comprising a connector electrically connecting the main circuit board and the bridge circuit board.
4. The half-bridge circuit assembly of claim 1, further comprising a third transistor disposed in the first transistor disposition region and electrically connected in series to the first transistor, wherein a control terminal of the third transistor receives the first driving signal.
5. The half-bridge circuit assembly of claim 1, further comprising a fourth transistor disposed in the second transistor disposing region and electrically connected in series with the second transistor, wherein a control terminal of the fourth transistor receives the second driving signal via the bridge circuit board.
6. The half-bridge circuit assembly of claim 1, further comprising a plurality of third transistors electrically connected in series, the third transistors being disposed in the first transistor disposing region, a source of one of the third transistors closest to the first transistor being electrically connected to a drain of the first transistor, and control terminals of the third transistors receiving the first driving signal.
7. The half-bridge circuit assembly of claim 1, further comprising a plurality of fourth transistors electrically connected in series, the plurality of fourth transistors being disposed in the second transistor disposing region, a drain of one of the plurality of fourth transistors closest to the second transistor being electrically connected to a source of the second transistor, and control terminals of the plurality of fourth transistors receiving the second driving signal via the bridge circuit board.
8. A switching power supply, comprising:
at least one half of the bridge circuit elements, each of the at least one half of the bridge circuit elements comprising:
a main circuit board having a first transistor setting region and a second transistor setting region;
a first transistor disposed in the first transistor disposition region;
a second transistor, which is arranged in the second transistor setting area and is electrically connected in series with the first transistor, a node is arranged between the first transistor and the second transistor, and a signal interference area is defined by extending outwards based on the node and at least one wiring connected with the node; and
a bridge circuit board bridging from the first transistor setting region to the second transistor setting region across the signal interference region; and
and the driving signal source is arranged adjacent to the at least one half bridge circuit component, a control end of the first transistor receives a first driving signal from the driving signal source, and a control end of the second transistor receives a second driving signal which is opposite to the first driving signal from the driving signal source through the bridge circuit board.
9. The switching power supply of claim 8 wherein a source of the first transistor is electrically connected to a drain of the second transistor and forms the node.
10. The switching power supply of claim 8, further comprising a connector electrically connecting the main circuit board and the bridge circuit board.
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| CN201811445221.4A CN111245230B (en) | 2018-11-29 | 2018-11-29 | Half-bridge circuit assembly and switching type power supply |
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| CN201811445221.4A CN111245230B (en) | 2018-11-29 | 2018-11-29 | Half-bridge circuit assembly and switching type power supply |
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| CN111245230B (en) | 2021-06-04 |
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