CN111193570A - Method, device, system, medium and electronic equipment for executing instructions - Google Patents
Method, device, system, medium and electronic equipment for executing instructions Download PDFInfo
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- CN111193570A CN111193570A CN201911396745.3A CN201911396745A CN111193570A CN 111193570 A CN111193570 A CN 111193570A CN 201911396745 A CN201911396745 A CN 201911396745A CN 111193570 A CN111193570 A CN 111193570A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
- H04J3/0658—Clock or time synchronisation among packet nodes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
- H04J3/0638—Clock or time synchronisation among nodes; Internode synchronisation
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Abstract
The present disclosure relates to a method, an apparatus, a system, a medium, and an electronic device for instruction execution, where the method is applied to a host device, and the method includes: sending a PTP synchronization message to a slave device so that the slave device performs clock synchronization according to the PTP synchronization message; after receiving a message which is sent by the slave equipment and indicates that the synchronization is successful, generating a target instruction and determining the expected execution time of the target instruction; and sending a notification message to the slave device, wherein the notification message contains the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time. Therefore, the clock synchronization of the master device and the slave device can be ensured, and support is provided for ensuring the synchronous execution of the instructions of the master device and the slave device in the following. On the basis of clock synchronization of the master device and the slave device, the master device and the slave device both execute the target instruction at the expected execution time, and synchronization and accuracy of instruction execution are effectively guaranteed.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method, an apparatus, a system, a medium, and an electronic device for executing instructions.
Background
At present, with the development of computer technology, systems are also increasingly bulky, and more systems are implemented based on master and slave devices. In the prior art, the synchronization between the master device and the slave device is mostly transmitted through a network, and the command of the master device is synchronized to the slave device, so that the slave device and the master device keep consistent operation. However, in the above manner, the instructions of the master device and the slave device cannot be guaranteed to be executed at the same time point due to time consumption of network transmission and the like.
Disclosure of Invention
The invention aims to provide a method, a device, a system, a medium and an electronic device for executing instructions with high accuracy and strong synchronism.
In order to achieve the above object, according to a first aspect of the present disclosure, there is provided a method of instruction execution, applied to a master device, the method including:
sending a PTP synchronization message to a slave device so that the slave device performs clock synchronization according to the PTP synchronization message;
after receiving a message which is sent by the slave equipment and indicates that the synchronization is successful, generating a target instruction and determining the expected execution time of the target instruction;
and sending a notification message to the slave device, wherein the notification message contains the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
Optionally, the determining the expected execution time of the target instruction includes:
acquiring a hardware clock signal;
and determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
Optionally, the first preset time interval is greater than or equal to an instruction transmission delay, where the instruction transmission delay is a time when the target instruction is sent from the master device to the slave device.
Optionally, the method further comprises:
triggering a timer to time when the PTP synchronous message is sent to the slave equipment;
and when the timer reaches a second preset time interval, re-executing the step of sending the PTP synchronous message to the slave equipment.
According to a second aspect of the present disclosure, there is provided an apparatus for instruction execution, applied to a master device, the apparatus including:
the first sending module is used for sending a PTP synchronization message to the slave equipment so that the slave equipment performs clock synchronization according to the PTP synchronization message;
the generating module is used for generating a target instruction and determining the expected execution time of the target instruction after receiving the message which is sent by the slave equipment and indicates that the synchronization is successful;
and a second sending module, configured to send a notification message to the slave device, where the notification message includes the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
Optionally, the generating module includes:
the acquisition submodule is used for acquiring a hardware clock signal;
and the determining submodule is used for determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
Optionally, the first preset time interval is greater than or equal to an instruction transmission delay, where the instruction transmission delay is a time when the target instruction is sent from the master device to the slave device.
Optionally, the apparatus further comprises:
and the triggering module is used for triggering a timer to time when the PTP synchronization message is sent to the slave equipment, and triggering the first sending module to send the PTP synchronization message to the slave equipment when the timer reaches a second preset time interval.
According to a third aspect of the present disclosure, there is provided a system for instruction execution, the system comprising a master device, and a slave device in communication with the master device,
the master device is configured to perform the steps of the method according to any one of the first aspect;
and the slave equipment is used for carrying out clock synchronization according to the PTP synchronization message and executing the received target instruction.
According to a fourth aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of any of the methods of the first aspect described above.
According to a fifth aspect of the present disclosure, there is provided an electronic device comprising:
a memory having a computer program stored thereon;
a processor for executing the computer program in the memory to implement the steps of the method of any of the first aspects above.
In the technical scheme, a PTP synchronization message is sent to a slave device, so that the slave device performs clock synchronization according to the PTP synchronization message; after receiving a message which is sent by the slave equipment and indicates that the synchronization is successful, generating a target instruction and determining the expected execution time of the target instruction; sending a notification message to the slave device to cause the slave device to execute the target instruction at the desired execution time. Therefore, according to the technical scheme, on one hand, clock synchronization of the master device and the slave device can be ensured, and a support basis is provided for ensuring synchronous execution of instructions of the master device and the slave device in the follow-up process. On the other hand, the notification message sent to the slave device not only contains the target instruction, but also contains the expected execution time of the target instruction, so that both the master device and the slave device execute the target instruction at the expected execution time on the basis of clock synchronization of the master device and the slave device, thereby avoiding the influence of network transmission on instruction synchronous execution and effectively ensuring the synchronization and the accuracy of instruction execution.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1A is a schematic diagram of instruction execution in a prior art arrangement;
FIG. 1B is a schematic diagram of instruction execution in another prior art arrangement;
FIG. 2 is a flow diagram of a method of instruction execution provided in accordance with one embodiment of the present disclosure;
FIG. 3 is a block diagram of an apparatus for instruction execution provided in accordance with one embodiment of the present disclosure;
FIG. 4 is a block diagram illustrating an electronic device in accordance with an exemplary embodiment;
FIG. 5 is a block diagram illustrating an electronic device in accordance with an example embodiment.
Detailed Description
The following detailed description of specific embodiments of the present disclosure is provided in connection with the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present disclosure, are given by way of illustration and explanation only, not limitation.
The applicant has found that the existing solutions generally use network transmission to execute the same command at the master and slave. Specifically, as shown in fig. 1A, if the master device executes the instruction first, then a notification message is sent, where the notification message is used to notify the slave device to execute the instruction. If the time when the master device executes the instruction A is Et1, the time when the notification message is sent is St; the time when the slave receives the notification message is Rt, the time when the command a is executed is Et2, and in this scenario, the time difference Diff between the master and the slave executing the command is:
diff ═ Et2-Rt) + (Rt-St) + (St-Et1), i.e. the time difference from Et1 to Et 2.
In another example, as shown in fig. 1B, if the master device first sends the notification message, then the command is executed. In this scenario, the time difference Diff between the master device and the slave device executing the instructions is:
Diff＝(Et2-Rt)+(Rt-St)-(Et1-St)。
the applicant also finds that the master device and the slave device adopt independent clock control, so that the clock control corresponding to the master device and the slave device also has influence on the time difference of instruction execution.
Based on the above applicant's findings, the present disclosure provides a method for instruction execution to effectively reduce the time difference of instruction execution of the master device and the slave device. Fig. 2 is a flow chart illustrating a method of instruction execution according to an embodiment of the present disclosure. Illustratively, the method may be applied to a master device.
As shown in fig. 2, the method includes:
in S11, a PTP synchronization message is transmitted to the slave device, so that the slave device performs clock synchronization based on the PTP synchronization message.
Among them, PTP (Precision Time Protocol) is a Protocol for Time synchronization, which is used for high-Precision Time synchronization between devices. The PTP synchronization message (Sync) may include a Sync transmission time tag. Therefore, when receiving the PTP synchronization message, the slave device can synchronize its clock according to the PTP synchronization message, so that the clocks of the master device and the slave device are consistent. The clock synchronization through the PTP synchronization packet is performed in the prior art, and is not described herein again.
In S12, after receiving the message indicating that the synchronization is successful, which is transmitted from the device, the target instruction is generated and the expected execution time of the target instruction is determined.
The expected execution time of the target instruction means that the target instruction is not executed immediately after the master device generates the target instruction, but is executed at the expected execution time. Also, the expected execution times of the same target instruction are the same. In this embodiment, the target instruction is generated and the expected execution time of the target instruction is determined after receiving the message sent by the slave device and indicating that the synchronization is successful, that is, after the clocks of the master device and the slave device are synchronized, so that the expected execution time can be guaranteed to be consistent for the master device and the slave device, and the synchronous execution of the subsequent instructions is guaranteed.
In S13, a notification message is sent to the slave device, where the notification message includes the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
In this embodiment, the notification message sent to the slave device includes not only the target instruction but also the expected execution time of the target instruction, so that the slave device can be caused to execute the target instruction at the expected execution time.
In the technical scheme, a PTP synchronization message is sent to a slave device, so that the slave device performs clock synchronization according to the PTP synchronization message; after receiving a message which is sent by the slave equipment and indicates that the synchronization is successful, generating a target instruction and determining the expected execution time of the target instruction; sending a notification message to the slave device to cause the slave device to execute the target instruction at the desired execution time. Therefore, according to the technical scheme, on one hand, clock synchronization of the master device and the slave device can be ensured, and a support basis is provided for ensuring synchronous execution of instructions of the master device and the slave device in the follow-up process. On the other hand, the notification message sent to the slave device not only contains the target instruction, but also contains the expected execution time of the target instruction, so that both the master device and the slave device execute the target instruction at the expected execution time on the basis of clock synchronization of the master device and the slave device, thereby avoiding the influence of network transmission on instruction synchronous execution and effectively ensuring the synchronization and the accuracy of instruction execution.
For example, the method performed by the instructions provided by the present disclosure may be applied to a media file playing system, such as a video playing system. The system can comprise a master device and a plurality of slave devices, wherein the master device is used for controlling the plurality of slave devices to play media files, such as video files; a plurality of slave devices are used to collectively play the media file, and each slave device can play a partial image in one frame of image of the media file.
For example, multiple machines may be combined to form a player group to play a video at the same time, and each machine in the player group is responsible for playing a part of the video frame. Such a process does address the need to play high resolution video. For example, the slave device may be a sub-screen, and the sub-screens are spliced into an integral screen for playing a video file. Therefore, in this scenario, it is necessary to ensure that the video playing of the multiple sub-screens is synchronous, and if one sub-screen plays the partial image of the first frame image and the other sub-screen plays the partial image of the second frame image, a video playing error may occur, so that the video playing watched by the user is blocked and even misplaced.
In the technical scheme of the present disclosure, the master device may send PTP synchronization packets to the plurality of slave devices, so that clocks of the respective slave devices are synchronized. In this case, after receiving the messages that the synchronization transmitted by all the slave devices is successful, the video playback instructions with the respective slave devices are generated. When the plurality of slave devices are respectively used for displaying the same video, the video playing instructions of the slave devices can be the same, and the expected execution time of the video playing instructions is the same; if the plurality of slave devices are respectively used for displaying different parts of the same video, the video playing commands of the slave devices are generally different, but the expected execution time of the video playing commands is the same.
Then, when the master device sends the video playing command to each slave device, the expected execution time corresponding to each video playing command is the same, and the clocks of the slave devices are synchronous, so that each slave device can play the corresponding video data at the expected execution time according to the video playing command, and each slave device can play the video synchronously, and the phenomenon of pause or dislocation caused by asynchronous playing among different slave devices is avoided.
Optionally, an exemplary implementation of the determining the expected execution time of the target instruction is as follows, and this step may include:
acquiring a hardware clock signal, wherein a manner of acquiring the hardware clock signal is the prior art, and is not described herein again. Moreover, after the slave device performs clock synchronization according to the PTP synchronization message, the time corresponding to the acquired hardware clock signal may be considered as the time corresponding to both the master device and the slave device, because the master device and the slave device are clock-synchronized at this time.
And determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
Illustratively, the time corresponding to the hardware clock signal may be used as the reference time. The first preset time interval may be set according to an actual usage scenario, for example, the higher the real-time requirement on the target instruction, the shorter the duration corresponding to the first preset time interval is. For example, the sum of the time corresponding to the hardware signal and a first preset time interval may be used as the expected execution time. If the time corresponding to the hardware signal is 3 hours, 3 minutes and 3 seconds, and the first preset time interval is 1 second, the expected execution time is 3 hours, 3 minutes and 4 seconds.
Note that it takes time for the target instruction to be transmitted from the master device to the slave device. Therefore, in order to avoid the phenomenon that the slave device has not received the target instruction when the desired execution time is reached, the present disclosure also provides the following embodiments.
Optionally, the first preset time interval is greater than or equal to an instruction transmission delay, where the instruction transmission delay is a time when the target instruction is sent from the master device to the slave device.
In this embodiment, if the first preset time interval is greater than or equal to the instruction transmission delay, it may be ensured that the slave device has received the target instruction when the expected execution time is reached, so that it may be ensured that the slave device may execute the target instruction at the expected execution time, thereby ensuring synchronization and accuracy of instruction execution.
As an example, the first preset time interval may be set to 2 times the instruction transmission delay. Therefore, the target instruction can be received when the expected execution time is reached, the target instruction can be ensured to be successfully executed, and the time delay of target instruction execution can be effectively shortened. Therefore, the real-time performance and the synchronism of instruction execution can be effectively ensured.
Optionally, the method further comprises:
triggering a timer to time when the PTP synchronous message is sent to the slave equipment;
and when the timer reaches a second preset time interval, re-executing the step of sending the PTP synchronous message to the slave equipment.
The second preset time interval may be set according to an actual usage scenario, and may be, for example, 1s, which is not limited in this disclosure. In this embodiment, the PTP synchronization packet may be sent to the slave device at a second preset time interval by timing with the timer, that is, clock synchronization of the slave device is performed at the second preset time interval, so as to effectively avoid a clock accumulated error caused by a hardware difference between the master device and the slave device, thereby effectively ensuring accuracy of clock synchronization between the master device and the slave device, ensuring synchronization of instruction execution, and improving user experience.
The present disclosure also provides an apparatus for executing an instruction, which is applied to a host device, as shown in fig. 3, where the apparatus 10 includes:
a first sending module 100, configured to send a PTP synchronization packet to a slave device, so that the slave device performs clock synchronization according to the PTP synchronization packet;
a generating module 200, configured to generate a target instruction and determine an expected execution time of the target instruction after receiving a message indicating that synchronization is successful, where the message is sent by the slave device;
a second sending module 300, configured to send a notification message to the slave device, where the notification message includes the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
Optionally, the generating module includes:
the acquisition submodule is used for acquiring a hardware clock signal;
and the determining submodule is used for determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
Optionally, the first preset time interval is greater than or equal to an instruction transmission delay, where the instruction transmission delay is a time when the target instruction is sent from the master device to the slave device.
Optionally, the apparatus further comprises:
and the triggering module is used for triggering a timer to time when the PTP synchronization message is sent to the slave equipment, and triggering the first sending module to send the PTP synchronization message to the slave equipment when the timer reaches a second preset time interval.
The present disclosure also provides a system for instruction execution, the system comprising a master device, and a slave device in communication with the master device,
the main device is used for executing the steps of the instruction execution method;
and the slave equipment is used for carrying out clock synchronization according to the PTP synchronization message and executing the received target instruction.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
Fig. 4 is a block diagram illustrating an electronic device 700 according to an example embodiment. As shown in fig. 4, the electronic device 700 may include: a processor 701 and a memory 702. The electronic device 700 may also include one or more of a multimedia component 703, an input/output (I/O) interface 704, and a communication component 705.
The processor 701 is configured to control the overall operation of the electronic device 700, so as to complete all or part of the steps in the method for executing the instructions. The memory 702 is used to store various types of data to support operation at the electronic device 700, such as instructions for any application or method operating on the electronic device 700 and application-related data, such as contact data, transmitted and received messages, pictures, audio, video, and the like. The Memory 702 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk. The multimedia components 703 may include screen and audio components. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may further be stored in the memory 702 or transmitted through the communication component 705. The audio assembly also includes at least one speaker for outputting audio signals. The I/O interface 704 provides an interface between the processor 701 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 705 is used for wired or wireless communication between the electronic device 700 and other devices. Wireless communication, such as Wi-Fi, bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IOT, eMTC, or other 5G, etc., or a combination of one or more of them, which is not limited herein. The corresponding communication component 705 may thus include: Wi-Fi module, Bluetooth module, NFC module, etc.
In an exemplary embodiment, the electronic Device 700 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above-described method of instruction execution.
In another exemplary embodiment, a computer readable storage medium comprising program instructions which, when executed by a processor, implement the steps of the method performed by the instructions described above is also provided. For example, the computer readable storage medium may be the memory 702 described above comprising program instructions executable by the processor 701 of the electronic device 700 to perform the method described above for instruction execution.
Fig. 5 is a block diagram illustrating an electronic device 1900 according to an example embodiment. For example, the electronic device 1900 may be provided as a server. Referring to fig. 5, an electronic device 1900 includes a processor 1922, which may be one or more in number, and a memory 1932 for storing computer programs executable by the processor 1922. The computer program stored in memory 1932 may include one or more modules that each correspond to a set of instructions. Further, the processor 1922 may be configured to execute the computer program to perform the method of instruction execution described above.
Additionally, electronic device 1900 may also include a power component 1926 and a communication component 1950, the power component 1926 may be configured to perform power management of the electronic device 1900, and the communication component 1950 may be configured to enable communication, e.g., wired or wireless communication, of the electronic device 1900. In addition, the electronic device 1900 may also include input/output (I/O) interfaces 1958. The electronic device 1900 may operate based on an operating system, such as Windows Server, Mac OS XTM, UnixTM, Linux, etc., stored in memory 1932.
In another exemplary embodiment, a computer readable storage medium comprising program instructions which, when executed by a processor, implement the steps of the method performed by the instructions described above is also provided. For example, the computer readable storage medium may be the memory 1932 described above that includes program instructions that are executable by the processor 1922 of the electronic device 1900 to perform the method described above for execution of the instructions.
In another exemplary embodiment, a computer program product is also provided, which comprises a computer program executable by a programmable apparatus, the computer program having code portions for performing the method of instruction execution described above when executed by the programmable apparatus.
The preferred embodiments of the present disclosure are described in detail with reference to the accompanying drawings, however, the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present disclosure within the technical idea of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.
It should be noted that the various features described in the above embodiments may be combined in any suitable manner without departing from the scope of the invention. In order to avoid unnecessary repetition, various possible combinations will not be separately described in this disclosure.
In addition, any combination of various embodiments of the present disclosure may be made, and the same should be considered as the disclosure of the present disclosure, as long as it does not depart from the spirit of the present disclosure.
Claims (10)
1. A method of instruction execution, applied to a host device, the method comprising:
sending a PTP synchronization message to a slave device so that the slave device performs clock synchronization according to the PTP synchronization message;
after receiving a message which is sent by the slave equipment and indicates that the synchronization is successful, generating a target instruction and determining the expected execution time of the target instruction;
and sending a notification message to the slave device, wherein the notification message contains the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
2. The method of claim 1, wherein determining the desired execution time of the target instruction comprises:
acquiring a hardware clock signal;
and determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
3. The method of claim 2, wherein the first predetermined time interval is greater than or equal to a command transmission delay, and wherein the command transmission delay is a time when the target command is transmitted from the master device to the slave device.
4. The method of claim 1, further comprising:
triggering a timer to time when the PTP synchronous message is sent to the slave equipment;
and when the timer reaches a second preset time interval, re-executing the step of sending the PTP synchronous message to the slave equipment.
5. An apparatus for instruction execution, applied to a host device, the apparatus comprising:
the first sending module is used for sending a PTP synchronization message to the slave equipment so that the slave equipment performs clock synchronization according to the PTP synchronization message;
the generating module is used for generating a target instruction and determining the expected execution time of the target instruction after receiving the message which is sent by the slave equipment and indicates that the synchronization is successful;
and a second sending module, configured to send a notification message to the slave device, where the notification message includes the target instruction and the expected execution time, so that the slave device executes the target instruction at the expected execution time.
6. The apparatus of claim 5, wherein the generating module comprises:
the acquisition submodule is used for acquiring a hardware clock signal;
and the determining submodule is used for determining the expected execution time according to the time corresponding to the hardware clock signal and a first preset time interval.
7. The apparatus of claim 6, wherein the first predetermined time interval is greater than or equal to a command transmission delay, and wherein the command transmission delay is a time when the target command is sent from the master device to the slave device.
8. A system for instruction execution, the system comprising a master device, and a slave device in communication with the master device,
the master device is configured to perform the steps of the method of any one of claims 1-4;
and the slave equipment is used for carrying out clock synchronization according to the PTP synchronization message and executing the received target instruction.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 4.
10. An electronic device, comprising:
a memory having a computer program stored thereon;
a processor for executing the computer program in the memory to carry out the steps of the method of any one of claims 1 to 4.
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| WO2022140995A1 (en) * | 2020-12-28 | 2022-07-07 | 华为技术有限公司 | Data transmission method and apparatus, and related device |
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| JP4853625B2 (en) * | 2006-01-04 | 2012-01-11 | 日本電気株式会社 | Propagation delay time measuring method, synchronization method, and wireless LAN system |
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| WO2022140995A1 (en) * | 2020-12-28 | 2022-07-07 | 华为技术有限公司 | Data transmission method and apparatus, and related device |
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Address after: 100089 1408, Building 29, yard 9, anningzhuang West Road, Haidian District, Beijing Applicant after: Beijing kaishida Technology Co.,Ltd. Address before: 100089 1408, Building 29, yard 9, anningzhuang West Road, Haidian District, Beijing Applicant before: BEIJING KYSTAR TECHNOLOGY Co.,Ltd. |
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Application publication date: 20200522 |