CN111181501B - Capacitance-inductance-capacitance adjustable matching network and frequency adjustable amplifier - Google Patents
Capacitance-inductance-capacitance adjustable matching network and frequency adjustable amplifier Download PDFInfo
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- CN111181501B CN111181501B CN202010111751.6A CN202010111751A CN111181501B CN 111181501 B CN111181501 B CN 111181501B CN 202010111751 A CN202010111751 A CN 202010111751A CN 111181501 B CN111181501 B CN 111181501B
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- H—ELECTRICITY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/56—Modifications of input or output impedances, not otherwise provided for
- H03F1/565—Modifications of input or output impedances, not otherwise provided for using inductive elements
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- H03—ELECTRONIC CIRCUITRY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/42—Amplifiers with two or more amplifying elements having their dc paths in series with the load, the control electrode of each element being excited by at least part of the input signal, e.g. so-called totem-pole amplifiers
- H03F3/423—Amplifiers with two or more amplifying elements having their dc paths in series with the load, the control electrode of each element being excited by at least part of the input signal, e.g. so-called totem-pole amplifiers with MOSFET's
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Abstract
The invention discloses a capacitance-inductance-capacitance adjustable matching network and a frequency adjustable amplifier, wherein the center frequency of the network is adjustable, and the impedance matching of an input end and an output end can be realized. The network comprises a first variable capacitor, a first inductor and a second variable capacitor which are sequentially connected in series, wherein the other end of the first variable capacitor is used as an input end or an output end of the network, meanwhile, the common end of the first inductor and the second variable capacitor is used as the output end or the input end of the network, and the other end of the second variable capacitor is grounded. The network has simple structure, can realize continuous adjustment of the central frequency of the matching network, can control two varactors by using the same voltage through curve fitting, and is easy to operate when adjusting the frequency. The frequency-adjustable amplifier is based on the design of a capacitance-inductance-capacitance adjustable matching network, has the characteristics of simple structure, high adjustment flexibility, large tuning range and the like, has better performance, and has smaller circuit whole area and high integration level.
Description
Technical Field
The invention belongs to the field of radio frequency integrated circuits, and particularly relates to a capacitance-inductance-capacitance adjustable matching network and a frequency adjustable amplifier.
Background
The development trend of modern microwave systems is high performance and low cost, so devices capable of working in multiple frequency bands are often selected to complete the design. The frequency-adjustable amplifier can work in different frequency bands by externally applying control voltage, can be compatible with different communication standards, meets the requirements of different application scenes, reduces equipment cost, and is suitable for the design of a low-cost, small-size and high-integration system. At present, a common method for designing a frequency-adjustable amplifier is to load adjustable matching networks on input or output ports, wherein the adjustable matching networks are realized by adopting a switch, and the value of a passive device in a matching circuit is changed by the on-off of the switch.
In document 1 (J.Busquere, K.Grenier, D.Dubuc, E.Fourn, P.Ancey and r.plana, "MEMS IC concept for Reconfigurable Low Noise Amplifier,"2006 European Microwave Conference,Manchester,2006,pp.1358-1361.), a MEMS tuning device with variable capacitance is designed by using the on-off of a MEMS switch, so that the device presents different capacitance values under the condition of switching on-off of the switch, thereby realizing that the matching networks are respectively matched at different center frequencies, and in addition, realizing the switching between the two output matching networks by using the MEMS switch. However, the MEMS can only realize the switching of two frequency bands, the application range is very limited, and MEMS cannot be integrated with an amplifying circuit, so that the integration level of the circuit is limited.
Document 2 (r.malmqvist et al., "RF MEMS based impedance matching networks for tunable multi-band microwave low noise amplifiers,"2009International Semiconductor Conference,Sinaia,2009,pp.303-306.) also employs single-ended and differential matching networks loaded with radio frequency MEMS to achieve frequency tunability of the low noise amplifier. But the variable capacitance load is obtained by using a 2-bit MEMS switch, and the two MEMS single-end matching networks designed and processed can respectively realize the adjustment range of 10% and 13% at about 25 GHz. However, 2-bit MEMS switches can only achieve 4-state frequency band switching, and the introduced loss is 1.5dB-2.0dB.
Document 3 (P).
D.Fritsche, C.Carta and F. Ellinger, "A Passive Tunable Matching Filter for Multiband RF Applications Demonstrated at to 14GHz," in IEEE Microwave and Wireless Components Letters, vol.27, no.8, pp.703-705, aug.2017.) utilize CMOS switches to implement reconfigurable amplifiers, which propose an inductance-capacitance (LLC) matching network capable of implementing high-low impedance change, wherein the capacitance is a digital variable capacitance formed by 4 MOS switches and a common capacitance, and the on-off of the MOS switches is controlled by four control voltages, so that 16 different capacitance combinations can be implemented, thereby controlling the change of the center frequency of the matching network, but only one capacitance of the circuit is adjustable, so that only the right zero point of the S parameter is changed with the frequency, and the adjustment flexibility is not high.
In summary, the problems with the prior art are: the MEMS circuit influences the integration level of the system, the switch cannot realize continuous frequency adjustment, single variable capacitance adjustment flexibility is low, and the like.
Disclosure of Invention
The invention aims to provide an adjustable matching network which is simple in structure and easy to realize, and an amplifier which is low in cost, small in size, high in integration level, high in flexibility and continuously adjustable in frequency and is based on the network.
The technical solution for realizing the purpose of the invention is as follows: a capacitance-inductance-capacitance adjustable matching network, the center frequency of which is adjustable, and which can realize the impedance matching of the input end and the output end;
the adjustable matching network comprises a first variable capacitor, a first inductor and a second variable capacitor which are sequentially connected in series, wherein the other end of the first variable capacitor is used as an input end or an output end of the adjustable matching network, meanwhile, the common end of the first inductor and the second variable capacitor is used as the output end or the input end of the adjustable matching network, and the other end of the second variable capacitor is grounded; the first variable capacitor and the second variable capacitor are respectively used for adjusting the left zero point and the right zero point of the S parameter, so that the tuning of the center frequency of the adjustable matching network is realized.
Further, the first variable capacitor and the second variable capacitor are both MOS varactors.
Further, the first variable capacitance (C v1 ) And a second variable capacitance (C v2 ) Obtaining a linear numerical relation through curve fitting:
C (v2) ＝aC (v1) +b
wherein C is (v2) 、C (v1) Respectively the second variable capacitance (C v2 ) A first variable capacitor (C v1 ) And a and b are coefficients after curve fitting.
A frequency tunable amplifier, comprising: the amplifying circuit is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at both the input end and the output end of the amplifying circuit, and the capacitance-inductance-capacitance adjustable matching network is arranged at the input end and the output end of the amplifying circuit;
when the capacitance-inductance-capacitance adjustable matching network is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit, the frequency adjustable amplifier also comprises a broadband matching network arranged at the output end of the amplifying circuit or at the input end of the amplifying circuit;
the capacitance-inductance-capacitance adjustable matching network is arranged at the input end of the amplifying circuit and is used for realizing impedance matching of a signal source and the input end of the amplifying circuit, and the broadband matching network is used for realizing broadband impedance matching of the output end of the amplifying circuit and a load; when the broadband matching network is arranged at the output end of the amplifying circuit, the broadband matching network is used for realizing the impedance matching of the output end of the amplifying circuit and the load, and simultaneously, the broadband matching network is used for realizing the broadband impedance matching of the signal source and the input end of the amplifying circuit; when the power amplifier is arranged at the input end and the output end of the amplifying circuit, the power amplifier is respectively used for realizing impedance matching of a signal source and the input end of the amplifying circuit and impedance matching of the output end of the amplifying circuit and a load;
the amplifying circuit is used for amplifying the signal.
Further, the amplifying circuit includes: the first-stage amplifying circuit is used for carrying out first-stage amplification on the signals; and the second-stage amplifying circuit is used for carrying out second-stage amplification on the signals.
Further, the first-stage amplifying circuit and the second-stage amplifying circuit both adopt a common-emitter common-base structure.
Further, the first-stage amplifying circuit comprises a first transistor, a second transistor, a third inductor and a first capacitor; the collector of the first transistor is connected with the emitter of the second transistor through a third inductor, and the collector of the second transistor is connected with the collector voltage V c1 One end of the first capacitor is grounded, the other end of the first capacitor is connected with the base electrode of the second transistor, the emitter electrode of the first transistor is grounded, and the base electrode of the first transistor is connected with the output end of the capacitor-inductor-capacitor adjustable matching network or the broadband matching network through the second inductor.
Further, the second-stage amplifying circuit comprises a third transistor, a fourth inductor and a third capacitor; the collector of the third transistor is connected with the emitter of the fourth transistor through a fourth inductor, and the collector of the fourth transistor is connected with the collector voltage V c2 And the input end of the capacitance-inductance-capacitance adjustable matching network or the broadband matching network, one end of the third capacitor is grounded, the other end of the third capacitor is connected with the base electrode of the fourth transistor, the emitter electrode of the third transistor is grounded, and the base electrode of the third transistor is connected with the collector electrode of the second transistor through the second capacitor.
Further, the broadband matching network comprises a fourth capacitor, a fifth inductor and a fifth capacitor, the fourth capacitor and the fifth capacitor are connected in series, a common end of the fourth capacitor and the fifth capacitor is grounded through the fifth inductor, and the other end of the fourth capacitor and the other end of the fifth capacitor are respectively used as an input end and an output end of the broadband matching network.
Compared with the prior art, the invention has the remarkable advantages that: 1) The capacitance-inductance-capacitance adjustable matching network only adopts one series capacitance, one series inductance and one capacitance connected to the ground in parallel, so that the central frequency of the matching network can be changed along with the change of two capacitance values, the purpose of adjustable frequency of the amplifier is achieved, and the structure is simple and easy to realize; 2) The two capacitors in the capacitance-inductance-capacitance adjustable matching network are realized by MOS varactors, and the capacitance value is continuously changed along with the voltage, so that the continuous adjustment of frequency can be realized, and the capacitance-inductance-capacitance adjustable matching network is compatible with the process of an amplifier, has small circuit area and high integration level; 3) The two MOS varactors can respectively adjust the left zero point and the right zero point of the S parameter curve, have high adjustment flexibility, and can adopt a curve fitting method for the two MOS varactors, so that the two MOS varactors are controlled by the same voltage, and are easy to operate when adjusting the frequency; 4) The common-emitter common-base amplifying structure formed by the two transistors and the peaking inductor improves the isolation of the input and output ports and the high-frequency gain at the same time, so that the peak gain of the amplifier in each working frequency band tends to be consistent, and the gain flatness is high; 5) The broadband matching network adopts two series capacitors and one parallel inductor to realize broadband matching, so that the output port can obtain good matching in a broadband, and the structure is simple.
The invention is described in further detail below with reference to the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of a tunable capacitor-inductor-capacitor matching network and a tunable frequency amplifier according to one embodiment.
FIG. 2 is a graph showing the results of two variable capacitance curve fits in one embodiment.
FIG. 3 shows a first variable capacitance C in a capacitance-inductance-capacitance tunable matching network in one embodiment v1 Is a structural diagram of (a).
FIG. 4 is a schematic diagram of a capacitance-inductance-capacitance tunable matching network in one embodimentSecond variable capacitor C in the network v2 Is a structural diagram of (a).
Fig. 5 is a diagram showing simulation results of the frequency-tunable amplifiers S11 and S21 in one embodiment.
Fig. 6 is a diagram showing simulation results of the frequency-tunable amplifier S22 in one embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.
In one embodiment, in conjunction with fig. 1, a capacitance-inductance-capacitance tunable matching network is provided, the center frequency of which is tunable and which enables impedance matching of the input and output terminals;
an adjustable matching network comprising a first variable capacitor C connected in series in turn v1 First inductor L 1 And a second variable capacitance C v2 A first variable capacitor C v1 The other end of the first inductance L is used as the input end or the output end of the adjustable matching network 1 And a second variable capacitor C v2 As the output or input of the tunable matching network, a second variable capacitor C v2 The other end of the first electrode is grounded; wherein the first variable capacitance C v1 And a second variable capacitance C v2 The method is used for adjusting the left zero point and the right zero point of the S parameter respectively, and further achieving tuning of the center frequency of the adjustable matching network.
Here, the capacitance-inductance-capacitance tunable matching network can realize the change of high and low impedance at different center frequencies, namely, the matching network can be used for realizing the high resistance R H Becomes low resistance R L And when the capacitance value in the matching network changes, the center frequency of the matching network changes accordingly. The specific principle is as follows: from the network structure, it is calculated that:
as can be seen from formula (1), when R L And R is H To determine the value C v2 Uniquely determined by ω, with ω=2pi f, i.e. C v2 The change in (2) will result in a change in frequency, and as can be seen from equation (2), when L 1 Also when determining, C v1 With C only v2 And (3) a change. So for the tunable matching network, C can be changed simultaneously v1 And C v2 To achieve adjustment of the center frequency of the network.
Further preferably, in one of the embodiments, the first variable capacitor C v1 And a second variable capacitance C v2 And MOS varactors are adopted.
Further, in one embodiment, the first variable capacitor C v1 And a second variable capacitance C v2 Obtaining a linear numerical relation through curve fitting:
C (v2) ＝aC (v1) +b
wherein C is (v2) 、C (v1) Respectively the second variable capacitance (C v2 ) A first variable capacitor (C v1 ) And a and b are coefficients after curve fitting.
By adopting the scheme of the embodiment, the central frequency of the whole matching network can be controlled by using a uniform voltage, and the operation is easy.
As a specific example, for C v1 And C v2 Curve fitting was performed and the fitting results are shown in fig. 2. During the fitting process, the series inductance L is changed 1 To change C by a value of (2) v1 To a certain extent, thereby changing the slope and correlation coefficient of the fitting, and finally selecting L through multiple attempts 1 1.85nH, the result of the fitting at this time is: c (C) v2 ＝0.343C v1 +80 (fF). This means C v2 Three C's can be used v1 The capacitor is connected in series and then connected in parallel with a capacitor of 80fF, as shown in FIG. 3, which shows the use of two MOS varactors MOSVAR1 and MOSVAR1MOSVAR2 and a bias resistor R 0 First variable capacitance C implemented v1 FIG. 4 shows the use of three identical first variable capacitors C v1 A second variable capacitor C formed by serially connecting and parallelly connecting a capacitor of 80fF v2 。
In one embodiment, in conjunction with fig. 1, there is provided a frequency tunable amplifier comprising: the amplifying circuit is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at both the input end and the output end of the amplifying circuit, and the capacitance-inductance-capacitance adjustable matching network 1;
when the capacitance-inductance-capacitance adjustable matching network 1 is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit, the frequency adjustable amplifier also comprises a broadband matching network 4 which is arranged at the output end of the amplifying circuit or at the input end of the amplifying circuit;
the capacitance-inductance-capacitance adjustable matching network 1 is arranged at the input end of the amplifying circuit and is used for realizing impedance matching of a signal source and the input end of the amplifying circuit, and the broadband matching network 4 is used for realizing broadband impedance matching of the output end of the amplifying circuit and a load; when the broadband matching network 4 is arranged at the output end of the amplifying circuit, the broadband matching network 4 is used for realizing the broadband impedance matching of the signal source and the input end of the amplifying circuit; when the power amplifier is arranged at the input end and the output end of the amplifying circuit, the power amplifier is respectively used for realizing impedance matching of a signal source and the input end of the amplifying circuit and impedance matching of the output end of the amplifying circuit and a load;
and the amplifying circuit is used for amplifying the signal.
Here, the center frequency of the capacitance-inductance-capacitance adjustable matching network is adjustable, so that the tuning of the working frequency of the amplifier can be realized.
Further, in one embodiment, in conjunction with fig. 1, the amplifying circuit includes: a first-stage amplification circuit 2 for performing first-stage amplification on a signal; a second-stage amplifying circuit 3 for performing second-stage amplification on the signal.
Further, in one embodiment, the first stage amplifying circuit 2 and the second stage amplifying circuit 3 each adopt a cascode structure with peaking inductance.
Further, in one embodiment, the first stage amplifying circuit 2 includes a first transistor M 1 Second transistor M 2 Third inductance L 3 And a first capacitor C 1 The method comprises the steps of carrying out a first treatment on the surface of the First transistor M 1 Through the third inductance L 3 And a second transistor M 2 Emitter of the second transistor M is connected to 2 Is connected to the collector voltage V c1 First capacitor C 1 One end of the second transistor M is grounded 2 Is connected to the base of the first transistor M 1 Is grounded to the emitter of the first transistor M 1 Through the base electrode of the second inductance L 2 Is connected with the output end of the capacitance-inductance-capacitance adjustable matching network 1 or the broadband matching network 4.
Here, a second inductance L is provided between the capacitance-inductance-capacitance adjustable matching network 1 and the first stage amplification circuit 2 2 To balance the amplifier input reactance.
Further, in one embodiment, the second stage amplifying circuit 3 includes a third transistor M 3 Fourth transistor M 4 Fourth inductance L 4 Third capacitor C 3 The method comprises the steps of carrying out a first treatment on the surface of the Third transistor M 3 Through the collector of the fourth inductance L 4 And a fourth transistor M 4 Emitter of the fourth transistor M 4 Collector connection collector voltage V c2 And the input end of the capacitance-inductance-capacitance adjustable matching network 1 or the broadband matching network 4, a third capacitance C 3 One end of the transistor is grounded, the other end is connected with the fourth transistor M 4 Is connected to the base of the third transistor M 3 The emitter of the third transistor M is grounded 3 Through a second capacitor C 2 And a second transistor M 2 Is connected to the collector of the (c).
Here, a second capacitor C is provided between the first-stage amplification circuit 2 and the second-stage amplification circuit 3 2 For achieving level-spacing straightness.
By adopting the scheme of the embodiment, the common-emitter common-base structure can optimize the reverse isolation and properly improve the output impedance. At the same time, the base of the common-base amplifier is grounded through a capacitor, so that the upper and lower amplitude of the output voltage of the common-base amplifier is obviously larger than that of a single transistor. In addition, the addition of the peaking inductor can effectively improve the high-frequency gain, so that the peak gain of the amplifier in each working frequency band tends to be consistent, and the gain flatness is improved.
Exemplary preferred in one embodiment, the transistors described above are HBT transistors using a 0.18um SiGe BiCMOS process.
Further, in one embodiment, the broadband matching network 4 includes a fourth capacitor C 4 Fifth inductance L 5 And a fifth capacitor C 5 Fourth capacitor C 4 And a fifth capacitor C 5 A fourth capacitor C connected in series 4 And a fifth capacitor C 5 Through a fifth inductance L 5 Grounded, fourth capacitor C 4 And a fifth capacitor C 5 The other end of which serves as an input and an output of the broadband matching network 4, respectively.
By adopting the scheme of the embodiment, the whole broadband matching network 4 adopts simple multi-stage lumped elements to realize broadband matching, has simple structure and is easy to realize.
As a specific example, HBT tube hss122_p2 with a emitter junction length of 9.9um and an emitter junction width of 0.2um was selected for the design of the frequency tunable amplifier. In the output part of the circuit, the 6-16GHz broadband matching is tried, and in the matching process, a 400fF capacitor is connected in series, and then an inductor of 1.85nH to the ground is connected in parallel. The simulation of S parameter is carried out on the frequency-adjustable amplifier in the example, the simulation diagrams are shown in fig. 5 and 6, and when the control voltage Vctrl of the varactor is changed from-1V to 1V, the center frequency of the circuit is changed from 7.9GHz to 11.7GHz, S11 is below-18 dB, S22 is below-15 dB, gains are all greater than 15dB, and the tuning range is 38%.
In summary, the capacitance-inductance-capacitance adjustable matching network provided by the invention has a simple structure, can realize continuous adjustment of the center frequency of the matching network, can control two varactors by using the same voltage through curve fitting, and is easy to operate when adjusting the frequency. In addition, the frequency adjustable amplifier designed by utilizing the capacitance-inductance-capacitance adjustable matching network has the characteristics of simple structure, high adjustment flexibility, large tuning range and the like, and has better performance, smaller circuit whole area and high integration level.
Claims (5)
1. A frequency tunable amplifier, comprising: the amplifying circuit is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at both the input end and the output end of the amplifying circuit, and the capacitance-inductance-capacitance adjustable matching network (1);
when the capacitance-inductance-capacitance adjustable matching network (1) is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit, the frequency adjustable amplifier also comprises a broadband matching network (4) arranged at the output end of the amplifying circuit or at the input end of the amplifying circuit;
the capacitance-inductance-capacitance adjustable matching network (1) is arranged at the input end of the amplifying circuit and is used for realizing impedance matching of a signal source and the input end of the amplifying circuit, and the broadband matching network (4) is used for realizing broadband impedance matching of the output end of the amplifying circuit and a load; when the broadband matching network is arranged at the output end of the amplifying circuit, the broadband matching network is used for realizing impedance matching of the output end of the amplifying circuit and a load, and the broadband matching network (4) is used for realizing broadband impedance matching of a signal source and the input end of the amplifying circuit; when the power amplifier is arranged at the input end and the output end of the amplifying circuit, the power amplifier is respectively used for realizing impedance matching of a signal source and the input end of the amplifying circuit and impedance matching of the output end of the amplifying circuit and a load;
the amplifying circuit is used for amplifying the signals;
the capacitance-inductance-capacitance adjustable matching network has adjustable center frequency and can realize impedance matching of an input end and an output end;
the tunable matching network comprises a first variable capacitor (C v1 ) First inductor (L) 1 ) And a second variable capacitance (C v2 ) The first variable capacitance (C v1 ) Is used as the input or output of the tunable matching network, while the first inductance (L 1 ) And second (b)Variable capacitor (C) v2 ) As output or input of the tunable matching network, a second variable capacitance (C v2 ) The other end of the first electrode is grounded; wherein the first variable capacitance (C v1 ) And a second variable capacitance (C v2 ) The system is used for adjusting the left zero point and the right zero point of the S parameter respectively, so as to realize the tuning of the center frequency of the adjustable matching network;
the amplifying circuit comprises the following components in sequence: a first-stage amplification circuit (2) for performing first-stage amplification on a signal; a second-stage amplification circuit (3) for performing second-stage amplification on the signal;
the first stage amplification circuit (2) includes a first transistor (M 1 ) A second transistor (M 2 ) Third inductance (L) 3 ) And a first capacitor (C 1 ) The method comprises the steps of carrying out a first treatment on the surface of the The first transistor (M 1 ) Through the third inductance (L 3 ) And a second transistor (M 2 ) Is connected to the emitter of the second transistor (M 2 ) Is connected to the collector voltage V c1 A first capacitor (C 1 ) One end of the second transistor is grounded, the other end is connected with the second transistor (M 2 ) Is connected to the base of the first transistor (M 1 ) Is grounded, a first transistor (M 1 ) Through the base of the second inductor (L 2 ) The output end of the broadband matching network (4) is connected with the output end of the capacitance-inductance-capacitance adjustable matching network (1);
the second stage amplifying circuit (3) comprises a third transistor (M) 3 ) Fourth transistor (M) 4 ) Fourth inductance (L) 4 ) A third capacitor (C 3 ) The method comprises the steps of carrying out a first treatment on the surface of the The third transistor (M 3 ) Through the collector of the fourth inductor (L 4 ) And a fourth transistor (M 4 ) Is connected to the emitter of the fourth transistor (M 4 ) Collector connection collector voltage V c2 And an input of a capacitance-inductance-capacitance tunable matching network (1) or a broadband matching network (4), a third capacitance (C 3 ) One end of the transistor is grounded, the other end is connected with a fourth transistor (M 4 ) Is connected to the base of the third transistor (M 3 ) Is grounded, a third transistor (M 3 ) Through a second capacitor (C) 2 ) And a second transistor (M 2 ) Is connected with the collector of the capacitor;
the broadband matching network (4) comprises a fourth capacitor (C 4 ) Fifth inductance (L) 5 ) And a fifth capacitor (C 5 ) The fourth capacitor (C 4 ) And a fifth capacitor (C 5 ) Are connected in series, a fourth capacitor (C 4 ) And a fifth capacitor (C 5 ) Through a fifth inductance (L 5 ) Grounded, fourth capacitor (C 4 ) And a fifth capacitance (C) 5 ) The other end of the (C) is respectively used as an input end and an output end of the broadband matching network (4).
2. A frequency tunable amplifier according to claim 1, characterized in that the first variable capacitance (C v1 ) And a second variable capacitance (C v2 ) And MOS varactors are adopted.
3. A frequency tunable amplifier according to claim 1 or 2, characterized in that the first variable capacitance (C v1 ) And a second variable capacitance (C v2 ) Obtaining a linear numerical relation through curve fitting:
C (v2) ＝aC (v1) +b
wherein C is (v2) 、C (v1) Respectively the second variable capacitance (C v2 ) A first variable capacitor (C v1 ) And a and b are coefficients after curve fitting.
4. A frequency tunable amplifier according to claim 1, characterized in that the first stage amplifying circuit (2) and the second stage amplifying circuit (3) each adopt a cascode structure.
5. The frequency tunable amplifier of claim 1, wherein the transistors are HBT transistors of 0.18um SiGe BiCMOS technology.
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| CN101523759A (en) * | 2006-10-02 | 2009-09-02 | 施克莱无线公司 | Centralized wireless communication system |
| CN103380576A (en) * | 2010-11-08 | 2013-10-30 | 黑莓有限公司 | Method and appartus for tuning antennas in a communication device |
| CN105529997A (en) * | 2014-10-16 | 2016-04-27 | 恩智浦有限公司 | Automatic impedance adjustment |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101523759A (en) * | 2006-10-02 | 2009-09-02 | 施克莱无线公司 | Centralized wireless communication system |
| CN103380576A (en) * | 2010-11-08 | 2013-10-30 | 黑莓有限公司 | Method and appartus for tuning antennas in a communication device |
| CN105529997A (en) * | 2014-10-16 | 2016-04-27 | 恩智浦有限公司 | Automatic impedance adjustment |
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| CN111181501A (en) | 2020-05-19 |
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