CN111181501B - Capacitor-inductor-capacitor adjustable matching network and frequency adjustable amplifier - Google Patents

Abstract

The invention discloses a capacitance-inductance-capacitance adjustable matching network and a frequency adjustable amplifier, wherein the center frequency of the network is adjustable, and the impedance matching of an input end and an output end can be realized. The network comprises a first variable capacitor, a first inductor and a second variable capacitor which are sequentially connected in series, wherein the other end of the first variable capacitor is used as an input end or an output end of the network, meanwhile, the common end of the first inductor and the second variable capacitor is used as the output end or the input end of the network, and the other end of the second variable capacitor is grounded. The network has simple structure, can realize continuous adjustment of the central frequency of the matching network, can control two varactors by using the same voltage through curve fitting, and is easy to operate when adjusting the frequency. The frequency-adjustable amplifier is based on the design of a capacitance-inductance-capacitance adjustable matching network, has the characteristics of simple structure, high adjustment flexibility, large tuning range and the like, has better performance, and has smaller circuit whole area and high integration level.

Description

Capacitor-inductor-capacitor adjustable matching network and frequency adjustable amplifier

technical field

The invention belongs to the field of radio frequency integrated circuits, in particular to a capacitance-inductance-capacitance adjustable matching network and an adjustable frequency amplifier.

Background technique

The development trend of modern microwave systems is high performance and low cost, so devices that can work in multiple frequency bands are often selected to complete the design. The adjustable frequency amplifier can make the amplifier work in different frequency bands by adding a control voltage. It can reduce equipment costs while being compatible with different communication standards and meeting the needs of different application scenarios. It is suitable for low-cost, small-volume, and highly-integrated systems. design. At present, the common method of designing a frequency adjustable amplifier is to load an adjustable matching network on the input or output port. These adjustable matching networks are mostly realized by switches, and the values of the passive components in the matching circuit are changed by switching the switch on and off.

Document 1 (J.Busquere, K.Grenier, D.Dubuc, E.Fourn, P.Ancey and R.Plana, "MEMSIC concept for Reconfigurable Low Noise Amplifier," 2006 European Microwave Conference, Manchester, 2006, pp.1358-1361 .) by using the on-off of the MEMS switch to design a MEMS tuning device with variable capacitance, so that the device presents different capacitance values in the case of on-off of the switch, so as to realize the matching of the matching network at different center frequencies. In addition, the A MEMS switch is used to switch between the two output matching networks. However, it can only switch between two frequency bands, and the application range is very limited, and MEMS cannot be integrated with the amplifier circuit, which also limits the integration degree of the circuit.

Document 2 (R.Malmqvist et al., "RF MEMS based impedance matching networks for tunable multi-band microwave low noise amplifiers," 2009 International Semiconductor Conference, Sinaia, 2009, pp.303-306.) also uses single-ended and A differential matching network is used to realize the frequency tunability of the LNA. However, it uses 2-bit MEMS switches to obtain variable capacitive loads. The two MEMS single-ended matching networks designed and processed can achieve 10% and 13% adjustment ranges at around 25GHz, respectively. However, the 2-bit MEMS switch can only switch the frequency bands in 4 states, and the loss introduced is 1.5dB-2.0dB.

D.Fritsche,C.Carta and F.Ellinger,"A Passive TunableMatching Filter for Multiband RF Applications Demonstrated at 7to 14GHz,"inIEEE Microwave and Wireless Components Letters,vol.27,no.8,pp.703-705,Aug.2017.)利用CMOS开关实现可重构放大器，其提出可以实现高低阻抗变化的电感-电感-电容(LLC)匹配网络，其中的电容是通过4个MOS开关和普通电容构成的数字可变电容，通过四个控制电压控制MOS开关的通断，可以实现16种不同的容值组合，从而控制匹配网络中心频率的改变，但电路只有一个电容可调，故只有S参数的右边零点随频率变化，调节灵活度不高。Document 3 (P.

D.Fritsche, C.Carta and F.Ellinger, "A Passive TunableMatching Filter for Multiband RF Applications Demonstrated at 7to 14GHz," in IEEE Microwave and Wireless Components Letters, vol.27, no.8, pp.703-705, Aug. 2017.) Using CMOS switches to realize reconfigurable amplifiers, it proposes an inductance-inductance-capacitance (LLC) matching network that can achieve high and low impedance changes, in which the capacitor is a digital variable capacitor composed of four MOS switches and ordinary capacitors. Through four control voltages to control the on-off of the MOS switch, 16 different capacitance combinations can be realized, thereby controlling the change of the center frequency of the matching network, but the circuit has only one adjustable capacitor, so only the right zero point of the S parameter changes with the frequency. Adjustment flexibility is not high.

In short, the problems in the prior art are: the MEMS circuit affects the integration of the system, the switch cannot realize the continuous adjustment of the frequency, and the adjustment flexibility of a single variable capacitor is low.

Contents of the invention

The object of the present invention is to provide an adjustable matching network with simple structure and easy realization, and an amplifier based on the network with low cost, small volume, high integration, high flexibility and continuously adjustable frequency.

The technical solution to realize the object of the present invention is: a capacitance-inductance-capacitance adjustable matching network, the central frequency of the network is adjustable, and the impedance matching between the input end and the output end can be realized;

The adjustable matching network includes a first variable capacitor, a first inductor and a second variable capacitor connected in series in sequence, and the other end of the first variable capacitor is used as the input or output end of the adjustable matching network , while the common end of the first inductance and the second variable capacitor is used as the output or input end of the adjustable matching network, and the other end of the second variable capacitor is grounded; wherein, the first variable capacitor and the second The variable capacitors are respectively used to adjust the left zero point and the right zero point of the S parameter, thereby realizing the tuning of the central frequency of the adjustable matching network.

Further, both the first variable capacitor and the second variable capacitor use MOS varactors.

Further, the first variable capacitance (C _v1 ) and the second variable capacitance (C _v2 ) obtain a linear numerical relationship through curve fitting:

C _(v2) = aC _(v1) + b

In the formula, C _(v2) and C _(v1) are the capacitance values of the second variable capacitor (C _v2 ) and the first variable capacitor (C _v1 ), respectively, and a and b are coefficients after curve fitting.

A frequency adjustable amplifier, comprising: an amplifying circuit, and a capacitance-inductance-capacitance adjustable matching network arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at both the input end and the output end of the amplifying circuit;

When the capacitance-inductance-capacitance adjustable matching network is set at the input end of the amplifying circuit or at the output end of the amplifying circuit, the adjustable frequency amplifier also includes a broadband matching network set at the output end of the amplifying circuit or at the input end of the amplifying circuit ;

The capacitance-inductance-capacitance adjustable matching network is used to realize the impedance matching between the signal source and the input end of the amplifying circuit when it is set at the input end of the amplifying circuit, and the broadband matching network is used to realize the broadband impedance matching between the output end of the amplifying circuit and the load ;When it is set at the output end of the amplifying circuit, it is used to realize the impedance matching between the output end of the amplifying circuit and the load, and the broadband matching network is used to realize the broadband impedance matching between the signal source and the input end of the amplifying circuit; when it is set at the input end and the output end of the amplifying circuit , which are respectively used to achieve impedance matching between the signal source and the input end of the amplifier circuit, and impedance matching between the output end of the amplifier circuit and the load;

The amplifying circuit is used to amplify the signal.

Further, the amplifying circuit includes sequentially arranged: a first-stage amplifying circuit for performing one-stage amplifying of the signal; a second-stage amplifying circuit for performing two-stage amplifying of the signal.

Further, both the first-stage amplifying circuit and the second-stage amplifying circuit adopt a cascode structure.

Further, the first-stage amplifying circuit includes a first transistor, a second transistor, a third inductor and a first capacitor; the collector of the first transistor is connected to the emitter of the second transistor through the third inductor, and the second The collector of the transistor is connected to the collector voltage V _c1 , one end of the first capacitor is connected to the ground, the other end is connected to the base of the second transistor, the emitter of the first transistor is connected to the ground, and the base of the first transistor is connected to the capacitor through the second inductor. - the output terminals of the inductance-capacitance adjustable matching network or the broadband matching network are connected.

Further, the second-stage amplifying circuit includes a third transistor, a fourth transistor, a fourth inductor, and a third capacitor; the collector of the third transistor is connected to the emitter of the fourth transistor through the fourth inductor, and the fourth The collector of the transistor is connected to the collector voltage V _c2 and the input terminal of the capacitance-inductance-capacitance adjustable matching network or the broadband matching network, one end of the third capacitor is grounded, and the other end is connected to the base of the fourth transistor, and the third transistor The emitter is grounded, and the base of the third transistor is connected to the collector of the second transistor through the second capacitor.

Further, the broadband matching network includes a fourth capacitor, a fifth inductor, and a fifth capacitor, the fourth capacitor and the fifth capacitor are connected in series, the common terminal of the fourth capacitor and the fifth capacitor is grounded through the fifth inductor, and the fifth capacitor The other end of the four capacitors and the other end of the fifth capacitor serve as the input end and the output end of the broadband matching network respectively.

Compared with the prior art, the present invention has the remarkable advantages as follows: 1) The adjustable capacitance-inductance-capacitance matching network only adopts a series capacitor, a series inductor and a capacitor connected in parallel to the ground to realize the center frequency of the matching network It changes with the change of the two capacitance values, so as to achieve the purpose of adjustable frequency of the amplifier. The value changes continuously with the voltage, so that the frequency can be continuously adjusted, and it is compatible with the amplifier process, the circuit area is small, and the integration is high; 3) Two MOS varactors can adjust the left and right zero points of the S parameter curve respectively, and the adjustment is flexible High precision, and the method of curve fitting can be used for two MOS varactors, so that it can be controlled by the same voltage, and it is easy to operate when adjusting the frequency; 4) Cascode amplification structure composed of two transistors and peaking inductors , while improving the isolation of the input and output ports, the high-frequency gain is improved, so that the peak gain of the amplifier in each operating frequency band tends to be consistent, and the gain flatness is high; 5) The broadband matching network is realized by two series capacitors and a parallel inductor Broadband matching enables the output port to be well matched within a wide frequency band, and the structure is simple.

The present invention will be described in further detail below in conjunction with the accompanying drawings.

Description of drawings

FIG. 1 is a schematic diagram of an adjustable capacitance-inductor-capacitance matching network and an adjustable frequency amplifier in one embodiment.

Fig. 2 is a schematic diagram of curve fitting results of two variable capacitance values in an embodiment.

FIG. 3 is a structural diagram of the first variable capacitor C _v1 in the capacitance-inductance-capacitance adjustable matching network in one embodiment.

FIG. 4 is a structural diagram of the second variable capacitor C _v2 in the capacitance-inductance-capacitance adjustable matching network in one embodiment.

Fig. 5 is a diagram of simulation results of frequency adjustable amplifiers S11 and S21 in one embodiment.

FIG. 6 is a simulation result diagram of the frequency adjustable amplifier S22 in one embodiment.

Detailed ways

In order to make the purpose, technical solution and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present application, and are not intended to limit the present application.

In one embodiment, with reference to FIG. 1, a capacitance-inductance-capacitance adjustable matching network is provided, the center frequency of the network is adjustable, and impedance matching between the input end and the output end can be realized;

The adjustable matching network includes a first variable capacitor C _v1 , a first inductor L ₁ and a second variable capacitor C _v2 connected in series in sequence, and the other end of the first variable capacitor C _v1 is used as an input end of the adjustable matching network or output terminal, while the common terminal of the first inductance L ₁ and the second variable capacitor C _v2 is used as the output terminal or input terminal of the adjustable matching network, and the other end of the second variable capacitor C _v2 is grounded; wherein, the first variable The capacitor C _v1 and the second variable capacitor C _v2 are respectively used to adjust the left zero point and the right zero point of the S parameter, thereby realizing the tuning of the center frequency of the adjustable matching network.

Here, the capacitance-inductance-capacitance adjustable matching network can realize the change of high and low impedance at different center frequencies, that is, through this matching network, the high resistance R _H can be changed into a low resistance R _L , and when the capacitance value in the matching network When changing, the center frequency of the matching network changes accordingly. The specific principle is: according to the network structure, it can be obtained by calculation:

It can be known from formula (1) that when _RL and R _H are definite values, C _v2 is uniquely determined by ω, and ω=2πf, that is, the change of C _v2 will lead to the change of frequency, and it can be seen from formula (2) that when When L ₁ is also determined, C _v1 only varies with C _v2 . Therefore, for the adjustable matching network, the center frequency of the network can be adjusted by changing the values of C _v1 and C _v2 at the same time.

Further preferably, in one of the embodiments, both the first variable capacitor C _v1 and the second variable capacitor C _v2 use MOS varactors.

Further, in one of the embodiments, the above-mentioned first variable capacitor C _v1 and second variable capacitor C _v2 obtain a linear numerical relationship through curve fitting:

C _(v2) = aC _(v1) + b

In the formula, C _(v2) and C _(v1) are the capacitance values of the second variable capacitor (C _v2 ) and the first variable capacitor (C _v1 ), respectively, and a and b are coefficients after curve fitting.

With the solution of this embodiment, a unified voltage can be used to control the center frequency of the entire matching network, which is easy to operate.

As a specific example, curve fitting is performed on _Cv1 and _Cv2 , and the fitting result is shown in FIG. 2 . During the fitting process, the variation range of C _v1 is changed by changing the value of the series inductance L ₁ , thereby changing the fitting slope and correlation coefficient to a certain extent. After many attempts, the final selected L ₁ is 1.85nH, The fitting result at this time is: C _v2 =0.343C _v1 +80(fF). This means that C _v2 can be approximated by using three C _v1 capacitors connected in series and then connected in parallel with an 80fF capacitor. As shown in Figure 3, the first realized by using two MOS varactors MOSVAR1 and MOSVAR2 and a bias resistor R ₀ A variable capacitor C _v1 , FIG. 4 shows a second variable capacitor C _v2 composed of three identical first variable capacitors C _v1 connected in series and a capacitor of 80 fF in parallel.

In one embodiment, with reference to FIG. 1 , a frequency adjustable amplifier is provided, including: an amplifying circuit, and a capacitor arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at the same time at the input end and the output end of the amplifying circuit - adjustable inductance-capacitance matching network 1;

When the capacitance-inductance-capacitance adjustable matching network 1 is set at the input end of the amplifying circuit or at the output end of the amplifying circuit, the adjustable frequency amplifier also includes a broadband matching network 4 set at the output end of the amplifying circuit or at the input end of the amplifying circuit;

The capacitance-inductance-capacitance adjustable matching network 1 is used to realize the impedance matching between the signal source and the input end of the amplifying circuit when it is set at the input end of the amplifying circuit, and the broadband matching network 4 is used to realize the broadband impedance matching between the output end of the amplifying circuit and the load When it is set at the output end of the amplifying circuit, it is used to realize the impedance matching between the output end of the amplifying circuit and the load, and the broadband matching network 4 is used to realize the broadband impedance matching between the signal source and the input end of the amplifying circuit; it is set at the input end and the output end of the amplifying circuit When , it is used to realize the impedance matching of the signal source and the input end of the amplifier circuit, and the impedance matching between the output end of the amplifier circuit and the load;

The amplification circuit is used to amplify the signal.

Here, the center frequency of the capacitance-inductance-capacitance adjustable matching network can be adjusted to realize the tuning of the working frequency of the amplifier.

Further, in one of the embodiments, with reference to FIG. 1, the above-mentioned amplifying circuit includes sequentially arranged: a first-stage amplifying circuit 2, which is used to amplify the signal at one level; a second-stage amplifying circuit 3, which is used to amplify the signal Perform secondary amplification.

Further, in one of the embodiments, both the first-stage amplifying circuit 2 and the second-stage amplifying circuit 3 adopt a cascode structure with a peaking inductance.

Further, in one of the embodiments, the first-stage amplifying circuit 2 includes a first transistor M ₁ , a second transistor M ₂ , a third inductor L ₃ and a first capacitor C ₁ ; the collector of the first transistor M ₁ The emitter of the second transistor _M2 is connected through the third inductor _L3 , the collector of the second transistor _M2 is connected to the collector voltage V _c1 , one end of the first capacitor _C1 is grounded, and the other end is connected to the second transistor _M2 The base of the first transistor _M1 is connected to the ground, the base of the first transistor _M1 is connected to the output terminal of the capacitance-inductance-capacitance adjustable matching network ₁ or the broadband matching network 4 through the second inductor L2.

Here, a second inductance L ₂ is provided between the capacitance-inductance-capacitance adjustable matching network 1 and the first-stage amplifying circuit 2 to balance the input reactance of the amplifier.

Further, in one of the embodiments, the second-stage amplifying circuit 3 includes a third transistor M ₃ , a fourth transistor M ₄ , a fourth inductor L ₄ , and a third capacitor C ₃ ; the collector of the third transistor M ₃ The emitter of the fourth transistor _M4 is connected through the fourth inductance _L4 , and the collector of the fourth transistor _M4 is connected to the collector voltage _Vc2 and the input end of the capacitance-inductance-capacitance adjustable matching network 1 or broadband matching network 4 , one end of the third capacitor _C3 is grounded, the other end is connected to the base of the fourth transistor _M4 , the emitter of the third transistor _M3 is grounded, the base of the third transistor _M3 is connected to the second capacitor _C2 through the second The collector of transistor _M2 is connected.

Here, a second capacitor C ₂ is provided between the first-stage amplifying circuit 2 and the second-stage amplifying circuit 3 to realize straight-stage spacing.

By adopting the solutions of the above embodiments, the cascode structure can optimize the reverse isolation and appropriately increase the output impedance. At the same time, the base of the common-base amplifier is grounded through a capacitor, so that the amplitude of its output voltage is significantly larger than that of a single transistor. In addition, adding a peaking inductor can effectively increase the high-frequency gain, so that the peak gain of the amplifier in each operating frequency band tends to be consistent, and the gain flatness is improved.

Exemplarily preferably, in one of the embodiments, the above-mentioned transistors all adopt HBT transistors of 0.18um SiGe BiCMOS process.

Further, in one of the embodiments, the above broadband matching network 4 includes a fourth capacitor C ₄ , a fifth inductor L ₅ and a fifth capacitor C ₅ , the fourth capacitor C ₄ and the fifth capacitor C ₅ are connected in series, and the fourth The common end of the capacitor _C4 and the fifth capacitor _C5 is grounded through the fifth inductor _L5 , and the other end of the fourth capacitor _C4 and the fifth capacitor _C5 serve as the input end and the output end of the broadband matching network 4 respectively.

With the solution of this embodiment, the entire broadband matching network 4 uses simple multi-level lumped elements to realize broadband matching, which has a simple structure and is easy to implement.

As a specific example, an HBT tube hss122_p2 with an emitter junction length of 9.9um and an emitter junction width of 0.2um is selected to design a frequency-tunable amplifier. In the output part of the circuit, try to match it with a 6-16GHz broadband. In the matching process, first connect a 400fF capacitor in series, and then connect a 1.85nH inductor in parallel to the ground. S-parameter simulation is performed on the frequency adjustable amplifier in this example. The simulation diagrams are shown in Figure 5 and Figure 6. It can be seen from the figure that when the control voltage Vctrl of the varactor changes from -1V to 1V, the center frequency of the circuit changes from 7.9 GHz changes to 11.7GHz, during this process, S11 is below -18dB, S22 is below -15dB, the gain is greater than 15dB, and the tuning range reaches 38%.

In summary, the capacitance-inductance-capacitance adjustable matching network proposed by the present invention has a simple structure and can realize continuous adjustment of the center frequency of the matching network, and through curve fitting, two varactors can be controlled with the same voltage. Easy to operate when adjusting the frequency. In addition, the frequency-tunable amplifier designed by using the capacitance-inductance-capacitance adjustable matching network has the characteristics of simple structure, high adjustment flexibility, and large tuning range. It has better performance, and the overall circuit area is smaller and the integration is high .

Claims (5)

1. A frequency tunable amplifier, comprising: the amplifying circuit is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit or at both the input end and the output end of the amplifying circuit, and the capacitance-inductance-capacitance adjustable matching network (1);

when the capacitance-inductance-capacitance adjustable matching network (1) is arranged at the input end of the amplifying circuit or at the output end of the amplifying circuit, the frequency adjustable amplifier also comprises a broadband matching network (4) arranged at the output end of the amplifying circuit or at the input end of the amplifying circuit;

the capacitance-inductance-capacitance adjustable matching network (1) is arranged at the input end of the amplifying circuit and is used for realizing impedance matching of a signal source and the input end of the amplifying circuit, and the broadband matching network (4) is used for realizing broadband impedance matching of the output end of the amplifying circuit and a load; when the broadband matching network is arranged at the output end of the amplifying circuit, the broadband matching network is used for realizing impedance matching of the output end of the amplifying circuit and a load, and the broadband matching network (4) is used for realizing broadband impedance matching of a signal source and the input end of the amplifying circuit; when the power amplifier is arranged at the input end and the output end of the amplifying circuit, the power amplifier is respectively used for realizing impedance matching of a signal source and the input end of the amplifying circuit and impedance matching of the output end of the amplifying circuit and a load;

the amplifying circuit is used for amplifying the signals;

the capacitance-inductance-capacitance adjustable matching network has adjustable center frequency and can realize impedance matching of an input end and an output end;

the tunable matching network comprises a first variable capacitor (C _v1 ) First inductor (L) ₁ ) And a second variable capacitance (C _v2 ) The first variable capacitance (C _v1 ) Is used as the input or output of the tunable matching network, while the first inductance (L ₁ ) And second (b)Variable capacitor (C) _v2 ) As output or input of the tunable matching network, a second variable capacitance (C _v2 ) The other end of the first electrode is grounded; wherein the first variable capacitance (C _v1 ) And a second variable capacitance (C _v2 ) The system is used for adjusting the left zero point and the right zero point of the S parameter respectively, so as to realize the tuning of the center frequency of the adjustable matching network;

the amplifying circuit comprises the following components in sequence: a first-stage amplification circuit (2) for performing first-stage amplification on a signal; a second-stage amplification circuit (3) for performing second-stage amplification on the signal;

the first stage amplification circuit (2) includes a first transistor (M ₁ ) A second transistor (M ₂ ) Third inductance (L) ₃ ) And a first capacitor (C ₁ ) The method comprises the steps of carrying out a first treatment on the surface of the The first transistor (M ₁ ) Through the third inductance (L ₃ ) And a second transistor (M ₂ ) Is connected to the emitter of the second transistor (M ₂ ) Is connected to the collector voltage V _c1 A first capacitor (C ₁ ) One end of the second transistor is grounded, the other end is connected with the second transistor (M ₂ ) Is connected to the base of the first transistor (M ₁ ) Is grounded, a first transistor (M ₁ ) Through the base of the second inductor (L ₂ ) The output end of the broadband matching network (4) is connected with the output end of the capacitance-inductance-capacitance adjustable matching network (1);

the second stage amplifying circuit (3) comprises a third transistor (M) ₃ ) Fourth transistor (M) ₄ ) Fourth inductance (L) ₄ ) A third capacitor (C ₃ ) The method comprises the steps of carrying out a first treatment on the surface of the The third transistor (M ₃ ) Through the collector of the fourth inductor (L ₄ ) And a fourth transistor (M ₄ ) Is connected to the emitter of the fourth transistor (M ₄ ) Collector connection collector voltage V _c2 And an input of a capacitance-inductance-capacitance tunable matching network (1) or a broadband matching network (4), a third capacitance (C ₃ ) One end of the transistor is grounded, the other end is connected with a fourth transistor (M ₄ ) Is connected to the base of the third transistor (M ₃ ) Is grounded, a third transistor (M ₃ ) Through a second capacitor (C) ₂ ) And a second transistor (M ₂ ) Is connected with the collector of the capacitor;

the broadband matching network (4) comprises a fourth capacitor (C ₄ ) Fifth inductance (L) ₅ ) And a fifth capacitor (C ₅ ) The fourth capacitor (C ₄ ) And a fifth capacitor (C ₅ ) Are connected in series, a fourth capacitor (C ₄ ) And a fifth capacitor (C ₅ ) Through a fifth inductance (L ₅ ) Grounded, fourth capacitor (C ₄ ) And a fifth capacitance (C) ₅ ) The other end of the (C) is respectively used as an input end and an output end of the broadband matching network (4).

2. A frequency tunable amplifier according to claim 1, characterized in that the first variable capacitance (C _v1 ) And a second variable capacitance (C _v2 ) And MOS varactors are adopted.

3. A frequency tunable amplifier according to claim 1 or 2, characterized in that the first variable capacitance (C _v1 ) And a second variable capacitance (C _v2 ) Obtaining a linear numerical relation through curve fitting:

C _(v2) ＝aC _(v1) +b

wherein C is _(v2) 、C _(v1) Respectively the second variable capacitance (C _v2 ) A first variable capacitor (C _v1 ) And a and b are coefficients after curve fitting.

4. A frequency tunable amplifier according to claim 1, characterized in that the first stage amplifying circuit (2) and the second stage amplifying circuit (3) each adopt a cascode structure.

5. The frequency tunable amplifier of claim 1, wherein the transistors are HBT transistors of 0.18um SiGe BiCMOS technology.

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