CN111145699A - Code reading method, timing controller and computer readable storage medium - Google Patents
Code reading method, timing controller and computer readable storage medium Download PDFInfo
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- CN111145699A CN111145699A CN201911363375.3A CN201911363375A CN111145699A CN 111145699 A CN111145699 A CN 111145699A CN 201911363375 A CN201911363375 A CN 201911363375A CN 111145699 A CN111145699 A CN 111145699A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
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Abstract
The invention discloses a code reading method for a liquid crystal display, a time sequence controller and a computer readable storage medium. The code reading method comprises the following steps: the timing controller attempts to load a code stored in a memory of the source board using default settings including a driving current and a driving frequency; in the case of a loading failure, the timing controller attempts to perform an attempt of driving current matching and/or an attempt of driving frequency matching. According to the invention, the stability of loading code data by the timing controller can be improved.
Description
Technical Field
Embodiments of the present invention relate to the field of liquid crystal display technologies, and more particularly, to a code reading method for a liquid crystal display, a timing controller, and a computer-readable storage medium.
Background
Flat panel display devices such as Liquid Crystal Displays (LCDs) have advantages such as high image quality, power saving, thin body, and wide application range, and thus are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, and are becoming the mainstream of display devices.
The larger the size of the display panel of the current Thin Film Transistor (TFT) type lcd, the higher the quality and taste of the image, so the quality of the image needs to be adjusted during the production process. In designing and manufacturing a liquid crystal display, various codes, such as a code for Demura, a code for improving a Flicker phenomenon, etc., are generally stored in a memory, such as a Flash (Flash) of a source board. Each time the display panel is turned on, a timing controller, such as a timing control chip (TCON IC), included in the driving circuit of the display panel downloads the code from the source board and executes the code to perform preset image quality adjustment at the time of factory shipment.
Taking the Demura code as an example, the Demura code is used for compensating the brightness unevenness of the existing display panel. In order to solve the brightness and darkness unevenness (mura) caused by the defects on the LCD manufacturing process/device, the prior brightness and darkness unevenness compensation method is to store gray scale compensation data in a flash memory matched with a panel, then a TCON IC reads the mura compensation data stored in the flash memory, the gray scale data is input into a time schedule controller, a Demura module carries out operation according to the mura compensation data and the gray scale data to adjust a gray scale value, then the time schedule controller outputs the gray scale data after mura compensation, and the brightness of pixels is changed to achieve the brightness and darkness unevenness repairing effect. The reverse gray scale compensation value, namely Demura compensation data, of the position with uneven brightness and stored in the flash memory is negative in the area brighter than the central position of the panel, so that the gray scale value is reduced, and the display effect becomes dark; for the area darker than the central position of the panel, the compensation value is positive, and the gray scale value is improved, so that the display effect becomes brighter.
To implement a timing controller, such as a timing control chip (TCON IC), to download the code from the source board, it is currently practiced in the industry to fixedly set a set of drive currents and drive frequencies based on previous design accumulated experience. At the time of factory test of the liquid crystal display, the timing controller reads and executes such a code with such a fixed driving current and driving frequency to perform a test of the display, and if the loading and execution of the code succeeds, it indicates that the test of this portion passes.
Although the test samples of the display or display panel successfully passed the test, it does not represent that the set of conditions is suitable for all mass-produced products, nor that the products that successfully passed the test at the time of factory test are able to successfully read the code under any use environment. If the timing controller fails to successfully download the code from the source board and successfully starts the display picture quality adjustment function such as Demura and correction Flicker, it is easy to cause complaints and complaints of the display quality by the user.
The statements in the background section are merely prior art as they are known to the inventors and do not, of course, represent prior art in the field.
Disclosure of Invention
It is therefore one of the objectives of the claimed invention to solve one or more of the above problems and to improve the stability of the timing controller in reading codes from the source board.
In a first aspect, an embodiment of the present invention provides a code reading method for a liquid crystal display, including:
the timing controller attempts to load a code stored in a memory of the source board using default settings including a driving current and a driving frequency;
in the case of a loading failure, the timing controller makes an attempt of driving current matching including gradually increasing the driving current, loading the code stored in the memory using the increased driving current; and/or, the timing controller makes an attempt to match the driving frequency, including gradually decreasing the driving frequency, using the decreased driving frequency to load the code stored in the memory.
Further, the attempting of the timing controller to perform the driving current matching may include:
gradually increasing the driving current according to a preset driving current matching table, and loading codes stored in the memory by using the increased driving current, wherein the driving current matching table comprises sequentially increased driving current values; or
The drive current is gradually increased randomly, and the code stored in the memory is loaded using the increased drive current.
Further, the attempting of the timing controller to perform driving frequency matching may include:
gradually decreasing the driving frequency according to a preset driving frequency matching table, and loading the codes stored in the memory by using the decreased driving frequency, wherein the driving frequency matching table comprises a driving frequency value which is decreased once; or
The drive frequency is randomly gradually decremented, and the code stored in the memory is loaded using the decremented drive frequency.
Further, the timing controller may first make an attempt of driving current matching, and in a case where the attempt of driving current matching still fails, make an attempt of driving frequency matching. Further, after the attempt to make the driving frequency matching still fails, an alarm message may be sent.
Further, the code reading method may further include: after the codes stored in the memory are successfully loaded, the time schedule controller writes the corresponding values of the driving current and the driving frequency into the memory as default settings of the next code reading operation.
Further, the memory may be a flash memory in a source board.
In a second aspect, an embodiment of the present invention provides a timing controller for a liquid crystal display, including:
first loading means for attempting to load code stored in the memory of the source board using default settings, the default settings including a drive current and a drive frequency; and
second loading means for making an attempt of drive current matching in the event of a loading failure, including gradually increasing the drive current, using the increased drive current to load the code stored in the memory; and/or, making an attempt to drive frequency matching, including gradually decrementing the drive frequency, using the decremented drive frequency to load code stored in the memory.
In a third aspect, the present invention provides a control panel for a liquid crystal display, including the aforementioned timing controller.
In a fourth aspect, an embodiment of the present invention provides a display panel, including the foregoing control board.
In a fifth aspect, an embodiment of the invention provides a liquid crystal display, including the foregoing display panel.
In a sixth aspect, embodiments of the present invention provide a computer-readable storage medium comprising computer-executable instructions stored thereon, which when executed by a controller perform the foregoing method.
According to the embodiment of the present invention, the timing controller first attempts to load the code stored in the memory using the default setting, and in case of a loading failure, attempts to drive current matching and/or attempts to drive frequency matching are attempted, so that stability of loading code data can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the respective embodiments will be briefly introduced below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings in the following detailed description of the embodiments of the present invention without inventive efforts.
Fig. 1 schematically shows a schematic diagram of a basic application of a code reading method according to an embodiment of the present invention.
Fig. 2 schematically shows a flow chart of a code reading method according to an embodiment of the present invention.
Fig. 3 schematically shows a flow chart of a code reading method according to another embodiment of the present invention.
Fig. 4 schematically shows a block diagram of a timing controller for a liquid crystal display according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it should be apparent that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without any inventive work belong to the protection scope of the embodiments of the present invention.
In the description of the embodiments of the present invention, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the embodiments of the present invention and simplifying the description, but do not indicate or imply that the device or element referred to must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the embodiments of the present invention, "a plurality" means two or more unless specifically limited otherwise.
In the embodiments of the present invention, unless otherwise specifically stated or limited, the terms "mounted," "connected," "fixed," and the like are to be construed broadly, e.g., as meaning fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. Specific meanings of the above terms in the embodiments of the present invention can be understood by those of ordinary skill in the art according to specific situations.
In embodiments of the invention, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described as "exemplary" in the implementations of the invention is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the embodiments of the invention. In the following description, embodiments of the invention are presented for purposes of illustration and description. It will be apparent to one of ordinary skill in the art that embodiments of the present invention may be practiced without these specific details. In other instances, well-known structures and processes are not shown in detail to avoid obscuring the description of the embodiments of the invention with unnecessary detail. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed in the following embodiments.
Embodiments of the present invention provide a code reading method for a liquid crystal display, a timing controller, a control panel, a display panel, a liquid crystal display, and a computer-readable storage medium. The code reading method comprises the following steps: the timing controller attempting to load code stored in the memory using default settings including drive current and drive frequency; in the case of a loading failure, the timing controller makes an attempt of driving current matching and/or makes an attempt of driving frequency matching.
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the preferred embodiments described herein are merely illustrative and explanatory of the embodiments of the invention, and are not restrictive thereof.
In a first aspect, embodiments of the present invention provide a code reading method for a liquid crystal display.
Referring to fig. 1, fig. 1 schematically illustrates a basic application of a code reading method according to an embodiment of the present invention. The display panel or display 100 includes a timing controller 11 and a memory (or internal memory) 12. The timing controller 11 and the memory 12 are communicatively connected, for example, by a bus. The memory stores therein codes such as a code for Demura, a code for improving a picture Flicker/jitter (Flicker) phenomenon, etc., and the timing controller improves display picture quality by reading and executing the codes.
As shown, the memory 12 may be a flash memory disposed on the source board 13, but those skilled in the art will appreciate that a memory disposed in other components of the display panel or display or externally disposed, e.g., remotely disposed, outside of the display panel or display may also be utilized. The memory may be any type of memory including high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory.
The timing controller 11 performs various functional applications and data processing by reading and allowing code data stored in the memory to be executed. The timing controller may be connected to the memory using various interfaces and line connections.
The code reading method according to the embodiment of the present invention may be performed at the time of factory test of a display or at the time of power-on and power-on of a commercially available display. Since in the case of attempting to load the code stored in the memory using the default settings, the attempt to drive current matching and/or the attempt to drive frequency matching will continue until the code is successfully read. Therefore, the stability of the loaded code data can be obviously improved.
Referring to fig. 2, fig. 2 schematically shows a flowchart of a code reading method 200 according to an embodiment of the present invention. The code reading method 200 may be used for a liquid crystal display, and may include the steps of:
in step S210, the timing controller attempts to load a code stored in the memory of the source board using default settings including a driving current and a driving frequency.
In step S220, in the case of loading failure using the default configuration, the timing controller attempts driving current matching, and/or attempts driving frequency matching.
In one particular embodiment, the attempt to match the drive current may include gradually increasing the drive current, using the increased drive current to load code stored in the memory. In one particular embodiment, attempting to match the drive frequency may include gradually decrementing the drive frequency, using the decremented drive frequency to load code stored in memory.
Referring to FIG. 3, FIG. 3 schematically illustrates a flow chart of a code reading method 300 according to another embodiment of the invention. The code reading method 300 may be used for a liquid crystal display, and may include the steps of:
in step S310, the timing controller attempts to load a code stored in the memory of the source board using default settings including a driving current and a driving frequency.
In step S320, in the case of loading failure using the default configuration, the timing controller attempts an attempt of driving current matching. Attempts to make drive current matching may include gradually increasing the drive current, using the increased drive current to load the code stored in memory.
In step S330, in the case where the attempt to perform the driving current matching fails, the timing controller attempts the attempt to perform the driving frequency matching. Attempts to make drive frequency matching may include gradually decrementing the drive frequency, using the decremented drive frequency to load code stored in memory.
The reasons why the timing controller in the conventional technology fails to read the codes in the memory mainly include:
(1) drive current mismatch with line impedance: when the drive current of a fixed value in the traditional technology is set to be too small, the quality of a waveform signal of a loaded code is poor, and communication is influenced; when the driving current is set to be too large, signal reflection is caused, and the quality of a waveform signal of a loaded code is also deteriorated, so that communication is influenced.
(2) Drive frequency mismatch with line impedance: when the driving frequency of a fixed value in the traditional technology is set to be too high, the waveform shape becomes large, and the communication is influenced by the poor quality of a code-loading waveform signal; when the driving frequency is set too low, the time for loading the code is prolonged, which affects the speed of turning on the screen.
In a particular embodiment, attempting to match the drive current and attempting to match the drive frequency may include using a drive current matching table and a drive frequency matching table. The drive current matching table and the drive frequency matching table store a preset current value of a drive current attempt to be made and a frequency value of a drive frequency attempt, respectively. The drive current matching table may store progressively increasing drive current values, and the timing controller attempts to load the code stored in the memory using the increasing drive currents until the loading is successful. The driving frequency matching table may store gradually decreasing driving frequency values, and the timing controller attempts to load the codes stored in the memory using the decreasing driving frequency until the loading is successful.
In one specific embodiment, the drive current matching table includes sequentially increasing drive current values: 4mA, 10mA, 12mA and 15 mA. In one specific embodiment, the driving frequency matching table comprises sequentially decreasing driving frequency values: 30MHz, 15MHz, 9MHz and 6 MHz.
In a particular embodiment, attempting to match the drive current and attempting to match the drive frequency may include using randomly generated drive current values and drive frequency values.
In one embodiment, when attempting to load a code fails using the default settings for drive current and drive frequency, the drive current matching table and/or drive frequency matching table may be referenced, and the drive current value and/or drive frequency value closest to the default settings may be selected from the table for a subsequent read attempt.
In one embodiment, in case that the attempt for the driving current matching and/or the attempt for the driving frequency matching is successful, the timing controller writes the last driving current value and driving frequency value into the memory as the default setting of the next code reading operation.
In one embodiment, the timing controller sends an alarm to the user in case both the attempt to perform the driving current matching and the attempt to perform the driving frequency matching fail.
In a second aspect, embodiments of the present invention provide a timing controller for a liquid crystal display.
Referring to fig. 4, fig. 4 schematically shows a block diagram of a timing controller 400 for a liquid crystal display according to an embodiment of the invention. The timing controller 400 includes: first loading means 410 for attempting to load code stored in the memory using default settings including a drive current and a drive frequency; and a second loading means 420, in case of loading failure, attempting one or more of the following operations: an attempt is made to match the drive current and an attempt is made to match the drive frequency.
In a specific embodiment, the second loading means 420 is configured to gradually increase the driving current when attempting to match the driving current, and load the code stored in the memory using the increased driving current. In a specific embodiment, the second loading means 420 is configured to, when attempting to match the driving frequency, gradually decrease the driving frequency, and load the code stored in the memory using the decreased driving frequency.
In a specific embodiment, the second loading means 420 is configured to randomly increase the driving current gradually when attempting to match the driving current, and load the code stored in the memory with the increased driving current. In a specific embodiment, the second loading means 420 is configured to, in an attempt to match the driving frequency, randomly and gradually decrement the driving frequency, and load the code stored in the memory using the decremented driving frequency.
In a specific embodiment, the second loading device 420 is configured to perform the attempt of the driving current matching and the attempt of the driving frequency matching according to the driving current matching table and the driving frequency matching table.
For example, the driving current may be gradually increased according to a preset driving current matching table, and the code stored in the memory may be loaded using the increased driving current, wherein the driving current matching table includes sequentially increased driving current values; or the driving frequency may be gradually decreased according to a preset driving frequency matching table, and the code stored in the memory may be loaded using the decreased driving frequency, wherein the driving frequency matching table includes a driving frequency value that is decreased once.
In a specific embodiment, the second loading device 420 is configured to first attempt drive current matching and, in the event that the attempt to match the drive current still fails, attempt to match the drive frequency.
In a specific embodiment, the timing controller 400 may further include an alarm device for sending an alarm message after the second loading device 420 fails to perform the driving current matching and/or the driving frequency matching. Such information helps to prevent the flow of faulty display panels or displays into the market at the time of factory testing. Such information helps the user to contact the after-market service in a timely manner when used by the user.
In a specific embodiment, the timing controller 400 may further include a default setting modification means configured to write the corresponding values of the driving current and the driving frequency into the memory as a default setting for a next code reading operation after successfully loading the code stored in the memory.
It should be understood that each device recited in the timing controller 400 corresponds to each step in the methods 200 and 300 described with reference to fig. 2-3. Thus, the operations and features not specifically described above with respect to fig. 2 and 3 are equally applicable to the timing controller 400 and the devices included therein, and will not be described again here.
It should also be understood that while the timing controller 400 is typically integrated into the display panel or display, for example, into a timing control chip, the timing controller 400 may also be implemented as an accessory that is separate and sold from the display. The timing controller 400 may be implemented in various ways. For example, in some embodiments, timing controller 400 may be implemented using software and/or firmware modules. In addition, the timing controller 400 may also be implemented using hardware modules. Other ways, now known or later developed, are also feasible, and the scope of the present invention is not limited in this respect.
The hardware portion may be implemented using dedicated logic; the software portions may be stored in a memory and executed by a suitable instruction execution system, such as a microprocessor or specially designed hardware. Those skilled in the art will appreciate that the apparatus and methods described above may be implemented using computer executable instructions and/or embodied in processor control code, such code being provided on a carrier medium such as a disk, CD-or DVD-ROM, programmable memory such as read only memory (firmware), or a data carrier such as an optical or electronic signal carrier, for example. The apparatus and modules thereof of the present invention may be implemented by hardware circuits such as very large scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, or programmable hardware devices such as field programmable gate arrays, programmable logic devices, etc., or by software executed by various types of processors, or by a combination of hardware circuits and software, such as firmware. These are all within the scope of the present invention. The timing controller may be implemented as a control panel for a liquid crystal display, a timing control chip, a display panel, or a display.
In a third aspect, embodiments of the present invention provide a control panel for a liquid crystal display, which may include the aforementioned timing controller.
In a fourth aspect, an embodiment of the present invention provides a display panel, which includes the control board of any one of the preceding aspects.
In a fifth aspect, an embodiment of the invention provides a liquid crystal display, which includes the foregoing display panel.
In a sixth aspect, embodiments of the present invention provide a computer-readable storage medium comprising computer-executable instructions stored thereon that, when executed by a controller, perform the foregoing method.
It should be noted that although in the above detailed description a number of devices or modules are mentioned which are arranged, this division is not mandatory only. Indeed, the features and functionality of two or more of the modules described above may be embodied in one module according to embodiments of the invention. Conversely, the features and functions of one module described above may be further divided into embodiments by a plurality of modules.
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by associated hardware controlled by the instructions, which may be stored in a computer readable storage medium and loaded and executed by a processor. To this end, embodiments of the present application provide a storage medium, in which a plurality of instructions are stored, where the instructions can be loaded by a processor to execute the steps in any one of the methods for testing an antenna provided in the embodiments of the present application.
Wherein the storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
Since the instructions stored in the storage medium can execute the steps in the method for testing any antenna provided in the embodiments of the present application, the beneficial effects that can be achieved by the method for testing any antenna provided in the embodiments of the present application can be achieved, which are detailed in the foregoing embodiments and will not be described again here.
The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
The above description is only a preferred embodiment of the present invention, and should not be taken as limiting the invention, and any modifications, equivalents and simple improvements made in the spirit of the present invention should be included in the scope of the present invention.
Claims (10)
1. A code reading method for a liquid crystal display, comprising:
the timing controller attempts to load a code stored in a memory of the source board using default settings including a driving current and a driving frequency;
in the case of a loading failure, the timing controller makes an attempt of driving current matching, including gradually increasing the driving current, using the increased driving current to load the code stored in the memory; and/or, the timing controller makes an attempt to match the driving frequency, including gradually decreasing the driving frequency, using the decreased driving frequency to load the code stored in the memory.
2. The code reading method according to claim 1, wherein the attempting of the timing controller to perform the driving current matching includes:
gradually increasing the driving current according to a preset driving current matching table, and loading codes stored in the memory by using the increased driving current, wherein the driving current matching table comprises sequentially increased driving current values; or
The drive current is gradually increased randomly, and the code stored in the memory is loaded using the increased drive current.
3. The code reading method according to claim 1, wherein the attempting of the timing controller to perform the driving frequency matching includes:
gradually decreasing the driving frequency according to a preset driving frequency matching table, and loading codes stored in the memory by using the decreased driving frequency, wherein the driving frequency matching table comprises driving frequency values which are decreased in sequence; or
The drive frequency is randomly gradually decremented, and the code stored in the memory is loaded using the decremented drive frequency.
4. The code reading method according to any one of claims 1 to 3, wherein the timing controller first makes an attempt of drive current matching, and in a case where the attempt of drive current matching still fails, the timing controller makes an attempt of drive frequency matching.
5. The code reading method according to any one of claims 1 to 3, wherein, after successful loading of the code stored in the memory, the timing controller writes the corresponding values of the drive current and the drive frequency into the memory as default settings for a next code reading operation.
6. A timing controller for a liquid crystal display, comprising:
first loading means for attempting to load code stored in the memory of the source board using default settings, the default settings including a drive current and a drive frequency; and
second loading means for making an attempt of drive current matching in the event of a loading failure, including gradually increasing the drive current, using the increased drive current to load the code stored in the memory; and/or, making an attempt to drive frequency matching, including gradually decrementing the drive frequency, using the decremented drive frequency to load code stored in the memory.
7. The timing controller of claim 6, wherein the attempt by the second loading means to match the driving current comprises:
gradually increasing the driving current according to a preset driving current matching table, and loading codes stored in the memory by using the increased driving current, wherein the driving current matching table comprises sequentially increased driving current values; or
The drive current is gradually increased randomly, and the code stored in the memory is loaded using the increased drive current.
8. The timing controller of claim 6, wherein the second loading means attempting to match the driving frequency comprises:
gradually decreasing the driving frequency according to a preset driving frequency matching table, and loading codes stored in the memory by using the decreased driving frequency, wherein the driving frequency matching table comprises driving frequency values which are decreased in sequence; or
The drive frequency is randomly gradually decremented, and the code stored in the memory is loaded using the decremented drive frequency.
9. The timing controller according to any one of claims 6 to 8, wherein the second loading means is configured to make an attempt of driving current matching first, and to make an attempt of driving frequency matching in a case where the attempt of driving current matching still fails.
10. A computer-readable storage medium comprising computer-executable instructions stored thereon which, when executed by a controller, perform the method of any one of claims 1-5.
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