CN111126586A - Data communication circuit, electronic device, and data communication method - Google Patents
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Abstract
The embodiment of the application provides a data communication circuit, an electronic device and a data communication method, wherein the data communication circuit comprises: the device comprises a data reading device, a state storage device and a data storage device, wherein the state storage device is connected with the data reading device; the data storage device is connected with the state storage device and the data reading device and used for performing state configuration on the state storage device according to the writing progress of first data needing to be read by the data reading device, so that the state storage device indicates the data reading device to read the first data from the data storage device when the first data is written.
Description
Technical Field
The present disclosure relates to the field of data processing technologies, and in particular, to a data communication circuit, an electronic device, and a data communication method.
Background
The memory is a device for storing data or instructions, such as a non-volatile memory, e.g., a magnetic disk storage device, a flash memory device, or other volatile solid state storage device. In the related art, when other devices read data from the memory, it is necessary to repeatedly query whether the data in the memory is completely prepared in a cyclic manner through a query instruction, and when the data is completely prepared, the data is read from the memory. However, this results in significant power consumption and response time.
Disclosure of Invention
The embodiment of the application provides a data communication circuit, an electronic device and a data communication method, which can reduce the power consumption and the response time of data communication.
The embodiment of the application discloses a data communication circuit, includes:
a data reading device;
a state storage device connected to the data reading device; and
a data storage device coupled to the state storage device and the data read device for:
and configuring the state storage device according to the writing progress of the first data needing to be read by the data reading device, so that the state storage device instructs the data reading device to read the first data from the data storage device when the writing of the first data is completed.
The embodiment of the application also discloses an electronic device, which comprises a data communication circuit, wherein the data communication circuit is any one of the data communication circuits disclosed by the application.
The embodiment of the application also discloses a data communication method, which is applicable to a data communication circuit and is characterized in that the data communication circuit comprises a data reading device, a state storage device connected with the data reading device and a data storage device connected with the state storage device, and the data communication method comprises the following steps:
acquiring the writing progress of first data needing to be read by the data reading device based on the data storage device;
performing state configuration on the state storage device according to the writing progress based on the data storage device;
the data read device is instructed to read the first data from the data storage device upon completion of the first data write based on the status storage device.
In the embodiment of the application, the state of the state storage device is configured by using the data storage device according to the writing progress of the first data which needs to be read by the data reading device, so that the state storage device indicates the data reading device to read the first data from the data storage device when the writing of the first data is completed, and whether the writing of the first data in the data storage device is completed is not required to be frequently inquired in a mode of inquiring an instruction, and the purposes of saving power consumption and reducing response time can be achieved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings used in the description of the embodiments will be briefly introduced below.
Fig. 1 is a schematic diagram of a first structure of a data communication circuit according to an embodiment of the present application.
Fig. 2 is a schematic diagram of a second structure of a data communication circuit according to an embodiment of the present application.
Fig. 3 is a schematic diagram of a third structure of a data communication circuit according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of a neural network processor in the embodiment of the present application.
Fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Fig. 6 is a flowchart illustrating a data communication method according to an embodiment of the present application.
Detailed Description
The technical solution provided by the embodiment of the present application can be applied to various scenarios requiring data communication, and the embodiment of the present application is not limited thereto.
Referring to fig. 1, fig. 1 is a schematic diagram illustrating a first structure of a data communication circuit 200 according to an embodiment of the present disclosure. The data communication circuit 200 may include a data read device 210, a state storage device 220, and a data storage device 230.
The data reading device 210 may be any device capable of reading data from other devices, such as a central processing unit, a neural network processor, a digital signal processor, a direct memory access, a co-processor, a programmable processor, and the like. It should be noted that, in the embodiment of the present application, the purpose of reading data by the data reading device 210 is not limited, and the data may be read for processing by itself, or may be read and then transferred to another device.
The state storage device 220 may be any device having data caching capabilities, such as a register for storing binary data. The state storage device 220 is connected to the data reading device 210. It should be noted that the connection manner of the state storage device 220 and the data reading device 210 is not specifically limited in the present application.
The data storage device 230 may perform status configuration on the status storage device 220 according to the write progress of the first data that needs to be read by the data reading device 210, so that the status storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230 when the first data is completely written. For example, the write schedule includes write complete and write incomplete.
It should be noted that the first data only refers to data that needs to be read by the data reading device 210, and the data type of the first data is not specifically limited in this application, and the first data may be any type of data. For example, when the data reading device 210 needs to read image data from the data storage device 230 for processing, the image data is the first data, and accordingly, the data storage device 230 may perform state configuration on the state storage device 220 according to the writing progress of the image data into the data storage device 230, so that the state storage device 220 instructs the data reading device 210 to read the image data from the data storage device 230 when the writing of the image data is completed, so that the data reading device 210 may read the image data to be read from the data storage device 230 in real time according to the instruction of the state storage device 220 for subsequent processing. It should be noted that the present application is not limited to the manner in which the status storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230, for example, in the present application, the status storage device 220 may instruct the data reading device 210 to read the first data from the data storage device 230 in an interrupt manner.
Compared with the prior art, the state configuration method and the data storage device 230 have the advantages that the state configuration of the state storage device 220 is performed by the data storage device 230 according to the writing progress of the first data needing to be read by the data reading device 210, so that the data reading device 210 is instructed to read the first data from the data storage device 230 when the writing of the first data is completed by the state storage device 220, and whether the writing of the first data in the data storage device 230 is completed is not required to be frequently inquired in a mode of inquiry instructions, so that the purposes of saving power consumption and reducing response time can be achieved.
Optionally, the state memory may include a register file, also called a register file, which is an array composed of a plurality of registers, typically implemented by a fast Static Random Access Memory (SRAM). The RAM has special read ports and write ports, and can access different registers in a multi-path concurrent mode. It should be noted that the data storage device 230 uses blocks as storage units, each block includes several pages, and each page can store several bytes of data. Wherein data storage device 230 may obtain the currently configured data granularity and associate the memory blocks in data storage device 230 with the registers in the register file one-to-one according to the data granularity, whereby for any data block in data storage device 230, there is a register in the register file associated with it for recording its memory status. Herein, the Register File for recording the storage status is referred to as a Memory Enable Register File (MERF).
It should be noted that the data granularity may be configured by the data storage device 230 according to user input, for example, if the granularity of the storage block is configured to be 512 bits, if the size of the data storage device 230 is 1024 × 512 bits, that is, the data storage device 230 is divided into 1024 storage blocks, different storage blocks correspond to different addresses, and the register file correspondingly needs to include 1024 registers, so that the registers correspond to the storage blocks with 1024 addresses one to one.
Based on the association relationship between the memory blocks and the registers, when the data storage device 230 performs status configuration on the status storage device 220 according to the write progress of the first data that needs to be read by the data reading device 210, the status configuration method is specifically configured to:
when first data is written to a memory block, data storage device 230 performs state configuration on the register associated with the memory block.
For example, assuming that a "1" indicates valid, when first data is written to a memory block with an address of 0, data storage device 230 state-configures the MERF [0] register (i.e., the register associated with the memory block with an address of 0), configuring its value to a "1". Accordingly, when the value of the MERF [0] register is set to 1, the register file knows that the first data that needs to be read by the data reading device 210 is written in the data storage device 230, and can be read by the data reading device 210, and at this time, instructs the data reading device 210 to read the first data from the memory block with address 0 in the data storage device 230.
Optionally, the state storage device 220 may include a plurality of state storage areas, and the state storage areas may be physically isolated state storage areas or logically isolated state storage areas, which is not particularly limited in this application. The data storage device 230 may obtain the currently configured data granularity, and associate the memory blocks in the data storage device 230 with the state storage areas in the state storage device 220 one by one according to the data granularity, so that for any data block in the data storage device 230, a state storage area exists in the state storage device 220 and is associated with the state storage area, so as to record the storage state of the state storage area.
It should be noted that the data granularity can be configured by the data storage device 230 according to the user input, for example, if the granularity of the storage block is configured to be 512 bits, if the size of the data storage device 230 is 1024 × 512 bits, that is, the data storage device 230 is divided into 1024 storage blocks, different storage blocks correspond to different addresses, and the state storage device 220 correspondingly needs to include 1024 state storage regions, so that the state storage regions correspond to the storage blocks with 1024 addresses one to one.
Based on the association relationship between the memory block and the status storage area, when the data storage device 230 performs status configuration on the status storage device 220 according to the write progress of the first data that needs to be read by the data reading device 210, the data storage device is specifically configured to:
when the first data is written to a memory block, the data storage device 230 performs state allocation on the state storage area associated with the memory block.
For example, assuming a "1" indicates valid, when the first data is written to the memory block with address 888, the data storage device 230 configures the state storage region associated with the memory block with address 888 to a state configuration with its value configured to "1". Accordingly, when the value of the status storage area is set to 1, the status storage device 220 knows that the first data that needs to be read by the data reading device 210 is written in the data storage device 230, and can be read by the data reading device 210, and at this time, instructs the data reading device 210 to read the first data from the memory block with the address 888 in the data storage device 230.
Referring to fig. 2, fig. 2 is a schematic diagram of a second structure of a data communication circuit 200 according to an embodiment of the present disclosure. The data communication circuit 200 provided in the embodiment of the present application may include a data reading device 210, a state storage device 220, a data storage device 230, and a data providing device 240, where the data reading device 210, the state storage device 220, and the data storage device 230 may refer to the data reading device 210, the state storage device 220, and the data storage device 230 in fig. 1, respectively, and are not described herein again. Data-providing device 240 may be any device capable of writing data to data storage device 230, such as a central processing unit, a neural network processor, a digital signal processor, a direct memory access, a coprocessor, a programmable processor, or the like.
The data providing device 240 is connected to the data storage device 230 for writing the first data that the data reading device 210 needs to read to the data storage device 230.
It should be noted that the connection manner of the data providing device 240 and the data storage device 230 is not particularly limited in the present application.
In this embodiment, the data providing device 240 writes the first data that needs to be read by the data reading device 210 into the data storage device 230, and the data storage device 230 performs state configuration on the state storage device 220 according to the writing progress of the first data, so that the state storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230 when the first data is completely written, which may specifically refer to the description in the above embodiments, and is not described herein again.
In short, the present application writes, by the data providing device 240, the first data that needs to be read by the data reading device 210 into the data storage device 230 for the data reading device 210 to read during a communication process. It should be noted that in other embodiments, the identities of the data providing device 240 and the data reading device 210 may be interchanged, i.e., data is provided by the data reading device 210 for reading by the data providing device 240.
Referring to fig. 3, fig. 3 is a schematic diagram illustrating a third structure of a data communication circuit 200 according to an embodiment of the present disclosure. The difference with the data communication circuit 200 shown in fig. 2 is that in the present application the data providing means 240 is connected to the state storage means 220 in addition to the data storage means 230. It should be noted that the connection manner of the data providing device 240 and the state storage device 220 is not specifically limited in the present application.
Wherein, the data reading device 210 is further used for writing the second data which needs to be read by the data providing device 240 into the data storage device 230;
the data storage device 230 is further configured to perform a status configuration of the status storage device 220 according to the progress of writing the second data, such that the status storage device 220 instructs the data providing device 240 to read the second data from the data storage device 230 when the writing of the second data is completed.
It should be noted that the second data only refers to data that needs to be read by the data providing device 240, and the data type of the second data is not specifically limited in this application, and the second data may be any type of data. For example, when the data providing device 240 needs to read image data from the data storage device 230 for processing, the image data is the second data, and accordingly, the data storage device 230 may perform status configuration on the status storage device 220 according to the writing progress of the image data into the data storage device 230, so that the status storage device 220 instructs the data providing device 240 to read the image data from the data storage device 230 when the writing of the image data is completed, so that the data providing device 240 may read the image data needing to be read from the data storage device 230 in real time according to the instruction of the status storage device 220 for subsequent processing. It should be noted that the present application is not limited to the manner in which the status storing device 220 instructs the data providing device 240 to read the second data from the data storing device 230, for example, in the present application, the status storing device 220 may instruct the data providing device 240 to read the second data from the data storing device 230 in an interrupt manner.
Optionally, the data reading device 210, the state storage device 220, the data storage device 230, and the data providing device 240 are integrated in a neural network processor.
For example, referring to fig. 4, fig. 4 is a schematic structural diagram of a neural network processor 20, and the neural network processor 20 includes a data storage module 23, a processing module 24, a data storage module 23, a system bus interface 21, and a data moving module 22.
The convolution processing unit may also be referred to as a convolution operation unit, and the convolution processing unit may also be referred to as a convolution calculation engine. The convolution processing unit may include a plurality of multiply-Add units (MACs), the number of the multiply-Add units may be thousands, for example, the convolution processing unit may include 4096 multiply-Add units, and may be divided into 16 cells, and each Cell may calculate that the maximum element number is 256 vector inner product operations.
The vector processing unit may also be referred to as a vector calculation unit, and may also be referred to as a Single Instruction Multiple Data (SIMD) processing unit. The vector processing unit is an element-level vector calculation engine, and can process arithmetic operations such as addition, subtraction, multiplication, division and the like between conventional vectors and can also process logical operations such as AND, OR, NOT, XOR and the like of a bit level. It should be noted that the vector processing Unit according to the embodiment of the present application may also support common active function operations such as a Rectified Linear Unit (ReLU), a prilu, and the like. It should be further noted that the vector processing unit according to the embodiment of the present application may also support the nonlinear activation functions Sigmoid and Tanh by a table lookup method.
The data storage module 23 may store data such as image data, weight data, and the like. The data storage module 23 may be connected with the processing module 24, such as the data storage module 23 is connected with a convolution processing unit, a vector processing unit.
The system bus interface 21 is connected to a system bus, which may be the system bus of an electronic device such as a smartphone. The system bus interface 21 is connected to the system bus to realize data transmission between the neural network processor 20 and other processors and external memories. The system bus interface 21 may convert the internal read and write requests into bus read and write requests that conform to a bus interface protocol, such as an Advanced extensible interface (AXI) protocol.
The data transfer module 22 is connected to the system bus interface 21 and the data storage module 23, and the data transfer module 22 is used for transferring data, and may transfer external data to the data storage module 23, or may transfer data of the data storage module 23 to the outside. Such as the data mover module 22, reads data from the system bus through the system bus interface 21 and writes the data read thereto to the data storage module 23. The data moving module 22 may also transmit the data or the processing results stored in the data storage module 23 to an external memory, such as the data moving module 22 transmitting the processing results of the processing units in the processing module 24210 to the external memory. That is, the data transfer module 22 can transfer data between the internal data and the external storage through the system bus interface 21.
The data moving module 22 may be a Direct Memory Access (DMA), and may move data from one address space to another address space. The address space for data movement may be an internal memory or a peripheral interface.
In the embodiment of the present application, the data reading device 210 may be integrated in the data moving module 22 of the neural network processor 20, the data storage device 230 and the state storage device 220 may be integrated in the data storage module of the neural network processor 20, and the data providing device 240 may be integrated in the processing module 24 of the neural network processor 20.
In addition, the neural network processor 20 further includes an instruction distribution module (not shown in the figure), which may also be referred to as an instruction preprocessing module 24. Instruction dispatch module is coupled to processing module 24, which may be coupled to each of the processing units in processing module 24, such as the convolution processing unit and the vector processing unit in processing module 24. The instruction dispatch module may transmit instructions to processing module 24, i.e., the instruction dispatch module may transmit instructions to a processing unit of processing module 24.
Where instruction dispatch module may issue multiple instructions in parallel to processing module 24, such as instruction dispatch module may issue multiple instructions in parallel to convolution processing units and vector processing units. For example, the instruction dispatch module may issue multiple instructions in parallel to the convolution processing unit and the vector processing unit in one clock cycle. Therefore, the embodiment of the application can support the operation of multiple transmitting instructions, and can simultaneously and efficiently execute a plurality of instructions, such as a convolution processing unit and a vector processing unit which can respectively execute a convolution calculation instruction and a vector calculation instruction. After the convolution processing unit and the vector processing unit receive the instruction, the convolution processing unit and the vector processing unit process the received data according to the instruction to obtain a processing result.
Alternatively, the data reading device 210 may be integrated in a central processing unit, the data providing device 240 may be integrated in a neural network processor, and the data storage device 230 and the state storage device 220 may be integrated in both the central processing unit and the neural network processor, which is not particularly limited in this application.
Referring to fig. 5, fig. 5 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. The electronic device includes a data communication circuit 200, and for the data communication circuit 200, reference may be specifically made to relevant contents in the above embodiments, and details are not described here.
The present application further provides a data communication method, please refer to fig. 6, the flow of the data communication method may be as follows:
in 101, a write schedule of first data that needs to be read by the data reading device 210 is obtained based on the data storage device 230.
It should be noted that the data communication method provided in the present application is based on the data communication circuit 200 shown in fig. 1, and the data communication circuit 200 includes a data reading device 210, a state storage device 220, and a data storage device 230.
The data reading device 210 may be any device capable of reading data from other devices, such as a central processing unit, a neural network processor, a digital signal processor, a direct memory access, a co-processor, a programmable processor, and the like. It should be noted that, in the embodiment of the present application, the purpose of reading data by the data reading device 210 is not limited, and the data may be read for processing by itself, or may be read and then transferred to another device.
The state storage device 220 may be any device having data caching capabilities, such as a register for storing binary data. The state storage device 220 is connected to the data reading device 210. It should be noted that the connection manner of the state storage device 220 and the data reading device 210 is not specifically limited in the present application.
The first data only refers to data that needs to be read by the data reading device 210, and the data type of the first data is not specifically limited in this application. For example, when the data reading device 210 needs to read image data from the data storage device 230 for processing, the image data is the first data.
In the embodiment of the present application, the data storage device 230 first detects the write progress of the first data to obtain the write progress of the first data. For example, the write schedule includes write complete and write incomplete.
In 102, the status storage device 220 is status configured according to a write schedule based on the data storage device 230.
Wherein the data storage device 230 may perform the status configuration of the status storage device 220 based on a write progress of the first data write to the data storage device 230.
At 103, the state based storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230 upon completion of the first data write.
Wherein the status storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230 when the first data writing is completed according to the status configuration, so that the data reading device 210 can read the first data to be read from the data storage device 230 in real time according to the instruction of the status storage device 220 for subsequent processing. It should be noted that the present application is not limited to the manner in which the status storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230, for example, in the present application, the status storage device 220 may instruct the data reading device 210 to read the first data from the data storage device 230 in an interrupt manner.
Optionally, in this embodiment of the present application, the state memory may include a register file, which is an array composed of a plurality of registers and is usually implemented by a fast Static Random Access Memory (SRAM). The RAM has special read ports and write ports, and can access different registers in a multi-path concurrent mode. It should be noted that the data storage device 230 uses blocks as storage units, each block includes several pages, and each page can store several bytes of data. Based on this, the data communication method provided by the present application further includes:
(1) obtaining a data granularity of a current configuration of the data storage device 230, and associating storage blocks in the data storage device 230 with registers in a register file one by one according to the data granularity;
the status storage device 220 is status configured according to a write schedule based on the data storage device 230, including:
(2) when first data is written to a memory block, the state configuration is performed for the registers associated with the memory block based on the data storage device 230.
Wherein data storage device 230 may obtain the currently configured data granularity and associate the memory blocks in data storage device 230 with the registers in the register file one-to-one according to the data granularity, whereby for any data block in data storage device 230, there is a register in the register file associated with it for recording its memory status. Herein, the register file for recording the storage status is referred to as a Memory Enable Register File (MERF).
It should be noted that the data granularity may be configured by the data storage device 230 according to user input, for example, if the granularity of the storage block is configured to be 512 bits, if the size of the data storage device 230 is 1024 × 512 bits, that is, the data storage device 230 is divided into 1024 storage blocks, different storage blocks correspond to different addresses, and the register file correspondingly needs to include 1024 registers, so that the registers correspond to the storage blocks with 1024 addresses one to one.
Based on the association relationship between the memory blocks and the registers established above, when the data storage device 230 performs status configuration on the status storage device 220 according to the write progress of the first data that needs to be read by the data reading device 210, if the first data is written into a memory block, the data storage device 230 performs status configuration on the registers associated with the memory block.
For example, assuming that a "1" indicates valid, when first data is written to a memory block with an address of 0, data storage device 230 state-configures the MERF [0] register (i.e., the register associated with the memory block with an address of 0), configuring its value to a "1". Accordingly, when the value of the MERF [0] register is set to 1, the register file knows that the first data that needs to be read by the data reading device 210 is written in the data storage device 230, and can be read by the data reading device 210, and at this time, instructs the data reading device 210 to read the first data from the memory block with address 0 in the data storage device 230.
Optionally, in this embodiment of the application, the state storage device 220 may include a plurality of state storage areas, and the state storage areas may be physically isolated state storage areas or logically isolated state storage areas, which is not particularly limited in this application. Based on this, the data communication method provided by the present application further includes:
(1) obtaining the currently configured data granularity of the data storage device 230, and associating the storage blocks in the data storage device 230 with the state storage areas in the state storage device 220 one by one according to the data granularity;
the status storage device 220 is status configured according to a write schedule based on the data storage device 230, including:
(2) when first data is written to a memory block, the state allocation is performed for the state storage area associated with the memory block based on the data storage device 230.
The data storage device 230 may obtain the currently configured data granularity, and associate the memory blocks in the data storage device 230 with the state storage areas in the state storage device 220 one by one according to the data granularity, so that for any data block in the data storage device 230, a state storage area exists in the state storage device 220 and is associated with the state storage area, so as to record the storage state of the state storage area.
It should be noted that the data granularity can be configured by the data storage device 230 according to the user input, for example, if the granularity of the storage block is configured to be 512 bits, if the size of the data storage device 230 is 1024 × 512 bits, that is, the data storage device 230 is divided into 1024 storage blocks, different storage blocks correspond to different addresses, and the state storage device 220 correspondingly needs to include 1024 state storage regions, so that the state storage regions correspond to the storage blocks with 1024 addresses one to one.
Based on the association relationship between the memory blocks and the status storage areas, when the data storage device 230 performs status configuration on the status storage device 220 according to the write progress of the first data that needs to be read by the data reading device 210, if the first data is written into a memory block, the data storage device 230 performs status configuration on the status storage area associated with the memory block.
For example, assuming a "1" indicates valid, when the first data is written to the memory block with address 888, the data storage device 230 configures the state storage region associated with the memory block with address 888 to a state configuration with its value configured to "1". Accordingly, when the value of the status storage area is set to 1, the status storage device 220 knows that the first data that needs to be read by the data reading device 210 is written in the data storage device 230, and can be read by the data reading device 210, and at this time, instructs the data reading device 210 to read the first data from the memory block with the address 888 in the data storage device 230.
Optionally, in this embodiment of the present application, the data communication circuit 200 further includes a data providing device 240 connected to the data storage device 230, and based on this, the data communication method further includes:
the first data is written to the data storage device 230 based on the data providing device 240.
Referring to fig. 2, the data communication circuit 200 according to the embodiment of the present disclosure may include a data reading device 210, a state storage device 220, a data storage device 230, and a data providing device 240, where the data reading device 210, the state storage device 220, and the data storage device 230 may respectively refer to the data reading device 210, the state storage device 220, and the data storage device 230 in fig. 1, and details thereof are not repeated here. Data-providing device 240 may be any device capable of writing data to data storage device 230, such as a central processing unit, a neural network processor, a digital signal processor, a direct memory access, a coprocessor, a programmable processor, or the like.
The data providing device 240 is connected to the data storage device 230 for writing the first data that the data reading device 210 needs to read to the data storage device 230.
It should be noted that the connection manner of the data providing device 240 and the data storage device 230 is not particularly limited in the present application.
In this embodiment, the data providing device 240 writes the first data that needs to be read by the data reading device 210 into the data storage device 230, and the data storage device 230 performs state configuration on the state storage device 220 according to the writing progress of the first data, so that the state storage device 220 instructs the data reading device 210 to read the first data from the data storage device 230 when the first data is completely written, which may specifically refer to the description in the above embodiments, and is not described herein again.
In short, the present application writes, by the data providing device 240, the first data that needs to be read by the data reading device 210 into the data storage device 230 for the data reading device 210 to read during a communication process. It should be noted that in other embodiments, the identities of the data providing device 240 and the data reading device 210 may be interchanged, i.e., data is provided by the data reading device 210 for reading by the data providing device 240.
Optionally, in this embodiment of the present application, the data providing device 240 is further connected to the state storage device 220, and based on this, the data communication method provided by the present application further includes:
(1) writing second data, which the data providing device 240 needs to read, to the data storage device 230 based on the data reading device 210;
(2) acquiring a write progress according to the second data based on the data storage device 230;
(3) performing status configuration on the status storing means 220 based on the data storing means 230 according to the write progress of the second data;
(4) the state-based storage device 220 instructs the data-providing device 240 to read the second data from the data storage device 230 when the second data write is completed.
Referring to fig. 3, the difference with the data communication circuit 200 shown in fig. 2 is that in the present application, the data providing device 240 is connected to the state storage device 220 in addition to the data storage device 230. It should be noted that the connection manner of the data providing device 240 and the state storage device 220 is not specifically limited in the present application.
Wherein, the data reading device 210 is further used for writing the second data which needs to be read by the data providing device 240 into the data storage device 230;
the data storage device 230 is further configured to perform a status configuration of the status storage device 220 according to the progress of writing the second data, such that the status storage device 220 instructs the data providing device 240 to read the second data from the data storage device 230 when the writing of the second data is completed.
It should be noted that the second data only refers to data that needs to be read by the data providing device 240, and the data type of the second data is not specifically limited in this application, and the second data may be any type of data. For example, when the data providing device 240 needs to read image data from the data storage device 230 for processing, the image data is the second data, and accordingly, the data storage device 230 may perform status configuration on the status storage device 220 according to the writing progress of the image data into the data storage device 230, so that the status storage device 220 instructs the data providing device 240 to read the image data from the data storage device 230 when the writing of the image data is completed, so that the data providing device 240 may read the image data needing to be read from the data storage device 230 in real time according to the instruction of the status storage device 220 for subsequent processing. It should be noted that the present application is not limited to the manner in which the status storing device 220 instructs the data providing device 240 to read the second data from the data storing device 230, for example, in the present application, the status storing device 220 may instruct the data providing device 240 to read the second data from the data storing device 230 in an interrupt manner.
The data communication circuit 200, the electronic device, and the data communication method provided in the embodiment of the present application are described in detail above. The principles and implementations of the present application are described herein using specific examples, which are presented only to aid in understanding the present application. Meanwhile, for those skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (10)
1. A data communication circuit, comprising:
a data reading device;
a state storage device connected to the data reading device; and
a data storage device coupled to the state storage device and the data read device for:
and configuring the state storage device according to the writing progress of the first data needing to be read by the data reading device, so that the state storage device instructs the data reading device to read the first data from the data storage device when the writing of the first data is completed.
2. The data communication circuit of claim 1, wherein the state storage device comprises a register file, the data storage device further to:
acquiring the currently configured data granularity, and associating the storage blocks of the data storage device with the registers in the register file one by one according to the data granularity;
when the state storage device is configured according to the writing progress of the first data needing to be read by the data reading device, the data storage device is used for:
when the first data is written into a memory block, the state configuration is carried out on the register associated with the memory block.
3. The data communication circuit of claim 1, wherein the state storage device comprises a plurality of state storage regions, the data storage device further configured to:
acquiring the currently configured data granularity, and associating the storage blocks of the data storage device with the state storage areas one by one according to the data granularity;
when the state storage device is configured according to the writing progress of the first data needing to be read by the data reading device, the data storage device is used for:
and when the first data is written into a memory block, performing state configuration on a state storage area associated with the memory block.
4. The data communication circuit of claim 1, further comprising a data providing device coupled to the data storage device, the data providing device configured to write the first data to the data storage device.
5. The data communication circuit of claim 4, wherein the data providing device is further connected to the status storage device, and the data reading device is further configured to write second data to be read by the data providing device into the data storage device;
the data storage device is further used for carrying out state configuration on the state storage device according to the writing progress of the second data, so that the state storage device instructs the data supply device to read the second data from the data storage device when the writing of the second data is completed.
6. The data communication circuit of claim 5, wherein the data reading device, the state storage device, the data storage device, and the data providing device are integrated in a neural network processor.
7. The data communication circuit of claim 5, wherein the data reading device is integrated in a central processor and the data providing device is integrated in a neural network processor.
8. An electronic device comprising a data communication circuit, the data communication circuit being as claimed in any one of claims 1 to 7.
9. A data communication method applied to a data communication circuit, wherein the data communication circuit includes a data reading device, a state storage device connected to the data reading device, and a data storage device connected to the state storage device, the data communication method comprising:
acquiring the writing progress of first data needing to be read by the data reading device based on the data storage device;
performing state configuration on the state storage device according to the writing progress based on the data storage device;
the data read device is instructed to read the first data from the data storage device upon completion of the first data write based on the status storage device.
10. The data communication method according to claim 8, wherein the status storage device comprises a register file, and before the data storage device obtains the write progress of the first data that needs to be read by the data reading device, the method further comprises:
acquiring the currently configured data granularity, and associating the storage blocks of the data storage device with the registers in the register file one by one according to the data granularity;
the status configuring of the status storage device based on the data storage device according to the write progress comprises:
when the first data is written to a memory block, a state configuration is performed on registers associated with the memory block based on the data storage device.
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