CN111025114A

CN111025114A - Full-automatic testing arrangement of integrated circuit high frequency electric parameter characteristic

Info

Publication number: CN111025114A
Application number: CN201911345128.0A
Authority: CN
Inventors: 游诗勇
Original assignee: Fujian Fushun Semiconductor Manufacturing Co ltd
Current assignee: Fujian Fushun Semiconductor Manufacturing Co ltd
Priority date: 2019-12-24
Filing date: 2019-12-24
Publication date: 2020-04-17
Anticipated expiration: 2039-12-24
Also published as: CN111025114B

Abstract

The invention discloses a full-automatic testing device for high-frequency electrical parameter characteristics of an integrated circuit, which comprises a testing machine and a testing board card, wherein the testing board card is connected with the testing machine, the testing board card comprises a CD4069 inverter, a triode Q1, a triode Q2 and a CD4541 counter, a pin 1 of the CD4069 inverter is connected with a resistor R1, the other end of the resistor R1 is connected with a capacitor C1 and a resistor R2, the other end of the resistor R2 is connected with a pin 2 of the CD4069 inverter and a pin 3 of the CD4069 inverter, the other end of the capacitor 1 is connected with a pin 4 of the CD4069 inverter and a pin 5 of the CD4069 inverter, and a pin6 of the CD4069 inverter is connected with a base of the triode Q1 and a base of the triode Q2.

Description

Full-automatic testing arrangement of integrated circuit high frequency electric parameter characteristic

Technical Field

The invention relates to the technical field of circuit testing, in particular to a full-automatic testing device for high-frequency electrical parameter characteristics of an integrated circuit.

Background

The high speed switching characteristics of MOSFETs are very sensitive to the presence of stray components (capacitance, inductance and resistance impedance) on the test circuit. The result is that devices with the same switching data nevertheless receive different switching times which are not interpretable. ESR is affected by gate processing techniques such as polysilicon doping concentration, metallization, contact resistance, etc., all of which affect high speed switching performance. A significant increase in ESR is usually caused by slight variations in the process. Therefore, ESR measurement provides a test technique for measuring the consistency of high-speed switching.

The invention is mainly used for testing the switching characteristic of the MOSFET under high-frequency signals (mainly 1 MHZ), and can be used for mass production tests by judging whether the device can normally switch at high frequency or not, adjusting the frequency through CD4069 RC and matching with a DTS-1000 tester.

Disclosure of Invention

The present invention is directed to a fully automatic testing apparatus for high frequency electrical parameter characteristics of an integrated circuit, so as to solve the above problems in the prior art.

In order to achieve the purpose, the invention provides the following technical scheme:

a full-automatic test device for high-frequency electrical parameter characteristics of an integrated circuit comprises a test machine and a test board card, wherein the test board card is connected with the test machine, the test board card comprises a CD4069 inverter, a triode Q1, a triode Q2 and a CD4541 counter, a pin 1 of the CD4069 inverter is connected with a resistor R1, the other end of the resistor R1 is connected with a capacitor C1 and a resistor R2, the other end of the resistor R2 is connected with a pin 2 of the CD4069 inverter and a pin 3 of the CD4069 inverter, the other end of the capacitor 1 is connected with a pin 4 of the CD4069 inverter and a pin 5 of the CD4069 inverter, a pin6 of the CD4069 inverter is connected with a base of the triode Q1 and a base of a triode Q2, a pin 14 of the CD4069 inverter is connected with a power supply VCC, pins 8-13 of the CD4069 inverter are all grounded, a collector of a triode Q1 is connected with a collector of the triode Q2 and the power supply VCC, an emitter, the other end of the resistor R4 is grounded, the other end of the resistor R5 is connected with the grid electrode of the MOS tube NMOS-2, the source electrode of the MOS tube NMOS-2 is grounded, the drain electrode of the MOS tube NMOS-2 is connected with the resistor R6 and the pin 3 of the CD4541 counter, the pins 5-7 of the CD4541 counter are grounded, the pins 12-14 of the CD4541 counter are connected with a power supply VCC, and the pin8 of the CD4541 counter outputs a test result signal to the tester.

As a further technical scheme of the invention: the test machine adopts a DTS-1000 mass production test machine.

As a further technical scheme of the invention: the DTS-1000 mass production testing machine comprises a host and an Interface communication card, wherein the host is used for testing various electrical parameters of an IC.

As a further technical scheme of the invention: the model of the triode Q1 is 2N7002Z _ TO 92.

As a further technical scheme of the invention: the model of the triode Q2 is 2N7002Z _ TO 92.

As a further technical scheme of the invention: the output signal of the CD4069 inverter is a 1Mhz high-frequency driving signal.

As a further technical scheme of the invention: after electrification, a 1Mhz high-frequency driving signal is generated through a CD4069 phase inverter, the driving capability is improved through the output of a triode Q1 and a triode Q2 to drive an NMOS-2 of an MOS tube, the NMOS-2 of the MOS tube normally outputs a square wave signal, a high level is output in PIN8 after the counting of a CD4541 counter and fed back to a DTS-1000 test host, and if the CD4541 cannot receive the high level, the DUT MOSFET cannot normally perform switching action under 1 MHZ.

Compared with the prior art, the invention has the beneficial effects that: the invention tests the high-frequency working characteristic of the MOSFET with the lowest cost, combines with the DTS-1000 tester, can be used for high-efficiency test of mass production, and greatly reduces the maintenance cost.

Drawings

Fig. 1 is a circuit diagram of a test board.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Example 1: referring to fig. 1, a full-automatic testing device for high-frequency electrical parameter characteristics of an integrated circuit comprises a testing machine and a testing board card, wherein the testing board card is connected with the testing machine, the testing board card comprises a CD4069 inverter, a triode Q1, a triode Q2 and a CD4541 counter, a pin 1 of the CD4069 inverter is connected with a resistor R1, the other end of the resistor R1 is connected with a capacitor C1 and a resistor R2, the other end of the resistor R2 is connected with a pin 2 of the CD4069 inverter and a pin 3 of the CD4069 inverter, the other end of the capacitor 1 is connected with a pin 4 of the CD4069 inverter and a pin 5 of the CD4069 inverter, a pin6 of the CD4069 inverter is connected with a base of a triode Q1 and a base of a triode Q2, a pin 14 of the CD4069 inverter is connected with a power VCC, pins 8-13 of the CD4069 inverter are all grounded, a collector of the triode Q1 is connected with a collector of the triode Q, The device comprises a resistor R4 and a resistor R5, the other end of the resistor R4 is grounded, the other end of the resistor R5 is connected with the grid electrode of a MOS transistor NMOS-2, the source electrode of the MOS transistor NMOS-2 is grounded, the drain electrode of the MOS transistor NMOS-2 is connected with a resistor R6 and a pin 3 of a CD4541 counter, pins 5-7 of the CD4541 counter are grounded, pins 12-14 of the CD4541 counter are connected with a power supply VCC, and a pin8 of the CD4541 counter outputs a test result signal to a tester. CD4069 is a conventional 6-way inverter, and the design is applied to 3 sets of inverters, and finally a square wave output is formed at PIN6, the test frequency can be adjusted through R1/R2/C1, after the DUT output is counted by a CD4541 counter, an output is generated at PIN8, and if the output is high, the normal operation is indicated. The count period is set for high by a & B.

The specific working principle is as follows: after the power is on, a 1Mhz high-frequency driving signal is generated through the CD4069 and is output through the 2N7002Z, the driving capability is improved to drive the DUT MOSFET, the DUT MOSFET normally outputs a square wave signal, after the count of the CD4541, a high level is output at the PIN8 and is fed back to the DTS-1000 test host. If the CD4541 counter cannot receive the high level, the DUT MOSFET cannot normally perform the switching operation at 1MHZ, and the high-frequency response is not qualified. The test item runs a VOUT test item of the DTS-1000, a 10V DC main power supply provided by power supply is accessed through an external RY K308 CA, after passing through a test platelet circuit, a CD4541 output signal is fed back to a TE end of the DTS-1000 through a K308 CB, a test host judges whether the signal is larger than 8V or not after AD conversion is carried out on the signal, and if the signal is larger than 8V, the signal is PASS; if the voltage is less than 8V, the voltage is Fail.

Example 2: on the basis of example 1, the test machine: the test machine is a DTS-1000 mass production test machine, which is a conventional system and mainly comprises two modules.

A host computer: and testing various electrical parameters of the IC through a program. The test program is software written according to the requirements of different integrated circuit chips, can detect the electrical parameters of the tested chip item by item, can be recorded as a special data file in real time, and can be converted into an XLS file after the test is finished.

Interface communication card: there are two main aspects, the first: since the test program is regarded as the software required for completing the test, the test host and the test board are the hardware required for completing the test, how the hardware accepts the command of the software, and the two cooperate with each other to achieve the purpose of rapidly and accurately testing and classifying the chips, namely, signals are transmitted through the communication card, including SOT (start of test), EOT (end of test), SORT (debugging) and the like; secondly, the method comprises the following steps: and collecting the test data and results to the PC, and storing the test data and results as a data file.

It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.

Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art.

Claims

1. A full-automatic testing device for high-frequency electrical parameter characteristics of an integrated circuit comprises a testing machine and a testing board card, wherein the testing board card is connected with the testing machine, and the full-automatic testing device is characterized in that the testing board card comprises a CD4069 inverter, a triode Q1, a triode Q2 and a CD4541 counter, a pin 1 of the CD4069 inverter is connected with a resistor R1, the other end of a resistor R1 is connected with a capacitor C1 and a resistor R2, the other end of a resistor R2 is connected with a pin 2 of the CD4069 inverter and a pin 3 of the CD4069 inverter, the other end of the capacitor 1 is connected with a pin 4 of the CD4069 inverter and a pin 5 of the CD4069 inverter, a pin6 of the CD4069 inverter is connected with a base of a triode Q1 and a base of a triode Q2, a pin 14 of the CD4069 inverter is connected with a power supply VCC, pins 8-13 of the CD4069 inverter are all grounded, a collector of the triode Q1 is connected, The device comprises a resistor R4 and a resistor R5, the other end of the resistor R4 is grounded, the other end of the resistor R5 is connected with the grid electrode of a MOS transistor NMOS-2, the source electrode of the MOS transistor NMOS-2 is grounded, the drain electrode of the MOS transistor NMOS-2 is connected with a resistor R6 and a pin 3 of a CD4541 counter, pins 5-7 of the CD4541 counter are grounded, pins 12-14 of the CD4541 counter are connected with a power supply VCC, and a pin8 of the CD4541 counter outputs a test result signal to a tester.

2. The apparatus of claim 1, wherein the testing machine is a DTS-1000 mass production testing machine.

3. The apparatus as claimed in claim 2, wherein the DTS-1000 mass production tester comprises a host and an Interface card for testing electrical parameters of ICs.

4. The apparatus of claim 1, wherein the transistor Q1 is 2N7002Z _ TO 92.

5. The apparatus of claim 1, wherein the transistor Q2 is 2N7002Z _ TO 92.

6. The apparatus according to claim 1, wherein the output signal of the CD4069 inverter is a 1Mhz high frequency driving signal.

7. The full-automatic test device for the high-frequency electrical parameter characteristics of the integrated circuit according to claim 2, wherein after power-on, a CD4069 inverter is used for generating a 1Mhz high-frequency driving signal, the high-frequency driving signal is output through a triode Q1 and a triode Q2, the driving capability is improved to drive a MOS transistor NMOS-2, the MOS transistor NMOS-2 normally outputs a square wave signal, the square wave signal is counted by a CD4541 counter and then a PIN8 outputs a high level, the high level is fed back to a DTS-1000 test host, and if the CD4541 counter cannot receive the high level, the DUT MOSFET cannot normally perform switching operation at 1 MHZ.