CN110873548A - Signal detector for crankshaft and camshaft of vehicle - Google Patents
Signal detector for crankshaft and camshaft of vehicle Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B7/00—Measuring arrangements characterised by the use of electric or magnetic techniques
- G01B7/003—Measuring arrangements characterised by the use of electric or magnetic techniques for measuring position, not involving coordinate determination
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B21/00—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
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- G01B21/04—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness by measuring coordinates of points
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The invention provides a signal detector for a crankshaft camshaft of a vehicle, which comprises a wireless communication module, a master control MCU and a crankshaft camshaft signal detection circuit which are sequentially connected. One end of the wireless communication module is connected with the mobile terminal. The main control MCU is connected with the other end of the wireless communication module through the first interface and is connected with the detection circuit through the second interface. The detection circuit is connected with a crankshaft camshaft sensor in the vehicle through a third interface so as to input a signal of the sensor into the detection circuit and output the signal as a stable voltage signal. The detection circuit is connected to an analog-to-digital converter interface of the master control MCU through a second interface and is a positive and negative waveform separation and amplification processing circuit so as to transmit the voltage signal to the master control MCU through the second interface after the voltage signal is subjected to positive and negative waveform separation and amplification. The detector can enable vehicle maintenance personnel to quickly know whether the crankshaft camshaft sensor works normally or not and whether the signal waveform is good or bad through the detector, and great help is provided for vehicle fault diagnosis.
Description
Technical Field
The invention relates to the field of vehicle detection, in particular to a vehicle crankshaft and camshaft signal detector for detecting the working state of a vehicle crankshaft and camshaft sensor.
Background
The vehicle crankshaft is a part which has an S shape and is connected with a vehicle engine, the piston is driven by an engine piston connecting rod to move up and down to drive the crankshaft to rotate, so that the reciprocating motion of the piston is converted into the rotating motion of the crankshaft, the translation of the original piston is converted into the rotation of the crankshaft, and the power of the engine is output. Meanwhile, the camshaft is connected to the crankshaft and is driven by the crankshaft to rotate, and the camshaft is used for opening an intake valve and an exhaust valve of the engine. Typically, the crankshaft makes two revolutions and the camshaft makes one revolution.
The generation of crankshaft and camshaft signals of a vehicle is that a Hall camshaft and a crankshaft position sensor of the vehicle generate voltage signals of a camshaft position and a crankshaft position by utilizing a Hall effect principle and transmit the voltage signals to an ECU (Electronic control unit), and the ECU acquires the crankshaft position signals to determine the ignition time and the oil injection time. The position signal of the camshaft is input into the ECU, so that the ECU can identify the compression top dead center of each cylinder, and the sequential oil injection control is carried out. Therefore, the normality or non-normality of the crankshaft and camshaft sensor signal directly affects the normal work of the engine and is a very critical component in the vehicle composition.
With the rapid development of domestic vehicles and commercial vehicles in China, the vehicle maintenance industry is continuously expanded, and the problem brought about is how to rapidly and accurately judge the fault after the vehicle has the fault. For this reason, professional inspection and maintenance equipment is urgently needed to improve the maintenance speed and the maintenance quality.
If a problem occurs in each link from generation to transmission of a crankshaft camshaft signal of a vehicle, the operation of an engine is abnormal, and therefore a device capable of quickly and accurately judging whether the crankshaft camshaft signal of the vehicle is good or bad is needed.
Disclosure of Invention
The invention provides a vehicle crankshaft camshaft signal detector which can enable vehicle maintenance personnel to quickly know whether a crankshaft camshaft sensor works normally or not and whether signal waveforms are good or not through the detector, and provides great help for vehicle fault diagnosis.
The vehicle crankshaft and camshaft signal detector comprises a wireless communication module, a main control MCU and a crankshaft and camshaft signal detection circuit which are sequentially connected. One end of the wireless communication module is connected with the mobile terminal in a wireless communication mode. The master control MCU is connected with the other end of the wireless communication module through a first interface and is connected with the crankshaft camshaft signal detection circuit through a second interface. The crankshaft camshaft signal detection circuit is connected with a crankshaft camshaft sensor in the vehicle ECU through a third interface so as to input a signal of the crankshaft camshaft sensor into the crankshaft camshaft signal detection circuit and output the signal as a stable voltage signal. The crankshaft camshaft signal detection circuit is connected to an analog-to-digital converter interface of the master control MCU through a second interface and is a positive and negative waveform separation and amplification processing circuit, so that the voltage signal is transmitted to the master control MCU through the second interface after being subjected to positive and negative waveform separation and amplification.
Further, the crankshaft and camshaft signal detection circuit may include a third interface, a signal level adjustment circuit, a positive-negative waveform separation circuit, a signal isolation and amplification circuit, a signal output amplitude limiting circuit, and a second interface, which are connected in sequence.
According to an embodiment of the present invention, the third interface may include a first signal input line for inputting the first signal, a second signal input line for inputting the second signal, and a ground line.
Further, the signal level adjustment circuit may include a first input signal adjustment circuit connected to the first signal input line and a second input signal adjustment circuit connected to the second signal input line.
Further optionally, the first input signal adjusting circuit includes a third resistor, a fourth resistor, and a fifth resistor, one end of the third resistor is connected to the first signal input line, the other end of the third resistor is connected in parallel to one end of the fourth resistor and one end of the fifth resistor, and the other end of the fifth resistor is grounded. The second input signal adjusting circuit comprises a twelfth resistor, a thirteenth resistor and a fourteenth resistor, one end of the twelfth resistor is connected with the second signal input line, the other end of the twelfth resistor is connected with one end of the thirteenth resistor and one end of the fourteenth resistor in parallel, and the other end of the fourteenth resistor is grounded.
According to another embodiment of the present invention, the positive and negative waveform separation circuits may include a first positive waveform separation circuit and a first negative waveform separation circuit connected to an output of the first input signal conditioning circuit, and a second positive waveform separation circuit and a second negative waveform separation circuit connected to an output of the second input signal conditioning circuit.
Further alternatively, the first forward waveform separating circuit may include a first diode and a second resistor, an anode of the first diode being connected to the output terminal of the first input signal adjusting circuit, a cathode of the first diode being connected to one end of the second resistor, and the other end of the second resistor being grounded. The first negative-going waveform separation circuit may include a fifth diode, an eighth resistor, and a seventh resistor, a cathode of the fifth diode is connected to the output terminal of the first input signal adjustment circuit, an anode of the fifth diode is connected in parallel to one end of the eighth resistor and one end of the seventh resistor, and the other end of the eighth resistor is grounded. The second forward waveform separation circuit may include a seventh diode and an eleventh resistor, an anode of the seventh diode is connected to the output terminal of the second input signal conditioning circuit, a cathode of the seventh diode is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is grounded. The second negative-going waveform separation circuit may include an eleventh diode, a seventeenth resistor, and a sixteenth resistor, a cathode of the eleventh diode is connected to the output terminal of the second input signal adjustment circuit, an anode of the eleventh diode is connected in parallel to one end of the seventeenth resistor and one end of the sixteenth resistor, and the other end of the seventeenth resistor is grounded.
According to another embodiment of the present invention, the signal isolation amplifying circuit may include a first positive-direction signal isolation amplifying circuit connected to an output terminal of the first positive-direction waveform separating circuit, a first negative-direction signal isolation amplifying circuit connected to an output terminal of the first negative-direction waveform separating circuit, a second positive-direction signal isolation amplifying circuit connected to an output terminal of the second positive-direction waveform separating circuit, and a second negative-direction signal isolation amplifying circuit connected to an output terminal of the second negative-direction waveform separating circuit.
Further alternatively, the first forward signal isolation amplifying circuit may include a first operational amplifier and a first resistor, a 3 rd pin of the first operational amplifier is connected in parallel with the output terminal of the first forward waveform separating circuit, a 4 th pin of the first operational amplifier is connected to the positive voltage power supply, a 11 th pin of the first operational amplifier is connected to the negative voltage power supply, and a 1 st pin of the first operational amplifier is connected in parallel with a 2 nd pin of the first operational amplifier and then connected to one end of the first resistor. The first negative-going signal isolation amplifying circuit may include a second operational amplifier, a sixth resistor, and a ninth resistor, wherein a 5 th pin of the second operational amplifier is grounded, a 7 th pin of the second operational amplifier is connected to one end of the ninth resistor and is connected in parallel with the sixth resistor, and the other end of the ninth resistor is connected in parallel with an output terminal of the first negative-going waveform separating circuit and a 6 th pin of the second operational amplifier. The second forward signal isolation amplifying circuit may include a third operational amplifier and a tenth resistor, a 10 th pin of the third operational amplifier is connected in parallel with an output terminal of the second forward waveform separating circuit, and an 8 th pin is connected in parallel with a 9 th pin and then connected to one end of the tenth resistor. The second negative-going signal isolation amplifying circuit may include a fourth operational amplifier, a fifteenth resistor, and an eighteenth resistor, wherein the 12 th pin of the fourth operational amplifier is grounded, the 14 th pin is connected to one end of the eighteenth resistor and is connected in parallel to one end of the fifteenth resistor, and the other end of the eighteenth resistor is connected in parallel to the 13 th pin of the fourth operational amplifier and the output end of the second negative-going waveform separating circuit.
According to another embodiment of the present invention, the second interface may include a PIN1 PIN connected to the first signal output line, a PIN2 PIN connected to the second signal output line, a PIN3 PIN connected to the third signal output line, a PIN4 PIN connected to the fourth signal output line, and a PIN5 PIN connected to the ground line.
Further optionally, the signal output limiting circuit may comprise: the input end of the first signal output amplitude limiting circuit is connected with the output end of the first forward signal isolation amplifying circuit, and the output end of the first signal output amplitude limiting circuit is connected with a PIN1 through a first signal output line; the input end of the second signal output amplitude limiting circuit is connected with the output end of the first negative-going signal isolation amplifying circuit, and the output end of the second signal output amplitude limiting circuit is connected with a PIN2 through a second signal output line; the input end of the third signal output amplitude limiting circuit is connected with the output end of the second forward signal isolation amplifying circuit, and the output end of the third signal output amplitude limiting circuit is connected with a PIN PIN3 through a third signal output line; and the input end of the fourth signal output amplitude limiting circuit is connected with the output end of the second negative-going signal isolation amplifying circuit, and the output end of the fourth signal output amplitude limiting circuit is connected with the PIN PIN4 through a fourth signal output line.
Optionally, the first signal output limiting circuit may include a second diode and a third diode, an anode of the second diode and a cathode of the third diode are connected in parallel with the output end of the first forward signal isolation amplifying circuit, a cathode of the second diode is connected to the power supply, and an anode of the third diode is grounded. The second signal output amplitude limiting circuit may include a fourth diode and a sixth diode, an anode of the fourth diode and a cathode of the sixth diode are connected in parallel with the output end of the first negative-going signal isolation and amplification circuit, a cathode of the fourth diode is connected to the power supply, and an anode of the sixth diode is grounded. The third signal output amplitude limiting circuit may include an eighth diode and a ninth diode, an anode of the eighth diode and a cathode of the ninth diode are connected in parallel with the output terminal of the second forward signal isolation amplifying circuit, a cathode of the eighth diode is connected to the power supply, and an anode of the ninth diode is grounded. The fourth signal output amplitude limiting circuit can comprise a twelfth diode and a twelfth diode, wherein the anode of the twelfth diode and the cathode of the twelfth diode are connected with the output end of the second negative-going signal isolation amplifying circuit in parallel, the cathode of the twelfth diode is connected with the power supply, and the anode of the twelfth diode is grounded.
According to an alternative embodiment of the present invention, the ADC interface may comprise four ADC interfaces for collecting the signal transmitted by the crankshaft camshaft signal detection circuit.
In addition, in an alternative embodiment, the first interface may be a serial port.
Drawings
The above and other aspects and features of the present invention will become apparent from the following description of the embodiments with reference to the accompanying drawings, in which:
FIG. 1 is a schematic structural diagram of a vehicle crankshaft and camshaft signal detector according to an embodiment of the present invention; and
FIG. 2 is a schematic diagram of a crankshaft camshaft signal detection circuit according to an exemplary embodiment of the present invention.
Detailed Description
Illustrative, non-limiting embodiments of the present invention will be described in detail below with reference to the accompanying drawings, further illustrating a vehicle crankshaft and camshaft signal detector according to the present invention.
In order to enable vehicle maintenance personnel to quickly and accurately know the working condition of a vehicle crankshaft camshaft, the invention provides a vehicle crankshaft camshaft signal detector which can diagnose whether a crankshaft camshaft sensor works normally and the quality of a signal waveform. Specifically, the vehicle crankshaft and camshaft signal detector comprises a wireless communication module, a master control MCU (micro control Unit) and a crankshaft and camshaft signal detection circuit, which are connected in sequence, as shown in fig. 1. One end of the wireless communication module is connected with the mobile terminal in a wireless communication mode to transmit data. For example, the wireless communication module may be a bluetooth module, and the mobile terminal may alternatively be a tablet, a mobile phone, or the like. The master control MCU is connected with the other end of the wireless communication module through a first interface J1 (for example, a serial port), and is connected with the crankshaft and camshaft signal detection circuit through a second interface J2. The crankshaft camshaft signal detection circuit is connected with a crankshaft camshaft sensor in the vehicle ECU through a third interface J3, so that the signal of the sensor is input into the crankshaft camshaft signal detection circuit and output as a stable and satisfactory voltage signal. The crankshaft camshaft signal detection circuit is connected to an ADC (Analog-to-Digital Converter) interface of the master control MCU through a second interface J2 and is a positive and negative waveform separation and amplification processing circuit, so that the voltage signal is transmitted to the master control MCU through the second interface J2 after being subjected to positive and negative waveform separation and amplification, and signal acquisition of the crankshaft camshaft of the vehicle is realized. The signal detector is mainly used for detecting signals of a crankshaft camshaft of a vehicle, signals of a crankshaft camshaft sensor of an ECU of the vehicle are input into the detection circuit through the connected wireless communication module, the main control MCU and the crankshaft camshaft signal detection circuit, the MCU collects the crankshaft camshaft signals, and then the collected data are transmitted to the mobile terminal through the wireless communication module to be displayed and stored in real time, so that help is provided for automobile maintenance personnel to quickly judge faults, and the maintenance is greatly facilitated.
Further, according to one embodiment, the crankshaft and camshaft signal detection circuit may include a third interface J3, a signal level adjustment circuit, a positive-negative waveform separation circuit, a signal isolation amplification circuit, a signal output amplitude limiting circuit, and a second interface J2, which are connected in sequence. Interface J3 is an input to a vehicle crankshaft camshaft for connection to a vehicle crankshaft camshaft sensor. The crankshaft camshaft signal detection circuit is a positive and negative waveform separation and amplification processing circuit of the invention and is connected with an ADC interface of the main control MCU through a second interface J2, so that signals received from the crankshaft camshaft sensor are transmitted to the main control MCU in a voltage waveform signal form after being subjected to positive and negative waveform separation and amplification, and the acquisition of the signals is realized.
In one embodiment, the third interface J3 may include a first signal input line for inputting the first signal S1, a second signal input line for inputting the second signal S2, and a ground line GND, wherein the first and second signal input lines are connected to a crankshaft camshaft sensor interface in the vehicle ECU.
Next, a crankshaft camshaft signal detection circuit will be specifically described with reference to fig. 2 based on an exemplary embodiment of the present invention. However, those skilled in the art will appreciate that the following examples are only optional or preferred examples, and are included herein for illustrative purposes only and are not intended to specifically limit the present invention.
According to one embodiment of the present invention, a signal level adjustment circuit includes a first input signal adjustment circuit connected to a first signal input line and a second input signal adjustment circuit connected to a second signal input line. In a preferred embodiment, the first input signal conditioning circuit includes a third resistor R3, a fourth resistor R4, and a fifth resistor R5 to condition the first signal S1, and the second input signal conditioning circuit includes a twelfth resistor R12, a thirteenth resistor R13, and a fourteenth resistor R14 to condition the second signal S2.
Specifically, one end of R3 is connected to a first signal input line to receive a first signal S1 from a crankshaft camshaft sensor. The other end of R3 is connected in parallel with one end of R4 and one end of R5, and the other end of R5 is grounded. The first signal S1 may be a sine wave with a level between-10V- +10V or a square wave with a level between 0- + 10V. Therefore, preferably, R3 may be selected as a precision resistor having a resistance value of 10K ohms, R5 may be selected as a precision resistor having a resistance value of 3K ohms, and R4 may be selected as a precision resistor having a resistance value of 200K ohms to isolate the influence of the latter stage circuit on the voltage-dividing circuit, whereby the level adjustment compression ratio may be R5/(R3+ R5) ═ 3/13 ═ 0.23. Accordingly, the first signal S1 is compressed into a sine wave with a level between-2.3V- +2.3V or a square wave with a level between 0- + 2.3V.
One end of the R12 is connected to a second signal input line for receiving a second signal S2 from the crankshaft camshaft sensor. The other end of R12 is connected in parallel with one end of R13 and one end of R14, and the other end of R14 is grounded. The second signal S2 may be a sine wave with a level between-10V- +10V or a square wave with a level between 0- + 10V. Therefore, preferably, R12 may be selected as a precision resistor having a resistance value of 10K ohms, R14 may be selected as a precision resistor having a resistance value of 3K ohms, and R13 may be selected as a precision resistor having a resistance value of 200K ohms to isolate the influence of the latter stage circuit on the voltage-dividing circuit, whereby the level adjustment compression ratio may be R14/(R14+ R12) ═ 3/13 ═ 0.23. Thus, the second signal S2 is compressed into a sine wave with a level between-2.3V- +2.3V or a square wave with a level between 0- + 2.3V.
According to another embodiment of the present invention, the positive and negative waveform separation circuits include a first positive waveform separation circuit and a first negative waveform separation circuit coupled to an output of the first input signal conditioning circuit, and a second positive waveform separation circuit and a second negative waveform separation circuit coupled to an output of the second input signal conditioning circuit. In a preferred embodiment, the first positive-going waveform separation circuit includes a first diode D1 and a second resistor R2, the first negative-going waveform separation circuit includes a fifth diode D5, an eighth resistor R8, and a seventh resistor R7, the second positive-going waveform separation circuit includes a seventh diode D7 and an eleventh resistor R11, and the second negative-going waveform separation circuit includes an eleventh diode D11, a seventeenth resistor R17, and a sixteenth resistor R16.
Specifically, the anode of D1 is connected to the output of the first input signal conditioning circuit, the cathode of D1 is connected to one end of R2, and the other end of R2 is grounded to provide a ground reference level for the negative going direction of the diode. D1 only allows positive going signals to pass through, while negative going waveform signals are blocked. In addition, the selection of the diode requires a small forward conduction voltage drop and a large current. Therefore, D1 may be selected to use a 1N5819 schottky diode. Further, R2 may be selected to have a resistance value of 3K ohms, for example.
The cathode of the D5 is connected with the output end of the first input signal adjusting circuit, the anode of the D5 is connected with one end of the R8 and one end of the R7 in parallel, and the other end of the R8 is grounded to provide a ground reference level for the forward direction of the diode. D5 only allows negative going signals to pass, while positive going waveform signals are blocked. In addition, the selection of the diode requires a small forward conduction voltage drop and a large current. Therefore, D5 may be selected to use a 1N5819 schottky diode. Further, R8 may be selected to have a resistance value of 3K ohms, for example.
The anode of D7 is connected to the output of the second input signal conditioning circuit, the cathode of D7 is connected to one end of R11, and the other end of R11 is grounded to provide a ground reference level for the negative going direction of the diode. D7 only allows positive going signals to pass through, while negative going waveform signals are blocked. In addition, the selection of the diode requires a small forward conduction voltage drop and a large current. Therefore, D7 may be selected to use a 1N5819 schottky diode. Further, R11 may be selected to have a resistance value of 3K ohms, for example.
The cathode of the D11 is connected with the output end of the second input signal adjusting circuit, the anode of the D11 is connected with one end of the R17 and one end of the R16 in parallel, and the other end of the R17 is grounded to provide a ground reference level for the forward direction of the diode. D11 only allows negative going signals to pass, while positive going waveform signals are blocked. In addition, the selection of the diode requires a small forward conduction voltage drop and a large current. Therefore, D11 may be selected to use a 1N5819 schottky diode. Further, R17 may be selected to have a resistance value of 3K ohms, for example.
According to another embodiment of the present invention, the signal isolation amplifying circuit includes a first positive signal isolation amplifying circuit connected to an output terminal of the first positive waveform separating circuit, a first negative signal isolation amplifying circuit connected to an output terminal of the first negative waveform separating circuit, a second positive signal isolation amplifying circuit connected to an output terminal of the second positive waveform separating circuit, and a second negative signal isolation amplifying circuit connected to an output terminal of the second negative waveform separating circuit. In a preferred embodiment, the first positive-direction signal isolation amplifying circuit comprises a first operational amplifier U1A and a first resistor R1, the first negative-direction signal isolation amplifying circuit comprises a second operational amplifier U1B, a sixth resistor R6 and a ninth resistor R9, the second positive-direction signal isolation amplifying circuit comprises a third operational amplifier U1C and a tenth resistor R10, and the second negative-direction signal isolation amplifying circuit comprises a fourth operational amplifier U1D, a fifteenth resistor R15 and an eighteenth resistor R18.
Specifically, the 3 rd pin of U1A is connected in parallel with the output terminal of the first forward waveform separation circuit, the 4 th pin is connected to the positive voltage power supply, the 11 th pin is connected to the negative voltage power supply, and the 1 st pin of U1A is connected in parallel with the 2 nd pin and then connected to one end of R1. According to an example, the 3 rd pin of U1A may be connected in parallel with the negative terminal of D1 and the one end of R2. Since R1 is connected to the 1 st pin of U1A, it plays the role of current limiting and front-back isolation. For example, R1 may select a resistor with a resistance of 1K ohms, the positive voltage supply may be +5V, and the negative voltage supply may be-5V. The forward waveform signal split via the first forward waveform splitting circuit is input to the 3 rd pin of U1A, and the level of the split forward waveform signal is at 0-2.3V. Therefore, the 1 st pin and the 2 nd pin of U1A are connected in parallel to form a voltage follower circuit, and only serve as circuit isolation of the front and rear stages. For example, U1A may select an operational amplifier model TL084 IDT.
The 5 th pin of U1B is connected to ground, the 7 th pin is connected to one end of R9 and is connected in parallel with R6, and the other end of R9 is connected in parallel with the output of the first negative-going waveform splitting circuit and the 6 th pin of U1B. According to one example, the other end of R9 may be connected in parallel with the other end of R7 and the 6 th pin of U1B. The negative-going waveform signal split by the first negative-going waveform splitting circuit is input to one end of R7, the other end of R7 is connected to the 6 th pin of U1B, the 5 th pin of U1B is grounded, and the 7 th pin of U1B is connected with R9 to feed back the signal to the 6 th pin of U1B, so that an inverting proportional amplifier is formed, and the input negative-going signal is inverted and amplified to become a positive-going signal. The level of the negative going waveform signal after passing through D5 and R8 is-0.489V-0V, so the negative going waveform signal needs to be amplified by U1B in reverse phase and the amplification factor should be 4.7 times. The amplification factor of the amplifier is calculated as- (R9/R7) — 0.47. Therefore, preferably, R7 may be a precision resistor having a resistance value of 1K ohm, and R9 may be a precision resistor having a resistance value of 4.7K ohm. After inverse amplification, the level value of the 7 th pin of U1B is 0-2.3V. For example, U1B may be an operational amplifier model TL084 IDT. One end of the R6 is connected with the 7 th pin of the U1B, and the other end is connected with an amplitude limiting circuit of an electric post stage, so that the current limiting and front-back isolation functions can be realized. For example, the resistance value of R6 may be 1K ohms.
The 10 th pin of U1C is connected in parallel with the output end of the second forward waveform separation circuit, and the 8 th pin is connected in parallel with the 9 th pin and then connected with one end of R10. According to an example, the 10 th pin of U1C may be connected in parallel with the negative terminal of D7 and the one end of R11. The separated forward waveform signal is input to the 10 th pin of U1C, and the level of the separated forward waveform signal is 0-2.3V, so the 8 th pin and the 9 th pin of U1C are connected in parallel to form a voltage follower circuit, and only the circuit isolation of the front stage and the rear stage is achieved. Preferably, U1C can choose to use an operational amplifier model TL084 IDT. In addition, since the R10 is connected to the 8 th pin of the U1C, the current limiting and front-back isolating functions are achieved. For example, the resistance value of R10 may be 1K ohms.
The 12 th pin of the U1D is grounded, the 14 th pin is connected with one end of the R18 and is connected with one end of the R15 in parallel, and the other end of the R18 is connected with the 13 th pin of the U1D and the output end of the second negative-going waveform separation circuit in parallel. According to an example, the other end of R18 may be connected in parallel with the 13 th pin of U1D and the other end of R16. The negative-going waveform signal split by the second negative-going waveform splitting circuit is input to one end of R16, the other end of R16 is connected to the 13 th pin of U1D, the 12 th pin of U1D is grounded, the 14 th pin of U1D is connected to R18, and then the signal is fed back to the 13 th pin of U1D, so that an inverting proportional amplifier is formed. This makes the negative going signal of input become the positive going signal after inverting and amplifying. The negative-going waveform signal is amplified in inverse U1D by-0.489V-0V after passing through D11 and R17, and the amplification factor of the amplifier is calculated as- (R18/R16) to-0.47, because the negative-going waveform signal is amplified in inverse U1D and is amplified by 4.7 times. Therefore, preferably, R16 may be a precision resistor having a resistance value of 1K ohm, and R18 may be a precision resistor having a resistance value of 4.7K ohm. After inverting and amplifying, the level value of the 14 th pin of U1D is 0-2.3V. Alternatively, U1D may choose to use an operational amplifier model TL084 IDT. In addition, one end of the R15 is connected with the 14 th pin of the U1D, and the other end is connected with a limiting circuit of an electric post stage, so that the current limiting and front-back isolation functions are achieved. For example, the resistance value of R15 may be 1K ohms.
According to yet another embodiment of the present invention, the crankshaft-camshaft signal detection circuit may include 4 signal output lines, namely, a first signal output line (S1-OUT1), a second signal output line (S1-OUT2), a third signal output line (S2-OUT1), and a fourth signal output line (S2-OUT 2). In the illustrated embodiment, the second interface J2 includes a PIN1 PIN connected to S1-OUT1, a PIN2 PIN connected to S1-OUT2, a PIN3 PIN connected to S2-OUT1, a PIN4 PIN connected to S2-OUT2, and a PIN5 PIN connected to ground.
In the above-described embodiments, the signal output limiting circuit may include a first signal output limiting circuit, a second signal output limiting circuit, a third signal output limiting circuit, and a fourth signal output limiting circuit. Specifically, the input end of the first signal output amplitude limiting circuit is connected with the output end of the first forward signal isolation amplifying circuit, and the output end of the first forward signal output amplitude limiting circuit is connected with the PIN1 PIN through S1-OUT 1. The input end of the second signal output amplitude limiting circuit is connected with the output end of the first negative-going signal isolation amplifying circuit, and the output end of the second signal output amplitude limiting circuit is connected with the PIN2 through S1-OUT 2. The input end of the third signal output amplitude limiting circuit is connected with the output end of the second forward signal isolation amplifying circuit, and the output end of the third signal output amplitude limiting circuit is connected with the PIN3 PIN through S2-OUT 1. The input end of the fourth signal output amplitude limiting circuit is connected with the output end of the second negative-going signal isolation amplifying circuit, and the output end of the fourth signal output amplitude limiting circuit is connected with the PIN4 through S2-OUT 2.
According to a preferred embodiment, the first signal output limiting circuit may include a second diode D2 and a third diode D3, wherein an anode of D2 and a cathode of D3 are connected in parallel with the output terminal of the first forward signal isolation amplifying circuit, a cathode of D2 is connected to a power supply, and an anode of D3 is grounded. The positive waveform signal of the first input signal S1 finally enters the first signal output limiting circuit. For example, the power source to which D2 is connected may be VCC3V 3. The signal passing through R1 is limited between 0 and VCC3V3, so that the ADC interface signal input to the master MCU can be prevented from exceeding the level range of the master MCU. In the present embodiment, D2 and D3 may preferably employ a switching diode 1N 4148.
The second signal output amplitude limiting circuit may include a fourth diode D4 and a sixth diode D6, wherein the positive pole of D4 and the negative pole of D6 are connected in parallel with the output terminal of the first negative-going signal isolation amplifying circuit, the negative pole of D4 is connected to the power supply, and the positive pole of D6 is grounded. The negative-going waveform signal of the first input signal S1 is inverted and amplified and then enters the second signal output limiting circuit. For example, the power source to which D4 is connected may be VCC3V 3. The signal passing through R6 is limited between 0 and VCC3V3, so that the ADC interface signal input to the master MCU can be prevented from exceeding the level range of the master MCU. In the present embodiment, D4 and D6 may preferably employ a switching diode 1N 4148.
The third signal output amplitude limiting circuit may include an eighth diode D8 and a ninth diode D9, wherein an anode of D8 and a cathode of D9 are connected in parallel with the output terminal of the second forward signal isolation amplifying circuit, a cathode of D8 is connected to a power supply, and an anode of D9 is grounded. The forward waveform signal of the second input signal S2 finally enters the third signal output clipping circuit. For example, the power source to which D8 is connected may be VCC3V 3. The signal passing through R10 is limited between 0 and VCC3V3, so that the ADC interface signal input to the master MCU can be prevented from exceeding the level range of the master MCU. In the present embodiment, D8 and D9 may preferably employ a switching diode 1N 4148.
The fourth signal output amplitude limiting circuit can comprise a twelfth diode D10 and a twelfth diode D12, wherein the anode of D10 and the cathode of D12 are connected in parallel with the output end of the second negative signal isolation amplifying circuit, the cathode of D10 is connected with a power supply, and the anode of D12 is grounded. The negative-going waveform signal of the second input signal S2 is inverted and amplified, and finally enters the fourth signal output limiting circuit. For example, the power source to which D10 is connected may be VCC3V 3. The signal passing through R15 is limited between 0 and VCC3V3, so that the ADC interface signal input to the master MCU can be prevented from exceeding the level range of the master MCU. In the present embodiment, D10 and D12 may preferably employ a switching diode 1N 4148.
Furthermore, in accordance with an alternative embodiment of the present invention, the ADC interface may include four ADC interfaces for collecting signals transmitted by the crankshaft camshaft signal detection circuit.
According to the vehicle crankshaft camshaft signal detector, a signal of a crankshaft camshaft sensor of a vehicle ECU is introduced into a crankshaft camshaft signal detection circuit, the signal is processed by a signal level adjusting circuit, a positive and negative waveform separating circuit, a signal isolating and amplifying circuit and a signal output amplitude limiting circuit in the detection circuit in sequence, then a main control MCU acquires the processed crankshaft camshaft signal, and transmits the acquired data to a mobile terminal through a wireless communication module for real-time display and storage, so that assistance is provided for maintenance personnel to quickly judge faults, and the maintenance is greatly facilitated.
Although exemplary embodiments of the present invention have been described, it will be apparent to those skilled in the art that changes may be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.
Claims (14)
1. The utility model provides a vehicle bent axle camshaft signal detection appearance, includes wireless communication module, master control MCU and bent axle camshaft signal detection circuitry that connects gradually, wherein:
one end of the wireless communication module is connected with the mobile terminal in a wireless communication mode;
the master control MCU is connected with the other end of the wireless communication module through a first interface and is connected with the crankshaft and camshaft signal detection circuit through a second interface;
the crankshaft camshaft signal detection circuit is connected with a crankshaft camshaft sensor in a vehicle ECU through a third interface so as to input a signal of the crankshaft camshaft sensor into the crankshaft camshaft signal detection circuit and output the signal as a stable voltage signal; and
the crankshaft camshaft signal detection circuit is connected to an analog-to-digital converter (ADC) interface of the main control MCU through the second interface and is a positive and negative waveform separation and amplification processing circuit, so that the voltage signal is transmitted to the main control MCU through the second interface after being subjected to positive and negative waveform separation and amplification.
2. The vehicle crankshaft camshaft signal detector of claim 1, wherein the crankshaft camshaft signal detection circuit comprises the third interface, a signal level adjustment circuit, a positive-negative waveform separation circuit, a signal isolation amplification circuit, a signal output amplitude limiting circuit and the second interface which are connected in sequence.
3. The vehicle crankshaft camshaft signal detector of claim 2, wherein the third interface includes a first signal input line for inputting a first signal (S1), a second signal input line for inputting a second signal (S2), and a ground line.
4. The vehicle crankshaft camshaft signal detector of claim 3, wherein the signal level adjustment circuit includes a first input signal adjustment circuit connected to the first signal input line and a second input signal adjustment circuit connected to the second signal input line.
5. The vehicle crankshaft camshaft signal detector of claim 4, wherein:
the first input signal adjusting circuit includes a third resistor (R3), a fourth resistor (R4), and a fifth resistor (R5), one end of the third resistor (R3) is connected to the first signal input line, the other end of the third resistor (R3) is connected in parallel to one end of the fourth resistor (R4) and one end of the fifth resistor (R5), and the other end of the fifth resistor (R5) is grounded; and
the second input signal adjusting circuit includes a twelfth resistor (R12), a thirteenth resistor (R13), and a fourteenth resistor (R14), one end of the twelfth resistor (R12) is connected to the second signal input line, the other end of the twelfth resistor (R12) is connected in parallel to one end of the thirteenth resistor (R13) and one end of the fourteenth resistor (R14), and the other end of the fourteenth resistor (R14) is grounded.
6. The vehicle crankshaft camshaft signal detector of claim 4, wherein the positive-negative waveform separation circuit includes a first positive-negative waveform separation circuit and a first negative-positive waveform separation circuit connected to the output of the first input signal conditioning circuit, and a second positive-negative waveform separation circuit and a second negative-positive waveform separation circuit connected to the output of the second input signal conditioning circuit.
7. The vehicle crankshaft camshaft signal detector of claim 6, wherein:
the first forward waveform separation circuit comprises a first diode (D1) and a second resistor (R2), wherein the anode of the first diode (D1) is connected with the output end of the first input signal regulating circuit, the cathode of the first diode (D1) is connected with one end of the second resistor (R2), and the other end of the second resistor (R2) is grounded;
the first negative-going waveform separation circuit comprises a fifth diode (D5), an eighth resistor (R8) and a seventh resistor (R7), the cathode of the fifth diode (D5) is connected with the output end of the first input signal regulating circuit, the anode of the fifth diode (D5) is connected with one end of the eighth resistor (R8) and one end of the seventh resistor (R7) in parallel, and the other end of the eighth resistor (R8) is grounded;
the second forward waveform separation circuit comprises a seventh diode (D7) and an eleventh resistor (R11), wherein the anode of the seventh diode (D7) is connected with the output end of the second input signal regulation circuit, the cathode of the seventh diode (D7) is connected with one end of the eleventh resistor (R11), and the other end of the eleventh resistor (R11) is grounded; and
the second negative-going waveform separation circuit comprises an eleventh diode (D11), a seventeenth resistor (R17) and a sixteenth resistor (R16), wherein a cathode of the eleventh diode (D11) is connected with the output end of the second input signal conditioning circuit, an anode of the eleventh diode (D11) is connected with one end of the seventeenth resistor (R17) and one end of the sixteenth resistor (R16) in parallel, and the other end of the seventeenth resistor (R17) is grounded.
8. The vehicle crankshaft camshaft signal detector of claim 6, wherein the signal isolation amplifying circuit includes a first positive signal isolation amplifying circuit connected to an output of the first positive waveform separating circuit, a first negative signal isolation amplifying circuit connected to an output of the first negative waveform separating circuit, a second positive signal isolation amplifying circuit connected to an output of the second positive waveform separating circuit, and a second negative signal isolation amplifying circuit connected to an output of the second negative waveform separating circuit.
9. The vehicle crankshaft camshaft signal detector of claim 8, wherein:
the first forward signal isolation amplifying circuit comprises a first operational amplifier (U1A) and a first resistor (R1), wherein a 3 rd pin of the first operational amplifier (U1A) is connected with an output end of the first forward waveform separating circuit in parallel, a 4 th pin of the first operational amplifier is connected with a positive voltage power supply, an 11 th pin of the first operational amplifier is connected with a negative voltage power supply, and a 1 st pin of the first operational amplifier (U1A) is connected with one end of the first resistor (R1) after being connected with a 2 nd pin of the first operational amplifier in parallel;
the first negative-going signal isolation amplifying circuit comprises a second operational amplifier (U1B), a sixth resistor (R6) and a ninth resistor (R9), wherein a 5 th pin of the second operational amplifier (U1B) is grounded, a 7 th pin of the second operational amplifier (U1B) is connected with one end of the ninth resistor (R9) and is connected with the sixth resistor (R6) in parallel, and the other end of the ninth resistor (R9) is connected with the output end of the first negative-going waveform separating circuit and the 6 th pin of the second operational amplifier (U1B) in parallel;
the second forward signal isolation amplifying circuit comprises a third operational amplifier (U1C) and a tenth resistor (R10), wherein a 10 th pin of the third operational amplifier (U1C) is connected with the output end of the second forward waveform separating circuit in parallel, and an 8 th pin and a 9 th pin of the third operational amplifier are connected with one end of the tenth resistor (R10) in parallel; and
the second negative-going signal isolation amplifying circuit comprises a fourth operational amplifier (U1D), a fifteenth resistor (R15) and an eighteenth resistor (R18), wherein a 12 th pin of the fourth operational amplifier (U1D) is grounded, a 14 th pin of the fourth operational amplifier (U1D) is connected with one end of the eighteenth resistor (R18) and is connected with one end of the fifteenth resistor (R15) in parallel, and the other end of the eighteenth resistor (R18) is connected with a 13 th pin of the fourth operational amplifier (U1D) and an output end of the second negative-going waveform separating circuit in parallel.
10. The vehicle crankshaft camshaft signal detector of claim 8, wherein the second interface includes a PIN1 PIN connected to the first signal output line (S1-OUT1), a PIN2 PIN connected to the second signal output line (S1-OUT2), a PIN IN3 PIN connected to the third signal output line (S2-OUT1), a PIN4 PIN connected to the fourth signal output line (S2-OUT2), and a PIN5 PIN connected to ground.
11. The vehicle crankshaft camshaft signal detector of claim 10, wherein the signal output limiting circuit comprises:
a first signal output amplitude limiting circuit, wherein the input end of the first signal output amplitude limiting circuit is connected with the output end of the first forward signal isolation amplifying circuit, and the output end of the first signal output amplitude limiting circuit is connected with the PIN1 PIN through the first signal output line (S1-OUT 1);
the input end of the second signal output amplitude limiting circuit is connected with the output end of the first negative-going signal isolation amplifying circuit, and the output end of the second signal output amplitude limiting circuit is connected with the PIN2 PIN through a second signal output line (S1-OUT 2);
a third signal output amplitude limiting circuit, wherein the input end of the third signal output amplitude limiting circuit is connected with the output end of the second forward signal isolation amplifying circuit, and the output end of the third signal output amplitude limiting circuit is connected with the PIN3 PIN through a third signal output line (S2-OUT 1); and
and the input end of the fourth signal output amplitude limiting circuit is connected with the output end of the second negative-going signal isolation amplifying circuit, and the output end of the fourth signal output amplitude limiting circuit is connected with the PIN4 PIN through the fourth signal output line (S2-OUT 2).
12. The vehicle crankshaft camshaft signal detector of claim 11, wherein:
the first signal output amplitude limiting circuit comprises a second diode (D2) and a third diode (D3), the anode of the second diode (D2) and the cathode of the third diode (D3) are connected with the output end of the first forward signal isolation amplifying circuit in parallel, the cathode of the second diode (D2) is connected with a power supply, and the anode of the third diode (D3) is grounded;
the second signal output amplitude limiting circuit comprises a fourth diode (D4) and a sixth diode (D6), the anode of the fourth diode (D4) and the cathode of the sixth diode (D6) are connected in parallel with the output end of the first negative-going signal isolation amplifying circuit, the cathode of the fourth diode (D4) is connected with a power supply, and the anode of the sixth diode (D6) is grounded;
the third signal output amplitude limiting circuit comprises an eighth diode (D8) and a ninth diode (D9), the anode of the eighth diode (D8) and the cathode of the ninth diode (D9) are connected with the output end of the second forward signal isolation amplifying circuit in parallel, the cathode of the eighth diode (D8) is connected with a power supply, and the anode of the ninth diode (D9) is grounded; and
the fourth signal output amplitude limiting circuit comprises a twelfth diode (D10) and a twelfth diode (D12), the anode of the twelfth diode (D10) and the cathode of the twelfth diode (D12) are connected with the output end of the second negative-going signal isolation amplifying circuit in parallel, the cathode of the twelfth diode (D10) is connected with a power supply, and the anode of the twelfth diode (D12) is grounded.
13. The vehicle crankshaft camshaft signal detector of claim 10, wherein the ADC interface includes four ADC interfaces for collecting the signal transmitted by the crankshaft camshaft signal detection circuit.
14. The vehicle crankshaft camshaft signal detector of claim 1, wherein the first interface is a serial port.
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| CN201911292244.0A CN110873548A (en) | 2019-12-12 | 2019-12-12 | Signal detector for crankshaft and camshaft of vehicle |
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| CN201911292244.0A CN110873548A (en) | 2019-12-12 | 2019-12-12 | Signal detector for crankshaft and camshaft of vehicle |
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