CN110767717A

CN110767717A - Array substrate, display panel and display device

Info

Publication number: CN110767717A
Application number: CN201910365118.7A
Authority: CN
Inventors: 马宏帅; 孙光远; 马志丽; 张九占; 韩珍珍
Original assignee: Kunshan Guoxian Photoelectric Co Ltd
Current assignee: Kunshan Guoxian Photoelectric Co Ltd
Priority date: 2019-04-30
Filing date: 2019-04-30
Publication date: 2020-02-07
Anticipated expiration: 2039-04-30
Also published as: CN110767717B

Abstract

The invention relates to an array substrate, a display panel and a display device. The array substrate comprises a display area, wherein the display area comprises a first display area and a second display area; the first display area is adjacent to the second display area; the light transmittance of the second display area is greater than that of the first display area; the first display area comprises first OLED pixels and signal lines which are arranged in an array manner; the second display area comprises second OLED pixels arranged in an array manner; the second OLED pixel is provided with a first pixel circuit, and the signal line is positioned between the first OLED pixels arranged in an array mode and connected to the first pixel circuit of the second OLED pixel. According to the embodiment of the invention, since the signal line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop of the signal line can be reduced.

Description

Array substrate, display panel and display device

Technical Field

The invention relates to the technical field of display equipment, in particular to an array substrate, a display panel and a display device.

Background

With the rapid development of display devices, the requirements of users on screen occupation are higher and higher. Since the top of the screen needs to be provided with elements such as a camera, a sensor, an earphone, etc., in the related art, a part of area is usually reserved at the top of the screen for installing the elements, for example, the "bang" area of iphoneX of the iphone, which affects the overall consistency of the screen. Currently, full-screen displays are receiving more and more attention from the industry.

Disclosure of Invention

The invention provides an array substrate, a display panel and a display device, which aim to solve the defects in the related art.

According to a first aspect of the embodiments of the present invention, an array substrate is provided, which includes a display area, where the display area includes a first display area and a second display area; the first display area is adjacent to the second display area; the light transmittance of the second display area is greater than that of the first display area; the first display area comprises first OLED pixels and signal lines which are arranged in an array manner; the second display area comprises second OLED pixels arranged in an array manner;

the second OLED pixel is provided with a first pixel circuit, and the signal line is positioned between the first OLED pixels arranged in an array mode and connected to the first pixel circuit of the second OLED pixel.

In one embodiment, the signal line includes a power line.

Preferably, the array substrate further comprises a non-display area surrounding the display area; the non-display area comprises a power supply chip; the power line is connected with the power chip.

Because the power line of the first pixel circuit connected to the second OLED pixel in the second display area is located in the first display area, the IR-Drop introduced by the power line detour can be avoided, and further the display brightness difference between the display areas can be reduced, so that the display effect of the display panel is more uniform, and the display effect of the display panel is improved.

In one embodiment, the number of the power lines is greater than 1, and all the power lines are connected to the first pixel circuit after being connected in parallel.

Thus, the resistance of the power supply line can be reduced, the IR-Drop can be further reduced, and the display luminance difference between the display regions can be reduced.

In one embodiment, all of the power lines are located in the same layer.

Preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer, and all the power lines are located at the same layer as the first anode.

Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the first display area can be prepared in the same process flow, and the preparation flow is saved. Moreover, the thickness of the array substrate can be prevented from being affected.

Preferably, the first anode is a reflective anode; the material of the power supply line is the same as that of the first anode; all the power lines are connected in parallel and then are lapped to the first pixel circuit.

Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the first display area can be prepared in the same process flow, and the preparation flow is saved.

Preferably, the second OLED pixel includes a second anode, a second light emitting layer on the second anode, and a second cathode on the second light emitting layer; the second anode is a transparent anode; the material of the power supply line is the same as that of the second anode, and the power supply line and the second anode are located in the same layer.

Therefore, the power line can be directly connected with the first pixel circuit, the connection mode is simple and easy to realize, the process difficulty can be reduced, and the power line and the second anode can be manufactured in the same process, so that the process is simplified.

In one embodiment, all of the power lines are located in different layers.

Preferably, all of the power supply lines are distributed in at least two layers.

Preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer, and a power line located at an uppermost layer among all the power lines is located at the same layer as the first anode.

Preferably, a material of a power line positioned at an uppermost layer among all the power lines is the same as that of the first anode, and a resistivity of the uppermost power line is greater than that of the power lines of the other layers.

Thus, the resistance of the power supply line can be further reduced, the IR Drop can be further reduced, and the display luminance difference between the display regions can be reduced.

Preferably, the second OLED pixel includes a second anode, a second light emitting layer on the second anode, and a second cathode on the second light emitting layer; the second anode is a transparent anode; and the power line positioned on the uppermost layer in all the power lines and the second anode are positioned on the same layer. Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the second display area can be prepared in the same process flow, and the preparation flow is saved.

In one embodiment, the power lines include at least two first power lines extending along a first direction and at least two second power lines extending along a second direction, and the at least two first power lines and the at least two second power lines are connected in a cross manner to form a mesh; the first direction intersects the second direction.

Preferably, the first direction is a row direction in which the first OLED pixels are arranged, and the second direction is a column direction in which the first OLED pixels are arranged. Thus, wiring can be facilitated.

Preferably, when the power line located at the uppermost layer among all the power lines is located at the same layer as the first anode, the power line located at the uppermost layer is the first power line or the second power line.

In one embodiment, the signal lines include data lines.

Preferably, the array substrate further comprises a non-display area, wherein the non-display area comprises a first driving chip; the data line is connected with the first driving chip.

Since the data line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop introduced by the data line bypass can be avoided.

In one embodiment, the signal lines include at least one set of data lines. The same group of data lines comprises at least one first data line extending along a first direction and at least one second data line extending along a second direction, and the at least one first data line and the at least one second data line are in cross connection; the first direction is a row direction in which the first OLED pixels are arranged, and the second direction is a column direction in which the first OLED pixels are arranged; a second data line extending along a second direction in the same group of data lines is connected to the first pixel circuit of the second OLED pixel in the same column; the different groups of data lines are insulated and connected to the first pixel circuits of the second OLED pixels in different columns; all the group data wires are distributed in a net shape.

Preferably, in all the group of data lines, an insulating layer is included between the first data line and the second data line; the first data line is located below the insulating layer, and the second data line is located above the insulating layer. In this way, the data signals transmitted by different groups of data lines can be prevented from mutual crosstalk.

Preferably, the at least one set of data lines is distributed in at least two layers. Thus, each group of data lines can comprise more data lines connected in parallel, the resistance of the data lines can be further reduced, and the IR-Drop is further reduced.

Preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer; the data line of the uppermost layer in the at least one group of data lines is the second data line, is positioned on the same layer as the first anodes, and is distributed among the first anodes arranged in an array manner. Thus, an excessive thickness of the array substrate can be avoided.

Preferably, when the signal line includes a power line and a data line, the power line and the data line are insulated from each other. In this way, cross talk between the power signal and the data signal can be avoided.

Preferably, the same power line is connected to the data line at a position intersecting the data line by a bridge. Thus, the power line and the data line can be insulated from each other.

Preferably, the same data line is connected to the power line at a position intersecting the power line by a bridge. Thus, the power line and the data line can be insulated from each other.

Preferably, the material of the data lines in all sets of data lines is molybdenum. The resistivity of the molybdenum is larger than that of the titanium, the material of the data line is changed from the titanium to the molybdenum, the resistance of the data line can be increased, the voltage of a data signal received by the first pixel circuit is reduced, the display brightness of the second OLED pixel is improved, and the display brightness difference between the first display area and the second display area is reduced.

Preferably, at least one data line in the same group of data lines is connected with the antistatic circuit. Thus, the data line can be protected from static electricity.

In one embodiment, at least a portion of the second display area is surrounded by the first display area; the driving mode of the first OLED pixel is active driving, and the driving mode of the second OLED pixel is active driving; the array substrate further comprises a first type of scanning line and a second type of scanning line; the first scanning line type is positioned in the second display area and the first display area; the second OLED pixels in the same row and the first OLED pixels in the same row are connected to the same first-type scanning line; the first OLED pixels in different rows are connected to different first-type scanning lines, and the second OLED pixels in different rows are connected to different first-type scanning lines; the second type scanning line is positioned in the first display area; the same second type scanning line is only used for connecting the first OLED pixels in the same row; the first OLED pixels in the same row are connected to the same second type scanning line or two different second type scanning lines. Since the first display region and the second display region share the scan line, wiring can be simplified.

Preferably, when the first OLED pixels in the same row are connected to the same second type scanning line, two ends of the same second type scanning line are respectively connected to a gate driving unit. When the two grid driving units provide scanning signals for the first OLED pixels in the same row, the driving capability can be improved.

Preferably, when the first OLED pixels in the same row are connected to two different second-type scan lines, the two second-type scan lines are each connected to one gate driving unit.

Preferably, the signal line is a power line, and the array substrate further includes a first type data line and a second type data line; the first type data line is positioned in the second display area and the first display area; the second OLED pixels in the same row and the first OLED pixels in the same row are connected to the same first-type data line; the first OLED pixels in different columns are connected to different first-type data lines, and the second OLED pixels in different columns are connected to different first-type data lines; the second type data line is positioned in the first display area; the same second-type data line is only used for connecting the first OLED pixels in the same column. Since the first display region and the second display region share the data line, wiring can be simplified.

The array substrate further comprises a non-display area surrounding the display area; the non-display area comprises a second driving chip; the first type data line and the second type data line are connected to the second driving chip. Because the first display area and the second display area share the same driving chip, the display brightness of the first display area and the second display area is close to the same, and the display picture is more uniform.

Preferably, the first pixel circuit is a 1T pixel circuit or a 2T1C pixel circuit, and the second pixel circuit of the first OLED pixel is a 2T1C pixel circuit, a 3T1C pixel circuit, a 3T2C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, a 7T1C pixel circuit, or a 7T2C pixel circuit.

Preferably, the first data voltage of the first OLED pixel is different from the second data voltage of the second OLED pixel.

Preferably, the first data voltage is 3 to 6.5 volts, and the second data voltage is 1 to 6.5 volts.

In one embodiment, the pixel density of the second OLED pixel is less than the pixel density of the first OLED pixel. Thus, it is advantageous to improve the light transmittance of the second display region.

Preferably, the array substrate further comprises a third display area; the third display area is located between the first display area and the second display area. The third display area comprises the first OLED pixels and the second OLED pixels which are arranged in an array mode, and the first OLED pixels and the second OLED pixels are arranged in a staggered mode. Therefore, the display brightness of the third display area is between the display brightness of the first display area and the display brightness of the second display area, so that the obvious boundary between the first display area and the second display area can be eliminated, and the display effect is improved.

Preferably, the opening area of the first OLED pixel in the third display region gradually decreases in a direction in which the first display region points to the second display region. In this way, it may be convenient for the data line of the second OLED pixel in the third display region to be connected to the anode of the second OLED pixel through the gap of the anode of the first OLED pixel.

Preferably, the third display area comprises third OLED pixels arranged in an array; the third anode of the third OLED pixel includes a non-transparent anode region and a transparent anode region; in the third OLED pixel in the direction from the first display region to the second display region, the ratio of the area of the non-transparent anode region in the third anode to the area of the entire third anode decreases in sequence, and the ratio of the area of the transparent anode region to the area of the entire third anode increases in sequence. Therefore, the display brightness can be gradually transited from the first display area to the second display area, and the display effect is improved.

Preferably, the second display area is in any one of the following shapes: drop-shaped, circular, rectangular, oval, diamond-shaped, semi-circular, or semi-oval.

According to a second aspect of embodiments of the present invention, there is provided a display panel including:

the array substrate described above;

the packaging layer is packaged on one side, far away from the substrate of the array substrate, of the array substrate;

a photosensitive device can be arranged below the second display area;

preferably, the encapsulation layer includes a polarizer, and the polarizer covers the first display region and does not cover the second display region.

According to a third aspect of embodiments of the present invention, there is provided a display device including:

an apparatus body having a device region;

the display panel described above;

the display panel covers the equipment body;

the device region is positioned below the second display region and comprises a photosensitive device which transmits or collects light rays through the second display region;

preferably, the photosensitive device comprises at least one of: camera, light sensor, light emitter.

According to the above embodiments, since the signal line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop introduced by signal line routing, i.e., lowering of IR-Drop of the signal line, can be avoided.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.

Fig. 1 is a schematic structural diagram illustrating an array substrate according to an embodiment of the present invention;

fig. 2 is a schematic structural diagram illustrating another array substrate according to an embodiment of the present invention;

fig. 3 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 4 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 5 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 6 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 7 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 8 is a schematic structural view illustrating another array substrate according to an embodiment of the present invention;

fig. 9 is a schematic structural diagram of another array substrate according to an embodiment of the present invention.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the invention, as detailed in the appended claims.

In the related art, there is a display panel including a non-transparent display region and a transparent display region, and the transparent display region can implement both a light transmission function and a display function. Wherein, photosensitive elements such as a camera, a distance sensor and the like are arranged below the transparent display area. Since the signal lines for supplying the power signals and the data signals to the pixels in the transparent display region are located in the frame region, and due to IR-Drop (IR Drop) of the signal lines, the difference between the display brightness of the non-transparent display region and the display brightness of the transparent display region is large, and the display effect is poor.

In view of the foregoing technical problems, embodiments of the present invention provide an array substrate, a display panel and a display device, which can reduce the display brightness difference between display areas, make the display effect of the display panel more uniform, and improve the display effect of the display panel.

The embodiment of the invention provides an array substrate. As shown in fig. 1, the array substrate includes a display area 11, where the display area 11 includes a first display area 111 and a second display area 112; the first display area 111 is adjacent to the second display area 112; the light transmittance of the second display region 112 is greater than that of the first display region 111; the first display region 111 includes first OLED pixels (not shown) and signal lines (not shown) arranged in an array. The second display region includes second OLED pixels (not shown) arranged in an array.

In this embodiment, the second OLED pixel has a first pixel circuit (not shown), and the signal line is located between the first OLED pixels arranged in an array and connected to the first pixel circuit of the second OLED pixel.

For example, when the second display region 112 is located at the top end of the array substrate and the signal source of the first pixel circuit of the second OLED pixel in the second display region 112 is located at the bottom end of the array substrate, the length of the signal line connected from the signal source to the first pixel circuit via the first display region 111 is smaller than the length of the signal line connected from the signal source to the first pixel circuit via the frame region, and therefore, IR Drop can be reduced. When the signal line is a power line and the brightness of the second display area 112 is less than the brightness of the first display area 111, the display brightness difference between the display areas can be reduced, so that the display effect of the display panel is more uniform, and the display effect of the display panel is improved. The power supply line of the present application is used to supply power to the anode of the OLED pixel.

In this embodiment, since the signal line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop introduced by signal line detour, i.e., lowering of IR-Drop of the signal line, can be avoided.

The embodiment of the invention also provides an array substrate. On the basis of the embodiment shown in fig. 1, in the present embodiment, the signal line includes a power line.

In this embodiment, as shown in fig. 1, the array substrate 1 further includes a non-display region 12 surrounding the display region 11. The non-display area 12 may include a power chip (not shown); the power line is electrically connected with the power chip. In one embodiment, a power chip may be located at a bottom end of the array substrate. It should be noted that the power chip may not be located on the array substrate.

In this embodiment, since the power line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, the IR-Drop introduced by the power line detour can be avoided, and thus the display brightness difference between the display regions can be reduced, the display effect of the display panel is more uniform, and the display effect of the display panel is improved.

In this embodiment, as shown in fig. 2, the number of the power lines 21 is greater than 1, and all the power lines 21 are connected in parallel to the first pixel circuit. Thus, the resistance of the power supply line can be reduced, the IR-Drop can be further reduced, and the display luminance difference between the display regions can be reduced.

As shown in fig. 2, in the present embodiment, a first OLED pixel may include a first anode 22, a first light emitting layer (not shown) on the first anode, and a first cathode (not shown) on the first light emitting layer, and all the power lines 21 and the first anode 22 may be located at the same layer. Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the first display area can be prepared in the same process flow, and the preparation flow is saved. Moreover, the thickness of the array substrate can be prevented from being affected.

In this embodiment, the first anode 22 may be a reflective anode, the material of the power line 21 may be the same as the material of the first anode 22, and all the power lines 21 may be connected in parallel and then connected to the first pixel circuit. The material of the first pixel circuit may be a transparent material, and the first anode 22 and the power line 21 are located in the same layer. Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the first display area can be prepared in the same process flow, and the preparation flow is saved.

In this embodiment, the second OLED pixel may include a second anode, a second light emitting layer on the second anode, and a second cathode on the second light emitting layer. The second anode is a transparent anode. The power supply line 21 may also be of the same material as the second anode, and the power supply line may be located at the same layer as the second anode. Therefore, the power line can be directly connected with the first pixel circuit, the connection mode is simple and easy to realize, the process difficulty can be reduced, and the power line and the second anode can be manufactured in the same process, so that the process is simplified.

In this embodiment, all the power lines 21 may be located in different layers. In particular, all said power lines 21 may be distributed in at least two layers. The uppermost power line 21 of all the power lines 21 may be located at the same layer as the first anode 22, the uppermost power line 21 of all the power lines 21 may be made of the same material as the first anode 22, and the resistivity of the uppermost power line may be greater than the resistivity of the power lines of other layers. Thus, by reducing the resistivity of the power supply line of the other layer, the resistance of the power supply line can be further reduced, the IR Drop can be further reduced, and the display luminance difference between the display regions can be reduced.

In another embodiment, the power line located at the uppermost layer among all the power lines may be also located at the same layer as the second anode. Therefore, the power line for providing the power signal for the second display area and the anode of the pixel in the second display area can be prepared in the same process flow, and the preparation flow is saved.

Preferably, all power lines 21 may be distributed in two layers. Thus, the influence on the thickness of the array substrate can be reduced.

As shown in fig. 2, in the present embodiment, the power line 21 includes at least two first power lines 211 extending along a first direction and at least two second power lines 212 extending along a second direction. The at least two first power lines 211 and the at least two second power lines 212 are connected in a cross manner to form a mesh shape; the first direction intersects the second direction. Thus, the resistance of the power supply line can be further reduced, the IR Drop can be further reduced, and the display luminance difference between the display regions can be reduced.

In this embodiment, the first direction may be a row direction in which the first OLED pixels are arranged, and the second direction may be a column direction in which the first OLED pixels are arranged. Specifically, when the power line 21 located at the uppermost layer among all the power lines 21 and the first anode 22 are located at the same layer, the power line at the uppermost layer is the first power line 211 or the second power line 212.

In this embodiment, the second display area may be droplet-shaped. In other embodiments, the second display area may be in any of the following shapes: circular, rectangular, oval, diamond, semi-circular, or semi-oval.

The embodiment of the invention also provides an array substrate. On the basis of the embodiment shown in fig. 1 or fig. 2, in the present embodiment, the signal line includes a data line.

In this embodiment, the array substrate 1 further includes a non-display region 12, where the non-display region includes a first driving chip (not shown); the data line is connected with the first driving chip. In one embodiment, the first driving chip may be located at a bottom end of the array substrate 1.

In this embodiment, since the data line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop introduced by the data line wrap can be avoided.

In the present embodiment, as shown in FIG. 3, the signal lines may include at least one set of data lines 31-34, and different sets of data lines are connected to the first pixel circuits of the second OLED pixels in different columns. For example, when the second display region includes 4 columns of second OLED pixels, such as a first column of second OLED pixels, a second column of second OLED pixels, a third column of second OLED pixels, and a fourth column of second OLED pixels, which are sequentially arranged, the signal line may include four sets of data lines: a first group of data lines 31, a second group of data lines 32, a third group of data lines 33, and a fourth group of data lines 34. The first group of data lines 31 is connected to the first pixel circuit of the first column of second OLED pixels, the second group of data lines 32 is connected to the first pixel circuit of the second column of second OLED pixels, the third group of data lines 33 is connected to the first pixel circuit of the third column of second OLED pixels, and the fourth group of data lines 34 is connected to the first pixel circuit of the fourth column of second OLED pixels.

As shown in fig. 3, the same group of data lines may include at least one first data line extending in a first direction and at least one second data line extending in a second direction, the at least one first data line being cross-connected with the at least one second data line. For example, the first group of data lines 31 may include four first data lines 311 extending along a first direction and three second data lines 312 extending along a second direction, and the four first data lines 311 and the three second data lines 312 are connected in a cross manner to form a mesh. The second group of data lines 32 may include three first data lines 321 extending along a first direction and three second data lines 322 extending along a second direction, and the three first data lines 321 and the three second data lines 322 are connected in a cross manner to form a mesh. The third set of data lines 33 may include three first data lines 331 extending along the first direction and six second data lines 332 extending along the second direction, and the three first data lines 331 and the six second data lines 332 are connected in a cross manner to form a mesh. The fourth group of data lines 34 may include three first data lines 341 extending along the first direction and three second data lines 342 extending along the second direction, and the three first data lines 341 and the three second data lines 342 are connected in a cross manner to form a mesh. Therefore, all the group data lines 31-34 are distributed in a net shape.

In this embodiment, the first direction may be a row direction of the first OLED pixel arrangement, and the second direction may be a column direction of the first OLED pixel arrangement. And a second data line extending along a second direction in the same group of data lines is connected to the first pixel circuit of the second OLED pixel in the same column.

In the present embodiment, the different sets of data lines are insulated from each other. For example, the first group data line 31, the second group data line 32, the third group data line 33, and the fourth group data line 34 are insulated from each other. In this way, the data signals transmitted by different groups of data lines can be prevented from mutual crosstalk.

In this embodiment, in all the group of data lines, an insulating layer is included between the first data line and the second data line; the first data line may be positioned below the insulating layer, and the second data line may be positioned above the insulating layer. In this way, the connection of the data line in the column direction with the first pixel circuit of the second OLED pixel can be facilitated.

In this embodiment, the at least one set of data lines 31-34 can be distributed in at least two layers. Thus, each group of data lines can comprise more data lines connected in parallel, the resistance of the data lines can be further reduced, and the IR-Drop is further reduced.

In this embodiment, the first OLED pixel may include a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer. The uppermost data line of the at least one group of data lines 31 to 34 is the second data line, is located at the same layer as the first anodes, and is distributed among the first anodes arranged in an array manner. Thus, an excessive thickness of the array substrate can be avoided.

In the embodiment, when the signal line includes both the power line 21 and the

data lines

311, 312, 321, 322, 331, 332, 341, 342, the power line 21 and the

data lines

311, 312, 321, 322, 331, 332, 341, 342 are insulated from each other. In this way, cross talk between the power signal and the data signal can be avoided.

In this embodiment, the same power line may be connected to the data line at a position intersecting the data line via a bridge, so that the power line and the data line are insulated from each other.

In this embodiment, the same data line may be connected to the power line at a position intersecting the power line via a bridge, so that the power line and the data line are insulated from each other.

In this embodiment, the material of the data lines in all the sets of data lines may be mo. The resistivity of the molybdenum is larger than that of the titanium, the material of the data line is changed from the titanium to the molybdenum, the resistance of the data line can be increased, the voltage of a data signal received by the first pixel circuit is reduced, the display brightness of the second OLED pixel is improved, and the display brightness difference between the first display area and the second display area is reduced.

In this embodiment, as shown in fig. 4, at least one data line in the same set of data lines may be connected to an anti-static circuit (not shown). Thus, the data line can be protected from static electricity. In this embodiment, the data lines may extend from the outermost crossing positions toward the side of the array substrate and be connected to the anti-static circuit.

The embodiment of the invention also provides an array substrate. On the basis of the embodiment shown in fig. 1, in the present embodiment, as shown in fig. 5, at least a part of the second display area 112 is surrounded by the first display area 111. The driving mode of the first OLED pixel 51 is active driving, and the driving mode of the second OLED pixel 52 is active driving; the array substrate 1 further includes a first type scanning line 53 and a second type scanning line 54.

As shown in fig. 5, the first-type scan lines 53 are located in the second display area 112 and the first display area 111. The second OLED pixel 52 in the same row and the first OLED pixel 51 in the same row are connected to the same first-type scanning line 53. The first OLED pixels 51 of different rows are connected to different first type scanning lines 53, and the second OLED pixels 52 of different rows are connected to different first type scanning lines 53. The second type scanning lines 54 are located in the first display region 111. The same second-type scan line 54 is only used to connect the first OLED pixels 51 in the same row. In this embodiment, since the first display region and the second display region share the scan line, the wiring can be simplified.

The first OLED pixels 51 in the same row are connected to the same second-type scanning line 54 or two different second-type scanning lines 54. For example, the first OLED pixels 51 in the same row on one side of the second display region 112 are connected to one of the second-type scan lines 54, and the first OLED pixels 51 in the same row on the other side of the second display region 112 are connected to the other of the second-type scan lines 54. The first OLED pixels 51 in the same row under the second display region 112 are connected to the same scan line 54 of the second type.

In the present embodiment, when the first OLED pixels 51 in the same row are connected to two different second-type scan lines 54, the two second-type scan lines 54 are each connected to a gate driving unit. The gate driving unit 57 may be located in the non-display region 12 for supplying a scan signal to the first OLED pixel 51.

Preferably, when the first OLED pixels 51 in the same row are only connected to the same second-type scanning line 54, two ends of the same second-type scanning line may be respectively connected to a gate driving unit 57. When the two grid driving units provide scanning signals for the first OLED pixels in the same row, the driving capability can be improved.

In the present embodiment, the signal line is a power line 21. The array substrate 1 further includes a first data line 55 and a second data line 56. The first-type data lines 55 are located in the second display area 112 and the first display area 111. The same column of the second OLED pixels 52 and the same column of the first OLED pixels 51 are connected to the same first-type data line 55. The first OLED pixels 51 in different columns are connected to different data lines 55 of the first type, the second OLED pixels 52 in different columns are connected to different data lines 55 of the first type, the second data lines 56 are located in the first display region 111, and the same second data line 56 is only used for connecting the first OLED pixels 51 in the same column. In this embodiment, since the first display region and the second display region share the data line, the wiring can be simplified.

Preferably, as shown in fig. 6, the first row of the second OLED pixels 52 may be connected to the nth row of the first kind of scanning lines 53, the second row of the second OLED pixels 52 may be connected to the (n + 2) th row of the first kind of scanning lines 53, and the third row of the second OLED pixels 52 may be connected to the (n + 4) th row of the first kind of scanning lines 53. The first column of second OLED pixels 52 may be connected to the m-th column of first kind data lines 55, the second column of second OLED pixels 52 may be connected to the m + 2-th column of first kind data lines 55, the third column of second OLED pixels 52 may be connected to the m + 4-th column of first kind data lines 55, the fourth column of second OLED pixels 52 may be connected to the m + 4-th column of first kind data lines 55, and so on. Thus, the picture displayed in the second display area can be more uniform.

In this embodiment, the array substrate may further include a non-display region 12 surrounding the display region 11. The non-display area 12 may include a second driving chip; the first-type data lines 55 and the second-type data lines 56 may be connected to the second driving chip. Therefore, the first display area and the second display area share the same driving chip, so that the display brightness of the first display area and the display brightness of the second display area are close to the same, and the display picture is more uniform.

Preferably, the first pixel circuit is a 1T pixel circuit or a 2T1C pixel circuit. This can simplify the wiring of the second display region, which is advantageous for improving the light transmittance.

In this embodiment, the second pixel circuit of the first OLED pixel may be a 2T1C pixel circuit, a 3T1C pixel circuit, a 3T2C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, a 7T1C pixel circuit, or a 7T2C pixel circuit. When the second pixel circuit comprises a switch tube for controlling the light emitting time sequence of the first OLED pixel, the array substrate can also comprise a light emitting control line. And one end of the light-emitting control line is connected with the gate drive unit, and the other end of the light-emitting control line is connected with the switching tube of the second pixel circuit for controlling the light-emitting time sequence of the first OLED pixel. The connection between the light-emitting control line and the second pixel circuit is similar to the connection between the second-type scan line 54 and the first OLED pixel, and is not repeated here.

In the present embodiment, the first data voltage of the first OLED pixel 51 is different from the second data voltage of the second OLED pixel 52. Specifically, the first data voltage may be 3-6.5 volts, and the second data voltage may be 1-6.5 volts.

In this embodiment, the second display area may be rectangular.

The embodiment of the invention also provides an array substrate. On the basis of the embodiment shown in fig. 1, in the present embodiment, the pixel density of the second OLED pixel 52 is smaller than the pixel density of the first OLED pixel 51. Thus, it is advantageous to improve the light transmittance of the second display region.

In this embodiment, as shown in fig. 7 to 8, the array substrate 1 may further include a third display region 113. The third display area 113 is located between the first display area 111 and the second display area 112. The third display area 113 includes the first OLED pixels 51 and the second OLED pixels 52 arranged in an array, and the first OLED pixels 51 and the second OLED pixels 52 are arranged in a staggered manner. Therefore, the display brightness of the third display area is between the display brightness of the first display area and the display brightness of the second display area, so that the obvious boundary between the first display area and the second display area can be eliminated, and the display effect is improved.

Preferably, in the third display area 113, the first OLED pixels 51 and the second OLED pixels 52 may be randomly arranged in a staggered manner, so that the boundary between the first display area and the second display area is further blurred, and the display effect is improved.

Preferably, the opening area of the first OLED pixel 51 in the third display region 113 is gradually decreased in a direction in which the first display region 111 points to the second display region 112. In this way, it may be convenient for the data line of the second OLED pixel in the third display region to be connected to the anode of the second OLED pixel through the gap of the anode of the first OLED pixel.

In this embodiment, as shown in fig. 9, the third display region includes third OLED pixels 91 arranged in an array. The third anode 92 of the third OLED pixel comprises a non-transparent anode region 921 and a transparent anode region 922. In the third OLED pixel 91 in the direction from the first display region to the second display region, the ratio of the area of the non-transparent anode region 921 in the third anode 92 to the area of the entire third anode 92 decreases in sequence, and the ratio of the area of the transparent anode region 922 to the area of the entire third anode 92 increases in sequence. The first anode 22 of the first OLED pixel 51 may be a reflective anode, and the second anode 93 of the second OLED pixel 52 may be a transparent anode. Therefore, the display brightness can be gradually transited from the first display area to the second display area, and the display effect is improved.

The embodiment of the invention also provides a display panel. The display panel includes: the array substrate and the encapsulation layer according to any of the above embodiments.

The packaging layer is packaged on one side, far away from the substrate of the array substrate, of the array substrate; and a photosensitive device can be arranged below the second display area.

In this embodiment, since the signal line of the first pixel circuit connected to the second OLED pixel in the second display region is located in the first display region, IR-Drop introduced by signal line bypass can be avoided, and thus the display luminance difference between the display regions can be reduced, so that the display effect of the display panel is more uniform, and the display effect of the display panel is improved.

The embodiment of the invention also provides a display device. The display device comprises a device body and the display panel in any embodiment.

The display panel is covered on the device body. Wherein the device body has a device region. The device area is located below the second display area and comprises a photosensitive device which transmits or collects light through the second display area.

The display device in this embodiment may be: any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a notebook computer, a digital photo frame, a navigator and the like.

It is noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. It will be understood that the connection of signal lines to circuit elements in this application are electrical connections, and that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layers, or intervening layers may also be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may also be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intermediate layer or element may also be present. Like reference numerals refer to like elements throughout.

In the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

It will be understood that the invention is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims

1. The array substrate is characterized by comprising a display area, wherein the display area comprises a first display area and a second display area; the first display area is adjacent to the second display area; the light transmittance of the second display area is greater than that of the first display area; the first display area comprises first OLED pixels and signal lines which are arranged in an array manner; the second display area comprises second OLED pixels arranged in an array manner;

2. The array substrate of claim 1, wherein the signal line comprises a power line;

3. The array substrate of claim 2, wherein the number of the power lines is greater than 1, and all the power lines are connected to the first pixel circuit after being connected in parallel.

4. The array substrate of claim 3, wherein all the power lines are located in the same layer;

preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer, all the power lines are located at the same layer as the first anode;

preferably, the first anode is a reflective anode; the material of the power supply line is the same as that of the first anode; all the power lines are connected in parallel and then are lapped to the first pixel circuit;

5. The array substrate of claim 3, wherein all the power lines are located in different layers;

preferably, all of said power supply lines are distributed in at least two layers;

preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer, and a power line located at the uppermost layer among all the power lines is located at the same layer as the first anode;

preferably, a material of a power line positioned at an uppermost layer among all the power lines is the same as that of the first anode, and a resistivity of the uppermost power line is greater than that of the power lines of the other layers;

preferably, the second OLED pixel includes a second anode, a second light emitting layer on the second anode, and a second cathode on the second light emitting layer; the second anode is a transparent anode; and the power line positioned on the uppermost layer in all the power lines and the second anode are positioned on the same layer.

6. The array substrate of claim 4 or 5, wherein the power lines comprise at least two first power lines extending along a first direction and at least two second power lines extending along a second direction, and the at least two first power lines and the at least two second power lines are connected in a cross manner to form a mesh; the first direction intersects the second direction;

preferably, the first direction is a row direction in which the first OLED pixels are arranged, and the second direction is a column direction in which the first OLED pixels are arranged;

7. The array substrate of any one of claims 1 to 6, wherein the signal lines comprise data lines;

8. The array substrate of claim 7, wherein the signal lines comprise at least one set of data lines;

the same group of data lines comprises at least one first data line extending along a first direction and at least one second data line extending along a second direction, and the at least one first data line and the at least one second data line are in cross connection; the first direction is a row direction in which the first OLED pixels are arranged, and the second direction is a column direction in which the first OLED pixels are arranged; a second data line extending along a second direction in the same group of data lines is connected to the first pixel circuit of the second OLED pixel in the same column;

the different groups of data lines are insulated and connected to the first pixel circuits of the second OLED pixels in different columns; all the group data wires are distributed in a net shape;

preferably, in all the group of data lines, an insulating layer is included between the first data line and the second data line; the first data line is positioned below the insulating layer, and the second data line is positioned above the insulating layer;

preferably, the at least one set of data lines are distributed in at least two layers;

preferably, the first OLED pixel includes a first anode, a first light emitting layer on the first anode, and a first cathode on the first light emitting layer; the uppermost data line in the at least one group of data lines is the second data line, is positioned on the same layer as the first anodes, and is distributed among the first anodes arranged in an array manner;

preferably, when the signal line comprises a power line and a data line, the power line and the data line are insulated from each other;

preferably, the same power line is connected to the data line at a position intersecting the data line by a bridge;

preferably, the same data line is connected with the power line at a position crossed by the power line through a bridge;

preferably, the material of the data line in all the groups of data lines is molybdenum;

preferably, at least one data line in the same group of data lines is connected with the antistatic circuit.

9. The array substrate of claim 1, wherein at least a portion of the second display area is surrounded by the first display area; the driving mode of the first OLED pixel is active driving, and the driving mode of the second OLED pixel is active driving; the array substrate further comprises a first type of scanning line and a second type of scanning line;

the first scanning line type is positioned in the second display area and the first display area; the second OLED pixels in the same row and the first OLED pixels in the same row are connected to the same first-type scanning line; the first OLED pixels in different rows are connected to different first-type scanning lines, and the second OLED pixels in different rows are connected to different first-type scanning lines; the second type scanning line is positioned in the first display area; the same second type scanning line is only used for connecting the first OLED pixels in the same row; the first OLED pixels in the same row are connected to the same second type scanning line or two different second type scanning lines;

preferably, when the first OLED pixels in the same row are connected to the same second-type scanning line, two ends of the same second-type scanning line are respectively connected to a gate driving unit;

preferably, when the first OLED pixels in the same row are connected to two different second-type scanning lines, the two second-type scanning lines are respectively connected to one gate driving unit;

preferably, the signal line is a power line, and the array substrate further includes a first type data line and a second type data line; the first type data line is positioned in the second display area and the first display area; the second OLED pixels in the same row and the first OLED pixels in the same row are connected to the same first-type data line; the first OLED pixels in different columns are connected to different first-type data lines, and the second OLED pixels in different columns are connected to different first-type data lines; the second type data line is positioned in the first display area; the same second-type data line is only used for connecting the first OLED pixels in the same column;

the array substrate further comprises a non-display area surrounding the display area; the non-display area comprises a second driving chip; the first type data line and the second type data line are connected to the second driving chip;

preferably, the first pixel circuit is a 1T pixel circuit or a 2T1C pixel circuit, and the second pixel circuit of the first OLED pixel is a 2T1C pixel circuit, a 3T1C pixel circuit, a 3T2C pixel circuit, a 4T1C pixel circuit, a 5T1C pixel circuit, a 6T1C pixel circuit, a 7T1C pixel circuit, or a 7T2C pixel circuit;

preferably, the first data voltage of the first OLED pixel is different from the second data voltage of the second OLED pixel;

10. The array substrate of claim 1, wherein the second OLED pixel has a pixel density less than the first OLED pixel;

preferably, the array substrate further comprises a third display area; the third display area is positioned between the first display area and the second display area;

the third display area comprises the first OLED pixels and the second OLED pixels which are arranged in an array mode, and the first OLED pixels and the second OLED pixels are arranged in a staggered mode;

preferably, in a direction in which the first display region points to the second display region, the opening area of the first OLED pixel in the third display region gradually decreases; or,

the third display area comprises third OLED pixels arranged in an array manner; the third anode of the third OLED pixel includes a non-transparent anode region and a transparent anode region; in the third OLED pixel in the direction from the first display area to the second display area, the proportion of the area of the non-transparent anode region in the third anode to the area of the whole third anode decreases in sequence, and the proportion of the area of the transparent anode region to the area of the whole third anode increases in sequence;

11. A display panel, comprising:

an array substrate according to any one of claims 1 to 10;

a photosensitive device can be arranged below the second display area;

12. A display device, comprising:

an apparatus body having a device region;

the display panel of claim 11;

the display panel covers the equipment body;